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ORCIDMatteo Sonza Reorda
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- affiliation: Polytechnic University of Turin, Italy
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2020 – today
- 2021
[j73]Marcelo Lubaszewki, Matteo Sonza Reorda
:
Guest Editors' Introduction: SBCCI 2019. IEEE Des. Test 38(4): 60-61 (2021)- [j72]Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone:
DYRE: a DYnamic REconfigurable solution to increase GPGPU's reliability. J. Supercomput. 77(10): 11625-11642 (2021) - [c355]Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda:
On the Functional Test of Special Function Units in GPUs. DDECS 2021: 81-86 - [c354]Fernando F. dos Santos, Josie E. Rodriguez Condia, Luigi Carro, Matteo Sonza Reorda, Paolo Rech:
Revealing GPUs Vulnerabilities by Combining Register-Transfer and Software-Level Fault Injection. DSN 2021: 292-304 - [c353]Walter Ruggeri, Paolo Bernardi, Stefano Littardi, Matteo Sonza Reorda, Davide Appello, Claudia Bertani, Giorgio Pollaccia, Vincenzo Tancorre, Roberto Ugioli:
Innovative methods for Burn-In related Stress Metrics Computation. DTIS 2021: 1-6 - [c352]Davide Appello, H. H. Chen, Matthias Sauer, Ilia Polian, Paolo Bernardi, Matteo Sonza Reorda:
System-Level Test: State of the Art and Challenges. IOLTS 2021: 1-7 - [c351]Riccardo Cantoro, Patrick Girard, Riccardo Masante, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel:
Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement. IOLTS 2021: 1-4 - [c350]Josie E. Rodriguez Condia, Paolo Rech, Fernando Fernandes dos Santos, Luigi Carro, Matteo Sonza Reorda:
Protecting GPU's Microarchitectural Vulnerabilities via Effective Selective Hardening. IOLTS 2021: 1-7 - [c349]Josie E. Rodriguez Condia, Fernando Fernandes dos Santos, Matteo Sonza Reorda, Paolo Rech:
Combining Architectural Simulation and Software Fault Injection for a Fast and Accurate CNNs Reliability Evaluation on GPUs. VTS 2021: 1-7 - [c348]Nikolaos I. Deligiannis, Riccardo Cantoro, Matthias Sauer, Bernd Becker, Matteo Sonza Reorda:
New Techniques for the Automatic Identification of Uncontrollable Lines in a CPU Core. VTS 2021: 1-7 - [i8]Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner:
Exploring the Mysteries of System-Level Test. CoRR abs/2103.06656 (2021) - [i7]Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda:
A Novel Compaction Approach for SBST Test Programs. CoRR abs/2109.00958 (2021) - 2020
- [j71]Stefano Di Carlo, Josie E. Rodriguez Condia, Matteo Sonza Reorda:
An On-Line Testing Technique for the Scheduler Memory of a GPGPU. IEEE Access 8: 16893-16912 (2020) - [j70]Riccardo Cantoro, Aleksa Damljanovic, Matteo Sonza Reorda, Giovanni Squillero:
A Novel Sequence Generation Approach to Diagnose Faults in Reconfigurable Scan Networks. IEEE Trans. Computers 69(1): 87-98 (2020) - [j69]Cecilia Metra, Matteo Sonza Reorda:
Guest Editor's Introduction: Special Section on High Dependability Systems. IEEE Trans. Emerg. Top. Comput. 8(2): 416-417 (2020) - [c347]Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner:
Exploring the Mysteries of System-Level Test. ATS 2020: 1-6 - [c346]Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka:
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. DATE 2020: 388-393 - [c345]Paolo Bernardi, Marco Restifo, Matteo Sonza Reorda, Davide Appello, Claudia Bertani, D. Petrali:
Applicative System Level Test introduction to Increase Confidence on Screening Quality. DDECS 2020: 1-6 - [c344]Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone:
A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs. DDECS 2020: 1-6 - [c343]Riccardo Cantoro, Nikolaos I. Deligiannis, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea:
Evaluating Data Encryption Effects on the Resilience of an Artificial Neural Network. DFT 2020: 1-4 - [c342]Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Sandro Sartoni, Riccardo Cantoro, Matteo Sonza Reorda, Said Hamdioui, Christian Sauer:
Determined-Safe Faults Identification: A step towards ISO26262 hardware compliant designs. ETS 2020: 1-6 - [c341]Josie E. Rodriguez Condia, Matteo Sonza Reorda:
On the testing of special memories in GPGPUs. IOLTS 2020: 1-6 - [c340]Josie E. Rodriguez Condia, Marcio Gonçalves, José Rodrigo Azambuja, Matteo Sonza Reorda, Luca Sterpone:
Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets. ISVLSI 2020: 380-385 - [c339]Riccardo Cantoro, Dario Foti, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan:
New Perspectives on Core In-field Path Delay Test. ITC 2020: 1-5 - [c338]Riccardo Cantoro, Nikolaos I. Deligiannis, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea:
Evaluating the Code Encryption Effects on Memory Fault Resilience. LATS 2020: 1-6 - [c337]Marcio Gonçalves, José Rodrigo Azambuja, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone:
Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU. LATS 2020: 1-6 - [c336]Davide Piumatti, Matteo Vincenzo Quitadamo, Matteo Sonza Reorda, Franco Fiori:
Testing Heatsink Faults in Power Transistors by means of Thermal Model. LATS 2020: 1-6 - [c335]Josie E. Rodriguez Condia, Matteo Sonza Reorda:
Testing the Divergence Stack Memory on GPGPUs: A Modular in-Field Test Strategy. VLSI-SOC 2020: 153-158 - [c334]Josie Esteban Rodriguez Condia, Matteo Sonza Reorda:
Modular Functional Testing: Targeting the Small Embedded Memories in GPUs. VLSI-SoC (Selected Papers) 2020: 205-233 - [c333]Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda:
In-field Functional Test of CAN Bus Controllers. VTS 2020: 1-6 - [c332]Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone:
A dynamic reconfiguration mechanism to increase the reliability of GPGPUs. VTS 2020: 1-6 - [c331]Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Annachiara Ruospo, Riccardo Mariani, Ghani Kanawati, Ernesto Sánchez, Matteo Sonza Reorda, Maksim Jenihhin, Said Hamdioui, Christian Sauer:
Special Session: AutoSoC - A Suite of Open-Source Automotive SoC Benchmarks. VTS 2020: 1-9 - [i6]Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar:
New categories of Safe Faults in a processor-based Embedded System. CoRR abs/2009.11621 (2020)
2010 – 2019
- 2019
- [j68]Andrea Floridia, Ernesto Sánchez, Matteo Sonza Reorda:
Fault Grading Techniques of Software Test Libraries for Safety-Critical Applications. IEEE Access 7: 63578-63587 (2019) - [j67]Riccardo Cantoro, Aleksa Damljanovic, Matteo Sonza Reorda, Giovanni Squillero:
An Enhanced Evolutionary Technique for the Generation of Compact Reconfigurable Scan-Network Tests. J. Circuits Syst. Comput. 28(Supplement-1): 1940007:1-1940007:25 (2019) - [c330]Davide Piumatti, Stefano Borlo, Fabio Mandrile, Matteo Sonza Reorda, Radu Bojoi:
Assessing the Effectiveness of the Test of Power Devices at the Board Level. DCIS 2019: 1-6 - [c329]F. Almeida, Paolo Bernardi, D. Calabrese, Marco Restifo, Matteo Sonza Reorda, Davide Appello, Giorgio Pollaccia, Vincenzo Tancorre, Roberto Ugioli, G. Zoppi:
Effective Screening of Automotive SoCs by Combining Burn-In and System Level Test. DDECS 2019: 1-6 - [c328]Stefano Di Carlo, Josie E. Rodriguez Condia, Matteo Sonza Reorda:
On the in-field test of the GPGPU scheduler memory. DDECS 2019: 1-6 - [c327]Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar:
New categories of Safe Faults in a processor-based Embedded System. DDECS 2019: 1-4 - [c326]Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu:
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. DFT 2019: 1-6 - [c325]Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda:
An extended model to support detailed GPGPU reliability analysis. DTIS 2019: 1-6 - [c324]Luciano Bonaria, Maurizio Raganato, Matteo Sonza Reorda, Giovanni Squillero:
A Dynamic Greedy Test Scheduler for Optimizing Probe Motion in In-Circuit Testers. ETS 2019: 1-2 - [c323]Josie E. Rodriguez Condia, Felipe Augusto da Silva, Said Hamdioui, Christian Sauer, Matteo Sonza Reorda:
Untestable faults identification in GPGPUs for safety-critical applications. ICECS 2019: 570-573 - [c322]Josie E. Rodriguez Condia, Matteo Sonza Reorda:
Testing permanent faults in pipeline registers of GPGPUs: A multi-kernel approach. IOLTS 2019: 97-102 - [c321]Stephan Eggersglüß, Said Hamdioui, Artur Jutman, Maria K. Michael, Jaan Raik, Matteo Sonza Reorda, Mehdi Baradaran Tahoori, Elena Ioana Vatajelu:
IEEE European Test Symposium (ETS). ITC 2019: 1-4 - [c320]Luciano Bonaria, Maurizio Raganato, Giovanni Squillero, Matteo Sonza Reorda:
Test-Plan Optimization for Flying-Probes In-Circuit Testers. ITC-Asia 2019: 19-24 - [c319]Julio Pérez Acle, Ernesto Sánchez, Matteo Sonza Reorda:
About Performance Faults in Microprocessor Core in-field Testing. LASCAS 2019: 229-232 - [c318]Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone:
On the evaluation of SEU effects in GPGPUs. LATS 2019: 1-6 - [c317]Michelangelo Grosso, Matteo Sonza Reorda, Salvatore Rinaudo:
Software-Based Self-Test for Delay Faults. VLSI-SoC (Selected Papers) 2019: 1-19 - [c316]Michelangelo Grosso, Salvatore Rinaudo, Andrea Casalino, Matteo Sonza Reorda:
Software-Based Self-Test for Transition Faults: a Case Study. VLSI-SoC 2019: 76-81 - [e3]João Antonio Martino, Marcelo Lubaszewski, Matteo Sonza Reorda:
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, SBCCI 2019, Sao Paulo, Brazil, August 26-30, 2019. ACM 2019, ISBN 978-1-4503-6844-5 [contents] - [e2]Michail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, Ricardo Reis:
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 500, Springer 2019, ISBN 978-3-030-15662-6 [contents] - [i5]Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu:
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. CoRR abs/1909.03040 (2019) - [i4]Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka:
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. CoRR abs/1912.01561 (2019) - 2018
- [j66]Riccardo Cantoro, Farrokh Ghani Zadegan, Marco Palena, Paolo Pasini, Erik Larsson, Matteo Sonza Reorda:
Test of Reconfigurable Modules in Scan Networks. IEEE Trans. Computers 67(12): 1806-1817 (2018) - [j65]Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda, Etienne Auvray:
Scan-Chain Intra-Cell Aware Testing. IEEE Trans. Emerg. Top. Comput. 6(2): 278-287 (2018) - [c315]Davide Piumatti, Matteo Sonza Reorda:
Assessing Test Procedure Effectiveness for Power Devices. DCIS 2018: 1-6 - [c314]Riccardo Cantoro, Luigi San Paolo, Matteo Sonza Reorda, Giovanni Squillero:
An Evolutionary Technique for Reducing the Duration of Reconfigurable Scan Network Test. DDECS 2018: 129-134 - [c313]Heinrich Theodor Vierhaus, Maksim Jenihhin, Matteo Sonza Reorda:
RESCUE: Cross-Sectoral PhD Training Concept for Interdependent Reliability, Security and Quality. EWME 2018: 45-50 - [c312]Sara Carbonara, Andrea Firrincieli, Matteo Sonza Reorda, Jan-Gerd Mess:
On the test of a COTS-based system for space applications. IOLTS 2018: 47-48 - [c311]Panagiotis Georgiou, Xrysovalantis Kavousianos, Riccardo Cantoro, Matteo Sonza Reorda:
Fault-Independent Test-Generation for Software-Based Self-Testing. IOLTS 2018: 79-84 - [c310]Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone:
About the functional test of the GPGPU scheduler. IOLTS 2018: 85-90 - [c309]Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson:
Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard. IOLTS 2018: 287-290 - [c308]Riccardo Cantoro, Aleksa Damljanovic, Matteo Sonza Reorda, Giovanni Squillero:
A New Technique to Generate Test Sequences for Reconfigurable Scan Networks. ITC 2018: 1-9 - [c307]Riccardo Cantoro, Aleksa Damljanovic, Matteo Sonza Reorda, Giovanni Squillero:
A Semi-Formal Technique to Generate Effective Test Sequences for Reconfigurable Scan Networks. ITC-Asia 2018: 55-60 - [c306]Riccardo Cantoro, Andrea Firrincieli, Davide Piumatti, Marco Restifo, Ernesto Sánchez, Matteo Sonza Reorda:
About on-line functionally untestable fault identification in microprocessor cores for safety-critical applications. LATS 2018: 1-6 - [c305]Riccardo Cantoro, Sara Carbonara, Andrea Floridia, Ernesto Sánchez, Matteo Sonza Reorda, Jan-Gerd Mess:
An analysis of test solutions for COTS-based systems in space applications. VLSI-SoC 2018: 59-64 - [c304]Riccardo Cantoro, Sara Carbonara, Andrea Floridia, Ernesto Sánchez, Matteo Sonza Reorda, Jan-Gerd Mess:
Improved Test Solutions for COTS-Based Systems in Space Applications. VLSI-SoC (Selected Papers) 2018: 187-206 - 2017
- [j64]Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda:
A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits. J. Electron. Test. 33(1): 25-36 (2017) - [j63]Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey:
A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. J. Electron. Test. 33(1): 53-64 (2017) - [j62]Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda:
Microprocessor Testing: Functional Meets Structural Test. J. Circuits Syst. Comput. 26(8): 1740007:1-1740007:18 (2017) - [j61]Matteo Sonza Reorda, Luca Sterpone, Anees Ullah:
An Error-Detection and Self-Repairing Method for Dynamically and Partially Reconfigurable Systems. IEEE Trans. Computers 66(6): 1022-1033 (2017) - [j60]Marco Gaudesi, Irith Pomeranz, Matteo Sonza Reorda, Giovanni Squillero:
New Techniques to Reduce the Execution Time of Functional Test Programs. IEEE Trans. Computers 66(7): 1268-1273 (2017) - [c303]Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke:
BASTION: Board and SoC test instrumentation for ageing and no failure found. DATE 2017: 115-120 - [c302]R. Cantora, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Emanuele Valea:
On the optimization of SBST test program compaction. DFT 2017: 1-4 - [c301]Paolo Bernardi, Marco Restifo, Ernesto Sánchez, Matteo Sonza Reorda:
On the in-field test of embedded memories. IOLTS 2017: 67-70 - [c300]Tino Flenker, Jan Malburg, Görschwin Fey, Serhiy Avramenko, Massimo Violante, Matteo Sonza Reorda:
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. ISVLSI 2017: 533-538 - [c299]Gaiping An, Riccardo Cantoro, Ernesto Sánchez, Matteo Sonza Reorda:
On the detection of board delay faults through the execution of functional programs. LATS 2017: 1-6 - [c298]Enea Bagalini, Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, H. Klimesch, Peter Sarson:
An automatic approach to perform the verification of hardware designs according to the ISO26262 functional safety standard. LATS 2017: 1-6 - 2016
- [j59]Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Matteo Sonza Reorda:
A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores. J. Electron. Test. 32(2): 147-161 (2016) - [j58]Maksim Jenihhin, Giovanni Squillero, Thiago Santos Copetti, Valentin Tihhomirov, Sergei Kostin, Marco Gaudesi, Fabian Vargas, Jaan Raik, Matteo Sonza Reorda, Leticia Bolzani Poehls, Raimund Ubar, Guilherme Cardoso Medeiros:
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits. J. Electron. Test. 32(3): 273-289 (2016) - [j57]Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli, Ernesto Sánchez, Matteo Sonza Reorda:
A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors. ACM J. Emerg. Technol. Comput. Syst. 13(2): 16:1-16:13 (2016) - [j56]Julio Pérez Acle, Riccardo Cantoro, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero:
Observability solutions for in-field functional test of processor-based systems: A survey and quantitative test case evaluation. Microprocess. Microsystems 47: 392-403 (2016) - [j55]Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena:
Online Test of Control Flow Errors: A New Debug Interface-Based Approach. IEEE Trans. Computers 65(6): 1846-1855 (2016) - [j54]Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker:
A Flexible Framework for the Automatic Generation of SBST Programs. IEEE Trans. Very Large Scale Integr. Syst. 24(10): 3055-3066 (2016) - [c297]Riccardo Cantoro, Marco Palena, Paolo Pasini, Matteo Sonza Reorda:
Test Time Minimization in Reconfigurable Scan Networks. ATS 2016: 119-124 - [c296]Francesco Pellerey, Maksim Jenihhin, Giovanni Squillero, Jaan Raik, Matteo Sonza Reorda, Valentin Tihhomirov, Raimund Ubar:
Rejuvenation of NBTI-Impacted Processors Using Evolutionary Generation of Assembler Programs. ATS 2016: 304-309 - [c295]Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda:
An effective approach for functional test programs compaction. DDECS 2016: 119-124 - [c294]Boyang Du, Ernesto Sánchez, Matteo Sonza Reorda, Julio Pérez Acle, Anton Tsertov:
FPGA-controlled PCBA power-on self-test using processor's debug features. DDECS 2016: 125-130 - [c293]Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson:
On the diagnostic analysis of IEEE 1687 networks. ETS 2016: 1-2 - [c292]Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda:
A low-cost susceptibility analysis methodology to selectively harden logic circuits. ETS 2016: 1-2 - [c291]Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey, Jan-Gerd Mess, Robert Schmidt:
On the robustness of DCT-based compression algorithms for space applications. IOLTS 2016: 1-2 - [c290]Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson:
Automatic generation of stimuli for fault diagnosis in IEEE 1687 networks. IOLTS 2016: 167-172 - [c289]Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda:
Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study. ISVLSI 2016: 731-736 - [c288]Anton Tsertov, Artur Jutman, Sergei Devadze, Matteo Sonza Reorda, Erik Larsson, Farrokh Ghani Zadegan, Riccardo Cantoro, Mehrdad Montazeri, Rene Krenz-Baath:
A suite of IEEE 1687 benchmark networks. ITC 2016: 1-10 - [c287]Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey:
Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. LATS 2016: 14-19 - [c286]Eduardo Chielle, Boyang Du, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi, Luca Sterpone, Matteo Sonza Reorda:
Hybrid soft error mitigation techniques for COTS processor-based systems. LATS 2016: 99-104 - [c285]Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker:
Effective generation and evaluation of diagnostic SBST programs. VTS 2016: 1-6 - 2015
- [j53]Ernesto Sánchez, Matteo Sonza Reorda:
On the Functional Test of Branch Prediction Units. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1675-1688 (2015) - [c284]Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson:
On the testability of IEEE 1687 networks. ATS 2015: 211-216 - [c283]Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker:
On the automatic generation of SBST test programs for in-field test. DATE 2015: 1186-1191 - [c282]Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda:
Exploring the impact of functional test programs re-used for power-aware testing. DATE 2015: 1277-1280 - [c281]Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda:
An effective ATPG flow for Gate Delay Faults. DTIS 2015: 1-6 - [c280]Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda:
Scan-chain intra-cell defects grading. DTIS 2015: 1-6 - [c279]Marco Gaudesi, Matteo Sonza Reorda, Irith Pomeranz:
On test program compaction. ETS 2015: 1-6 - [c278]Riccardo Cantoro, Matteo Sonza Reorda, Alireza Rohani, Hans G. Kerkhoff:
On the maximization of the sustained switching activity in a processor. IOLTS 2015: 34-35 - [c277]Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda:
Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture. IOLTS 2015: 89-94 - [c276]Hassan Ghasemzadeh, Pierre-Emmanuel Gaillardon, J. Zhang, Giovanni De Micheli, Ernesto Sánchez, Matteo Sonza Reorda:
On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors. ISVLSI 2015: 491-496 - [c275]Julio Pérez Acle, Riccardo Cantoro, Ernesto Sánchez, Matteo Sonza Reorda:
On the functional test of the cache coherency logic in multi-core systems. LASCAS 2015: 1-4 - [c274]Paolo Bernardi, Lyl M. Ciganda Brasca, Matteo Sonza Reorda, Said Hamdioui:
SW-based transparent in-field memory testing. LATS 2015: 1-6 - [c273]Ronaldo Rodrigues Ferreira, Ernesto Sánchez, Jean da Rolt, Gabriel L. Nazar, Álvaro F. Moreira, Luigi Carro, Matteo Sonza Reorda:
Permanent fault detection and diagnosis in the lightweight dual modular redundancy architecture. LATS 2015: 1-6 - [c272]N. Palermo, Valentin Tihhomirov, Thiago Santos Copetti, Maksim Jenihhin, Jaan Raik, Sergei Kostin, Marco Gaudesi, Giovanni Squillero, Matteo Sonza Reorda, Fabian Vargas, Letícia Maria Bolzani Pöhls:
Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG. LATS 2015: 1-6 - [c271]Matteo Sonza Reorda:
In-field test of safety-critical systems: is functional test a feasible solution? LATS 2015: 1-2 - 2014
- [j52]Mauricio de Carvalho, Paolo Bernardi, Ernesto Sánchez, Matteo Sonza Reorda, Oscar Ballan:
Increasing the Fault Coverage of Processor Devices during the Operational Phase Functional Test. J. Electron. Test. 30(3): 317-328 (2014) - [j51]Stefano Di Carlo, Marco Gaudesi, Edgar E. Sánchez, Matteo Sonza Reorda:
A Functional Approach for Testing the Reorder Buffer Memory. J. Electron. Test. 30(4): 469-481 (2014) - [j50]Letícia Maria Bolzani Poehls, Matteo Sonza Reorda:
Selected Peer-Reviewed Articles from the 14th IEEE Latin-American Test Workshop, Cordoba, Argentina, April 3-5, 2013. J. Low Power Electron. 10(1): 163-164 (2014) - [j49]