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ISCAS 2000: Geneva, Switzerland
- IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. IEEE 2000
Volume 1
- Akira Toriumi:
Challenge to off-roadmap silicon devices. - Alan C. Seabaugh:
Tunnel diode integrated circuits. - Costa Gerousis, Stephen M. Goodnick, Xiaohui Wang, Wolfgang Porod, Árpád Csurgay, Géza Tóth, Craig S. Lent:
Modeling nanoelectronic CNN cells: CMOS, SETs and QCAs. - Árpád Csurgay, Wolfgang Porod:
Toward nanoelectronic systems integration. 1-4 - Richard Stanley Williams, Philip J. Kuekes:
Molecular nanoelectronics. 5-7 - Arthur H. M. van Roermund, Jaap Hoekstra:
From nanotechnology to nanoelectronic systems, from SETs to neural nets. 8-11 - Omar Nibouche, Ahmed Bouridane, Mokhtar Nibouche, Danny Crookes:
A new pipelined digit serial-parallel multiplier. 12-15 - Dusan Suvakovic, C. André T. Salama:
A pipelined multiply-accumulate unit design for energy recovery DSP systems. 16-19 - D. J. Soudris
, Minas Dasygenis, Adonios Thanailakis:
Designing RNS and QRNS full adder based converters. 20-23 - Shugang Wei, Kensuke Shimizu:
Residue arithmetic circuits using a signed-digit number representation. 24-27 - Ramchan Woo, Se-Joong Lee, Hoi-Jun Yoo:
A 670 ps, 64 bit dynamic low-power adder design. 28-31 - Daniel Gatica-Perez, Ming-Ting Sun, Chuang Gu:
Semiautomatic video object generation using multivalued watershed and partition lattice operators. 32-35 - Jinhui Pan, Shipeng Li
, Ya-Qin Zhang:
Automatic extraction of moving objects using multiple features and multiple frames. 36-39 - Jin-Woo Kim, Munjae Song, Ig-Jae Kim, Yong-Moo Kwon, Hyoung-Gon Kim, Sang Chul Ahn:
Automatic FDP/FAP generation from an image sequence. 40-43 - Viswanathan Swaminathan, Gerard Fernando:
MPEG-J: Java application engine in MPEG-4. 44-47 - Dapeng Oliver Wu
, Yiwei Thomas Hou, Ya-Qin Zhang, Wenwu Zhu, H. Jonathan Chao:
Adaptive QOS control for MPEG-4 video communication over wireless channels. 48-51 - Ramesh Harjani, Oyvind Birkenes, Jonghae Kim:
An IF stage design for an ASK-based wireless telemetry system. 52-55 - Alain-Serge Porret, Thierry Melly, Christian C. Enz, Eric A. Vittoz:
A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network. 56-59 - Brian J. Minnis, Paul A. Moore, Adrian W. Payne, Alan J. Davie, Nigel P. J. Greer:
A low-IF, polyphase receiver for DECT [in BiCMOS]. 60-63 - Bo Shi, Lars Sundström
:
A novel design using translinear circuit for linear LINC transmitters. 64-67 - F. Xavier Moncunill-Geniz, Orestes Mas-Casals
, Pere Palà-Schönwälder:
A direct-sequence spread-spectrum super-regenerative receiver. 68-71 - Krishnendu Chakrabarty
, Shivakumar Swaminathan:
Built-in self testing of high-performance circuits using twisted-ring counters. 72-75 - Fulvio Corno
, Matteo Sonza Reorda
, Giovanni Squillero
:
An improved cellular automata-based BIST architecture for sequential circuits. 76-79 - Shyue-Kung Lu, Jen-Sheng Shih, Cheng-Wen Wu
:
Built-in self-test and fault diagnosis for lookup table FPGAs. 80-83 - Dimitri Kagaris, Spyros Tragoudas:
Methods for on-chip embedding of path delay test vectors. 84-87 - Jongwook Park, Sang-Hoon Shin, Sungju Park:
A partial scan design by unifying structural analysis and testabilities. 88-91 - Atsushi Ogata, Naoyuki Aikawa, Masamitsu Sato:
A design method of low delay FIR bandpass filters. 92-95 - Rick M. Roark, Monty A. Escabí:
Design of FIR filters with exceptional passband and stopband smoothness using a new transitional window. 96-99 - Miroslav Vlcek, Pavel Zahradnik, Rolf Unbehauen:
Asymptotic behaviour of FIR filters. 100-103 - Jussi Vesma, Tapio Antero Saramäki:
Design and properties of polynomial-based fractional delay filters. 104-107 - Vladimir V. Lukin
, Tapio Antero Saramäki:
Design and properties of step-like weighting windows. 108-111 - Fu-Yen Kuo, Chung-Wei Ku:
Software radio based re-configurable correlator/FIR filter for CDMA/TDMA receiver. 112-115 - Ridha Radhouane, Peter Liu, Cory Modlin:
Minimizing the memory requirement for continuous flow FFT implementation: continuous flow mixed mode FFT (CFMM-FFT). 116-119 - Yujiro Inouye, Ruey-Wen Liu:
A system-theoretic foundation for blind equalization of an FIR MIMO channel system. 120-123 - Buon Kiong Lau, Yee Hong Leung:
A Dolph-Chebyshev approach to the synthesis of array patterns for uniform circular arrays. 124-127 - Palghat P. Vaidyanathan, Yuan-Pei Lin, Sony Akkarakaran, See-May Phoong:
Optimality of principal component filter banks for discrete multitone communication systems. 128-131 - Geoffrey J. Coram, Brian D. O. Anderson, John L. Wyatt Jr.:
Thermal noise behavior of a nonlinear bridge circuit. 132-135 - Geoffrey J. Coram, John L. Wyatt Jr.:
Poisson and Gaussian models for noisy devices. 136-139 - Eva Vidal, Sonia Porta, Herminio Martínez, Eduard Alarcón, Alberto Poveda:
Complete nonlinear model for the MRC (MOS resistive circuit). 140-143 - Yongwang Ding, Ramesh Harjani:
A universal analytic charge injection model. 144-147 - Matthew Green, Abdelhak M. Zoubir:
A search for a parsimonious basis sequence approximation of time-varying, nonlinear systems. 148-151 - Hongwei Yang, Chen He, Hong-Wen Zhu, Wentao Song:
Prediction of slant path rain attenuation based on artificial neural network. 152-155 - Hazem M. El-Bakry
, M. A. Abo-Elsoud, Mohamed S. Kamel:
Fast modular neural nets for face detection. 156-159 - José Manoel de Seixas, William Soares-Filho, Marcelo C. Bossan, Zieli Dutra Thomé, W. C. A. Pereira:
Neural identification of failed fuel rods in nuclear reactors [PWRs]. 160-163 - Ying Li, Bendu Bai, Licheng Jiao:
An adaptive neurofuzzy network for identification of the complicated nonlinear system. 164-167 - Arto Kantsila, Mikko Lehtokangas, Jukka Saarinen:
On equalization with maximum covariance initialized cascade-correlation learning. 168-171 - Francisco Serra-Graells
:
VLSI CMOS low-voltage log companding filters. 172-175 - Douglas Frey:
C-log domain filters. 176-179 - Daniel Rocha, Wouter A. Serdijn:
A dynamic-translinear fully-integrated highly-directional hearing aid adapter. 180-183 - Esther O. Rodríguez, Alberto Yufera, Adoración Rueda:
A low-voltage √x floating-gate MOS integrator. 184-187 - Emmanuel M. Drakakis, Alison J. Payne:
On the exact realisation of LC ladder finite transmission zeros in log-domain: a theoretical study. 188-191 - Kohkichi Tsuji:
On a new type of extended Petri nets and its applications. 192-195 - Guo-Hui Lin, Guoliang Xue:
A linear time algorithm for computing hexagonal Steiner minimum trees for terminals on the boundary of a regular hexagon. 196-199 - Toshihiko Takahashi:
Dropping method for rectangle packing problem. 200-203 - Jaroslaw K. Cel:
Minty's coloured branch theorem versus Tellegen's theorem. 204-207 - Raimund Ubar, Jaan Raik
, Adam Morawiec:
Back-tracing and event-driven techniques in high-level simulation with decision diagrams. 208-211 - Xiaoyun Wu, Wenwu Zhu, Zixiang Xiong, Ya-Qin Zhang:
Object-based multiresolution watermarking of images and video. 212-215 - Anastasios Tefas, Ioannis Pitas:
Image authentication using chaotic mixing systems. 216-219 - Sofia Tsekeridou
, Ioannis Pitas:
Wavelet-based self-similar watermarking for still images. 220-223 - Peter Hon-Wah Wong, Oscar C. Au, Justy W. C. Wong:
Image watermarking using spread spectrum technique in log-2-spatio domain. 224-227 - Wen-Nung Lie, Guo-Shiang Lin, Chih-Liang Wu, Ta-Chun Wang:
Robust image watermarking on the DCT domain. 228-231 - Irwin W. Sandberg:
A canonical form for discrete-time systems defined over +. 232-235 - Alexander Yu. Pogromsky
, Hendrik Nijmeijer:
New results for estimation of Hausdorff dimension. 236-239 - Domine M. W. Leenaerts:
On explicit solutions of nonlinear dynamic systems. 240-243 - Efthimios Kappos:
Compactified dynamics and peaking. 244-247 - Tadashi Tsubone, Toshimichi Saito:
On basic piecewise-constant systems. 248-251 - Itsda Boonyaroonate, Takayuki Fukami, Shinsaku Mori:
Class E isolated DC-DC converter using PWM synchronous rectifier. 252-255 - Hoi Lee, Philip K. T. Mok, Wing-Hung Ki:
A novel voltage-control scheme for low-voltage DC-DC converters with fast transient recovery. 256-259 - Noriaki Hara, Ichirou Oota, Fumio Ueno:
Ring type switched-capacitor transformer and its applications. 260-263 - Mamadou Gaye, Sami Ajram, Jean-Yves Lebas, Romain Kozlowski, Georges Salmer:
A 50-100 MHz 5 V to -5 V, 1 W Cuk converter using gallium arsenide power switches. 264-267 - Nicola Femia, Massimo Vitelli, Domenico Cerbasi, Giovanni Spagnuolo:
Analysis of soft synchronous commutations in switching converters. 268-271 - Walter Sachs, Stefan Wolter:
Specification and implementation of a cryptocoprocessor for ISDN. 275-278 - Sarwono Sutikno
, Andy Surya:
An architecture of F(22N) multiplier for elliptic curves cryptosystem. 279-282 - Yan Wang, Chi-Ying Tsui, Roger S. Cheng:
A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme. 283-286 - Zhongfeng Wang, Hiroshi Suzuki, Keshab K. Parhi
:
Efficient approaches to improving performance of VLSI SOVA-based turbo decoders. 287-290 - Li-Minn Ang, Hon Nin Cheung, Kamran Eshraghian:
A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing. 291-294 - Tihao Chiang, Hung-Ju Lee, Huifang Sun:
An overview of the encoding tools in the MPEG-4 reference software. 295-298 - Weiping Li, Fan Ling, Xuemin Chen:
Fine granularity scalability in MPEG-4 for streaming video. 299-302 - Shipeng Li
, Iraj Sodagar:
Generic, scalable and efficient shape coding for visual texture objects in MPEG-4. 303-306 - Eric Petajan:
The communication of virtual human faces using MPEG-4 tools. 307-310 - Iraj Sodagar, Hung-Ju Lee, Paul Hatrack, Bing-Bing Chai:
Multi-scale zerotree entropy coding. 311-314 - Pietro Andreani, Sven Mattisson:
A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor. 315-318 - Mark Lehne, John T. Stonick, Un-Ku Moon:
An adaptive offset cancellation mixer for direct conversion receivers in 2.4 GHz CMOS. 319-322 - Yue Wu, Chunlei Shi, Mohammed Ismail, Håkan K. Olsson:
Temperature compensation design for a 2.4 GHz CMOS low noise amplifier. 323-326 - Toby Kwok-Kei Kan, Kin-Chung Mak, Dongsheng Ma, Howard C. Luong:
A 2-V 900-MHz CMOS mixer for GSM receivers. 327-330 - Donhee Ham
, Ali Hajimiri
:
Design and optimization of a low noise 2.4 GHz CMOS VCO with integrated LC tank and MOSCAP tuning. 331-334 - Carsten Wegener, Michael Peter Kennedy:
Model-based testing of high-resolution ADCs. 335-338 - Saman Adham, Dhamin Al-Khalili, Côme Rozon, Douglas Racz:
Comprehensive defect analysis and testability of current-mode logic circuits. 339-342 - Patrice Vado, Yvon Savaria, Yannick Zoccarato, Chantal Robach:
A methodology for validating digital circuits with mutation testing. 343-346 - Marie-Lise Flottes, Bruno Rouzeyre, Laurent Volpe:
A controller resynthesis based method for improving datapath testability. 347-350 - Valentin Muresan, Xiaojun Wang, Mircea Vladutiu:
The left edge algorithm in block test scheduling under power constraints. 351-354 - Wu-Sheng Lu:
Design of stable minimax IIR digital filters using semidefinite programming. 355-358 - Kazuyoshi Uesaka, Masayuki Kawamata:
Synthesis of low-sensitivity second-order digital filter using genetic programming with automatically defined functions. 359-362 - Luiz W. P. Biscainho, Paulo Sergio Ramirez Diniz
:
On the effects of zero-pole pairs and individual zeros and poles on discrete-time transfer functions. 363-366 - Johnny Holmberg, Lennart Harnefors, Svante Signell:
Stability analysis of the second-order lossless digital integrator allpass filter. 367-370 - Xi Zhang, Kazuyoshi Suzuki, Toshinori Yoshikawa:
Complex Chebyshev approximation for IIR digital filters. 371-374 - Jie Chen, Paul Lungner, Jit Kumar:
A flexible design of packets over SONET or directly over fiber. 375-378 - Jian Ding, Gerald E. Sobelman:
ATM switch design using code division multiple access techniques. 379-382 - Alessandra Giovanardi, Gianluca Mazzini:
Impact of chaotic self-similar and Poisson traffics on WLAN token passing protocols. 383-386 - Ilion Yi-Liang Hsiao, Chein-Wei Jen:
A new hardware design and FPGA implementation for Internet routing towards IP over WDM and terabit routers. 387-390 - José G. Delgado-Frias, Jabulani Nyathi:
A wave-pipelined CMOS associate router for communication switches. 391-394 - Wu-Sheng Lu:
Design of stable 2D IIR digital filters using iterative semidefinite programming. 395-398 - Paul Zaris, Jeffrey Wood, Eric Rogers:
The zero structure of nD linear systems. 399-402 - Krzysztof Galkowski, Eric Rogers, Artur Gramacki, Jaroslaw Gramacki, David H. Owens:
Strong practical stability for a class of 2D linear systems. 403-406 - Rudolf Rabenstein, Lutz Trautmann:
Partial differential equation models for continuous multidimensional systems. 407-410 - Sankar Basu:
System theoretic ideas for construction of ND in (N≥2) causal, stable, perfect reconstruction filter banks. 411-414 - Nicolas Donckers, Carlos Dualibe, Michel Verleysen:
A current-mode CMOS loser-take-all with minimum function for neural computations. 415-418 - Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Ezio Biglieri, Daniele D. Caviglia:
An analog on-chip learning circuit architecture of the weight perturbation algorithm. 419-422 - Kwok Kit Lau, Bertram E. Shi
:
A 1-D local image velocity sensor using Gabor filtering. 423-426 - Ronald G. Spencer:
CMOS dynamic linking networks for real-time human face tracking. 427-430 - Tina A. Hudson, David C. Lin, Julian A. Bragg, Edgar A. Brown, Stephen P. DeWeerth:
An analog VLSI model of muscle sarcomeres. 431-434 - Seung-Bin You, Ku-Whan Lee, Hee-Cheol Choi, Ho-Jin Park, Jae-Whui Kim, Philip Chung:
A 3.3 V 14-bit 10 MSPS calibration-free CMOS pipelined A/D converter. 435-438 - Hee-Cheol Choi, Ho-Jin Park, Shin-Kyu Bae, Jae-Whui Kim, Philip Chung:
A 1.4 V 10-bit 20 MSPS pipelined A/D converter. 439-442 - Jen-Shiun Chiang, Ming-Da Chiang:
The design of a 1.5 V, 10-bit, 10 M samples/s low power pipelined analog-to-digital converter. 443-446 - Nam-Keal Kim, Wang-Seup Yeum, Jae-Whui Kim:
A 2.4 V, 12 mW stereo audio D/A converter with double sampling switching. 447-450 - Zhilliang Zheng, Byung-Moo Min, Un-Ku Moon, Gabor C. Temes:
Efficient error-cancelling algorithmic ADC. 451-454 - Mario Roberto Casu
, Guido Masera
, Gianluca Piccinini, Massimo Ruo Roch
, Maurizio Zamboni:
A high accuracy-low complexity model for CMOS delays. 455-458 - Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Manuel J. Bellido, Antonio J. Acosta, Manuel Valencia:
Inertial and degradation delay model for CMOS logic gates. 459-462 - Li-Pen Yuan, Sung-Mo Kang:
Detection and elimination of initial transient for accurate power analysis. 463-466 - Ramamurti Chandramouli, Vamsi K. Srikantam:
Optimum probability model selection using Akaike's information criterion for low power applications. 467-470 - Radu Marculescu, Cristinel Ababei:
Improving simulation efficiency for circuit-level power estimation [CMOS]. 471-474 - Armen H. Zemanian:
Maximum principles for node voltages and branch currents in transfinite resistive networks. 475-478