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ORCIDGeorges G. E. Gielen
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- affiliation: Catholic University of Leuven, Belgium
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2020 – today
- 2020
[j94]Elisa Sacco
, Johan Vergauwen, Georges G. E. Gielen:
A 16.1-bit Resolution 0.064-mm2 Compact Highly Digital Closed-Loop Single-VCO-Based 1-1 Sturdy-MASH Resistance-to-Digital Converter With High Robustness in 180-nm CMOS. IEEE J. Solid State Circuits 55(9): 2456-2467 (2020)- [j93]Jonah Van Assche, Georges G. E. Gielen:
Power Efficiency Comparison of Event-Driven and Fixed-Rate Signal Conversion and Compression for Biomedical Applications. IEEE Trans. Biomed. Circuits Syst. 14(4): 746-756 (2020) - [j92]Nektar Xama, Martin Andraud, Jhon Gomez, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Georges G. E. Gielen:
Machine Learning-based Defect Coverage Boosting of Analog Circuits under Measurement Variations. ACM Trans. Design Autom. Electr. Syst. 25(5): 47:1-47:27 (2020) - [c212]Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Nektar Xama, Jhon Gomez, Georges G. E. Gielen:
Latent Defect Screening with Visually-Enhanced Dynamic Part Average Testing. ETS 2020: 1-6 - [c211]Nektar Xama, Jakob Raymaekers, Martin Andraud, Jhon Gomez, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Georges G. E. Gielen:
Avoiding Mixed-Signal Field Returns by Outlier Detection of Hard-to-Detect Defects based on Multivariate Statistics. ETS 2020: 1-6 - [c210]Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen:
Pinhole Latent Defect Modeling and Simulation for Defect-Oriented Analog/Mixed-Signal Testing. VTS 2020: 1-6
2010 – 2019
- 2019
- [j91]Jorge Marin, Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
A Robust BBPLL-Based 0.18- $\mu$ m CMOS Resistive Sensor Interface With High Drift Resilience Over a -40 °C-175 °C Temperature Range. IEEE J. Solid State Circuits 54(7): 1862-1873 (2019) - [j90]Elisa Sacco, Jorge Marin, Johan Vergauwen, Georges G. E. Gielen:
Performance Limitation Analysis of Highly-Digital Time-Based Closed-Loop Sensor-to-Digital Converter Architectures. IEEE Trans. Circuits Syst. II Express Briefs 66-II(7): 1114-1118 (2019) - [j89]Hui Liu, Xinpeng Xing, Georges G. E. Gielen:
An 85-MHz-BW ASAR-Assisted CT 4-0 MASH $\Delta\Sigma$ Modulator With Background Half-Range Dithering-Based DAC Calibration in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2405-2414 (2019) - [j88]Marco Simicic, Pieter Weckx, Bertrand Parvais, Philippe Roussel, Ben Kaczer, Georges G. E. Gielen:
Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations. IEEE Trans. Very Large Scale Integr. Syst. 27(3): 601-610 (2019) - [c209]Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
A 16.1-b ENOB 0.064mm2 Compact Highly-Digital Closed-Loop Single-VCO-based 1-1 SMASH Resistance-to-Digital Converter in 180nm CMOS. A-SSCC 2019: 109-112 - [c208]Georges G. E. Gielen, Nektar Xama, Karthik Ganesan, Subhasish Mitra:
Review of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs. DATE 2019: 1006-1009 - [c207]Wim Dobbelaere, Frederik Colle, Anthony Coyette, Ronny Vanhooren, Nektar Xama, Jhon Gomez, Georges G. E. Gielen:
Applying Vstress and defect activation coverage to produce zero-defect mixed-signal automotive ICs. ITC 2019: 1-4 - [c206]Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
From Open-Loop to Closed-Loop Single-VCO-Based Sensor-to-Digital Converter Architectures: theoretical analysis and comparison. IWASI 2019: 29-34 - [c205]Georges G. E. Gielen:
The fantastic voyage towards ultra-miniaturized sensing circuits. IWASI 2019: 35 - [c204]Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
Architectural Analysis of a Novel Closed-Loop VCO-Based 1-1 Sturdy MASH Sensor-to-Digital Converter. SMACD 2019: 261-264 - 2018
- [j87]Mai O. Sallam, Guy A. E. Vandenbosch, Georges G. E. Gielen, Ezzeldin A. Soliman:
Generalized mode solver for plasmonic transmission lines embedded in layered media based on the Method of Moments. Comput. Phys. Commun. 233: 1-15 (2018) - [j86]Baris Esen, Anthony Coyette, Nektar Xama, Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren:
An Automated Low-Cost Analog and Mixed-Signal DfT Method Using Testing Diodes. IEEE Des. Test 35(3): 15-23 (2018) - [j85]Anthony Coyette, Baris Esen, Nektar Xama, Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren:
ADAGE: Automatic DfT-Assisted Generation of Test Stimuli for Mixed- Signal Integrated Circuits. IEEE Des. Test 35(3): 24-30 (2018) - [j84]Ha Le-Thai, Genis Chapinal, Tomas Geurts, Georges G. E. Gielen:
A 0.18-µm CMOS Image Sensor With Phase-Delay-Counting and Oversampling Dual-Slope Integrating Column ADCs Achieving 1e-rms Noise at 3.8-µs Conversion Time. IEEE J. Solid State Circuits 53(2): 515-526 (2018) - [c203]Hui Liu, Xinpeng Xing, Georges G. E. Gielen:
An 85MHz-BW 68.5dB-SNDR ASAR-assisted CT 4-0 MASH ΔΣ modulator with half-range dithering-based DAC calibration in 28nm CMOS. CICC 2018: 1-4 - [c202]Jorge Marin, Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
A Single-Temperature-Calibration 0.18-µm CMOS Time-Based Resistive Sensor Interface with Low Drift over a -40°C to 175°C Temperature Range. ESSCIRC 2018: 330-333 - [c201]Georges G. E. Gielen, Jorge Marin, Elisa Sacco:
Improving the robustness and drift resilience of CMOS BBPLL-based time-based sensor interfaces. ICECS 2018: 117-120 - [c200]Georges G. E. Gielen, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Nektar Xama:
Methodology Towards Sub-ppm Testing of Analog and Mixed-Signal ICs for Cyber-Physical Systems. ISCAS 2018: 1-4 - [c199]Elisa Sacco, Jorge Marin, Johan Vergauwen, Georges G. E. Gielen:
Controlled-Oscillator Optimization for Highly-Digital CMOS Time-Based Sensor-to-Digital Converter Architectures. SMACD 2018: 249-252 - 2017
- [j83]Rachit Mohan, Samira Zaliasl, Georges G. E. Gielen, Chris Van Hoof, Refet Firat Yazicioglu, Nick Van Helleputte:
A 0.6-V, 0.015-mm2, Time-Based ECG Readout for Ambulatory Applications in 40-nm CMOS. IEEE J. Solid State Circuits 52(1): 298-308 (2017) - [c198]Xinpeng Xing, Peng Zhu, Hui Liu, Wei Wang, Georges G. E. Gielen:
A power-efficient reconfigurable two-step VCO-based ADC for software-defined radio. ASICON 2017: 620-623 - [c197]Baris Esen, Anthony Coyette, Nektar Xama, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen:
A very low cost and highly parallel DfT method for analog and mixed-signal circuits. ETS 2017: 1-2 - [c196]Nektar Xama, Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen:
Automatic testing of analog ICs for latent defects using topology modification. ETS 2017: 1-6 - [c195]Baris Esen, Anthony Coyette, Nektar Xama, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen:
Non-intrusive detection of defects in mixed-signal integrated circuits using light activation. ITC 2017: 1-7 - [c194]Georges G. E. Gielen, Jorge Marin, Elisa Sacco:
Drift mitigation in integrated sensor interfaces. IWASI 2017: 51 - [c193]Jorge Marin, Elisa Sacco, Johan Vergauwen, Georges G. E. Gielen:
Analysis and modeling of drift-resilient time-based integrated resistive sensor interfaces. IWASI 2017: 183-186 - 2016
- [j82]Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen:
Automatic generation of test infrastructures for analog integrated circuits by controllability and observability co-optimization. Integr. 55: 393-400 (2016) - [j81]Georges G. E. Gielen, Jelle Van Rethy, Jorge Marin, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Time-Based Sensor Interface Circuits in CMOS and Carbon Nanotube Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(5): 577-586 (2016) - [c192]Bo Liu, Nan Sun, Qingfu Zhang, Vic Grout, Georges G. E. Gielen:
A surrogate model assisted evolutionary algorithm for computationally expensive design optimization problems with discrete variables. CEC 2016: 1650-1657 - [c191]Ha Le-Thai, Adi Xhakoni, Georges G. E. Gielen:
A column-and-row-parallel CMOS image sensor with thermal and 1/f noise suppression techniques. ESSCIRC 2016: 221-224 - [c190]Rachit Mohan, Samira Zaliasl, Georges G. E. Gielen, Chris Van Hoof, Nick Van Helleputte, Refet Firat Yazicioglu:
28.5 A 0.6V 0.015mm2 time-based biomedical readout for ambulatory applications in 40nm CMOS. ISSCC 2016: 482-483 - [c189]Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen:
Automatic test signal generation for mixed-signal integrated circuits using circuit partitioning and interval analysis. ITC 2016: 1-10 - [c188]Wim Dobbelaere, Ronny Vanhooren, Willy De Man, Koen Matthijs, Anthony Coyette, Baris Esen, Georges G. E. Gielen:
Analog fault coverage improvement using final-test dynamic part average testing. ITC 2016: 1-9 - [c187]Baris Esen, Anthony Coyette, Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren:
Effective DC fault models and testing approach for open defects in analog circuits. ITC 2016: 1-9 - 2015
- [j80]Xinpeng Xing, Georges G. E. Gielen:
A 42 fJ/Step-FoM Two-Step VCO-Based Delta-Sigma ADC in 40 nm CMOS. IEEE J. Solid State Circuits 50(3): 714-723 (2015) - [j79]Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene:
Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture. IEEE Trans. Circuits Syst. II Express Briefs 62-II(1): 31-35 (2015) - [j78]Peng Zhu, Xinpeng Xing, Georges G. E. Gielen:
A 40-MHz Bandwidth 0-2 MASH VCO-Based Delta-Sigma ADC With 35-fJ/Step FoM. IEEE Trans. Circuits Syst. II Express Briefs 62-II(10): 952-956 (2015) - [c186]Xinpeng Xing, Gaozhan Cai, Georges G. E. Gielen:
A lowpass/bandpass reconfigurable continuous-time ΔΣ ADC for software-defined radio. ASICON 2015: 1-4 - [c185]Anthony Coyette, Baris Esen, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen:
Automatic generation of autonomous built-in observability structures for analog circuits. ETS 2015: 1-6 - [c184]Iman Khajenasiri, Joseph Virgone, Georges G. E. Gielen:
A presence-based control strategy solution for HVAC systems. ICCE 2015: 620-622 - [c183]Georges G. E. Gielen, Jelle Van Rethy, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Time-based sensor interface circuits in carbon nanotube technology. ISCAS 2015: 2924-2927 - [c182]Georges G. E. Gielen:
Design of low-power sensor interfaces in the IoT era. IWASI 2015: 173 - [c181]Anthony Coyette, Baris Esen, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen:
Automated testing of mixed-signal integrated circuits by topology modification. VTS 2015: 1-6 - 2014
- [b2]Bo Liu, Georges G. E. Gielen, Francisco V. Fernández:
Automated Design of Analog and High-frequency Circuits - A Computational Intelligence Approach. Studies in Computational Intelligence 501, Springer 2014, ISBN 978-3-642-39161-3, pp. 1-235 - [j77]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hai Wei, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Sensor-to-Digital Interface Built Entirely With Carbon Nanotube FETs. IEEE J. Solid State Circuits 49(1): 190-201 (2014) - [j76]Carolina Mora Lopez, Alexandru Andrei, Srinjoy Mitra, Marleen Welkenhuysen, Wolfgang Eberle, Carmen Bartic, Robert Puers, Refet Firat Yazicioglu, Georges G. E. Gielen:
An Implantable 455-Active-Electrode 52-Channel CMOS Neural Probe. IEEE J. Solid State Circuits 49(1): 248-261 (2014) - [j75]Jelle Van Rethy, Hans Danneels, Georges G. E. Gielen:
Scalable Bang-Bang Phase-Locked-Loop-based integrated sensor interfaces. Microelectron. J. 45(12): 1641-1647 (2014) - [j74]Vladimir Ceperic, Georges G. E. Gielen, Adrijan Baric:
Sparse ε-tube support vector regression by active learning. Soft Comput. 18(6): 1113-1126 (2014) - [j73]Bo Liu, Dixian Zhao, Patrick Reynaert, Georges G. E. Gielen:
GASPAD: A General and Efficient mm-Wave Integrated Circuit Synthesis Method Based on Surrogate Model Assisted Evolutionary Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 169-182 (2014) - [j72]Adi Xhakoni, Georges G. E. Gielen:
A 132-dB Dynamic-Range Global-Shutter Stacked Architecture for High-Performance Imagers. IEEE Trans. Circuits Syst. II Express Briefs 61-II(6): 398-402 (2014) - [j71]Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene:
Transient Behavior and Phase Noise Performance of Pulsed-Harmonic Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 2119-2128 (2014) - [j70]Bo Liu, Qingfu Zhang, Georges G. E. Gielen:
A Gaussian Process Surrogate Model Assisted Evolutionary Algorithm for Medium Scale Expensive Optimization Problems. IEEE Trans. Evol. Comput. 18(2): 180-192 (2014) - [c180]Ivo Bolsens, Georges G. E. Gielen, Kaushik Roy, Ulf Schneider:
"All Programmable SOC FPGA for networking and computing in big data infrastructure". ASP-DAC 2014: 1-3 - [c179]Bo Liu, Qin Chen, Qingfu Zhang, Georges G. E. Gielen, Vic Grout:
Behavioral study of the surrogate model-aware evolutionary search framework. IEEE Congress on Evolutionary Computation 2014: 715-722 - [c178]Mengyuan Wu, Ammar Karkar, Bo Liu, Alex Yakovlev, Georges G. E. Gielen, Vic Grout:
Network on Chip optimization based on surrogate model assisted evolutionary algorithms. IEEE Congress on Evolutionary Computation 2014: 3266-3271 - [c177]Peng Zhu, Xinpeng Xing, Georges G. E. Gielen:
A 40MHz-BW 35fJ/step-FoM nonlinearity-cancelling two-step ADC with dual-input VCO-based quantizer. ESSCIRC 2014: 63-66 - [c176]Anthony Coyette, Georges G. E. Gielen, Ronny Vanhooren, Wim Dobbelaere:
Optimization of analog fault coverage by exploiting defect-specific masking. ETS 2014: 1-6 - [c175]Iman Khajenasiri, Edoardo Patti, Marco Jahn, Andrea Acquaviva, Marian Verhelst, Enrico Macii, Georges G. E. Gielen:
Design and implementation of a multi-standard event-driven energy management system for smart buildings. GCCE 2014: 20-21 - [c174]Dimitri de Jonghe, Georges G. E. Gielen, Renaud Gillon:
Automatic generation of electro-thermal models with TRAPPIST. ICECS 2014: 842-845 - [c173]Florian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene:
Design of a frequency reference based on a PVT-independent transmission line delay. ISCAS 2014: 1772-1775 - [c172]Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette, Baris Esen:
Design and test of analog circuits towards sub-ppm level. ITC 2014: 1-2 - 2013
- [j69]Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen:
Supply-Noise-Resilient Design of a BBPLL-Based Force-Balanced Wheatstone Bridge Interface in 130-nm CMOS. IEEE J. Solid State Circuits 48(11): 2618-2627 (2013) - [j68]Thi Kim Thoa Nguyen, Silke Musa, Wolfgang Eberle, Carmen Bartic, Georges G. E. Gielen:
Mixed-signal template-based reduction scheme for stimulus artifact removal in electrical stimulation. Medical Biol. Eng. Comput. 51(4): 449-458 (2013) - [j67]Jelle Van Rethy, Hans Danneels, Georges G. E. Gielen:
Performance Analysis of Energy-Efficient BBPLL-Based Sensor-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(8): 2130-2138 (2013) - [j66]Maarten De Bock, Xinpeng Xing, Ludo Weyten, Georges G. E. Gielen, Pieter Rombouts:
Calibration of DAC Mismatch Errors in ΣΔ ADCs Based on a Sine-Wave Measurement. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 567-571 (2013) - [j65]Bo Liu, Qingfu Zhang, Francisco V. Fernández, Georges G. E. Gielen:
An Efficient Evolutionary Algorithm for Chance-Constrained Bi-Objective Stochastic Optimization. IEEE Trans. Evol. Comput. 17(6): 786-796 (2013) - [j64]Soheil Radiom, Majid Baghaei Nejad, Hadi Aliakbarian, Li-Rong Zheng, Guy A. E. Vandenbosch, Georges G. E. Gielen:
Miniaturization of UWB Antennas and its Influence on Antenna-Transceiver Performance in Impulse-UWB Communication. Wirel. Pers. Commun. 71(4): 2913-2935 (2013) - [c171]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Sacha: the Stanford carbon nanotube controlled handshaking robot. DAC 2013: 124:1-124:3 - [c170]Georges G. E. Gielen, Elie Maricau:
Stochastic degradation modeling and simulation for analog integrated circuits in nanometer CMOS. DATE 2013: 326-331 - [c169]Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen:
A low-power and low-voltage BBPLL-based sensor interface in 130nm CMOS for wireless sensor networks. DATE 2013: 1431-1435 - [c168]Dimitri de Jonghe, Dirk Deschrijver, Tom Dhaene, Georges G. E. Gielen:
Extracting analytical nonlinear models from analog circuits by recursive vector fitting of transfer function trajectories. DATE 2013: 1448-1453 - [c167]Jan Verveckken, Frederik Geth, Borbála Hunyadi, Jef Beerten, Niels Leemput, Juan Van Roy, Pieter Tielens, Valentijn De Smedt, Sandro Iacovella, Ninah Koolen, Hans De Clercq, Johan Driesen, Georges G. E. Gielen, Robert Puers, Joos Vandewalle, Sabine Van Huffel, Ronnie Belmans, Geert Deconinck, Wim Dehaene:
Developing engineering-oriented educational workshops within a student branch. EUROCON 2013: 933-940 - [c166]Swaraj Mahato, Georges G. E. Gielen:
Impact of transistor aging on RF low noise amplifier performance of 28nm technology: Reliability assessment. ICECS 2013: 413-416 - [c165]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon-nanotube FETs. ISSCC 2013: 112-113 - [c164]Carolina Mora Lopez, Alexandru Andrei, Srinjoy Mitra, Marleen Welkenhuysen, Wolfgang Eberle, Carmen Bartic, Robert Puers, Refet Firat Yazicioglu, Georges G. E. Gielen:
An implantable 455-active-electrode 52-channel CMOS neural probe. ISSCC 2013: 288-289 - [c163]Georges G. E. Gielen:
Timing-based integrated sensor interfaces: Hype or promise? IWASI 2013: 161 - [c162]Vladimir Ceperic, Georges G. E. Gielen, Adrijan Baric:
Black-Box Modelling of AC-DC Rectifiers for RFID Applications Using Support Vector Regression Machines. UKSim 2013: 815-819 - 2012
- [j63]Vladimir Ceperic, Georges G. E. Gielen, Adrijan Baric:
Recurrent sparse support vector regression machines trained by active learning in the time-domain. Expert Syst. Appl. 39(12): 10933-10942 (2012) - [j62]Vladimir Ceperic, Georges G. E. Gielen, Adrijan Baric:
Sparse multikernel support vector regression machines trained by active learning. Expert Syst. Appl. 39(12): 11029-11035 (2012) - [j61]Pieter De Wit, Georges G. E. Gielen:
Degradation-Resilient Design of a Self-Healing xDSL Line Driver in 90 nm CMOS. IEEE J. Solid State Circuits 47(7): 1757-1767 (2012) - [j60]Carolina Mora Lopez, Dimiter Prodanov, Dries Braeken, Ivan Gligorijevic, Wolfgang Eberle, Carmen Bartic, Robert Puers, Georges G. E. Gielen:
A Multichannel Integrated Circuit for Electrical Recording of Neural Activity, With Independent Channel Programmability. IEEE Trans. Biomed. Circuits Syst. 6(2): 101-110 (2012) - [j59]Bo Liu, Noël Deferm, Dixian Zhao, Patrick Reynaert, Georges G. E. Gielen:
An Efficient High-Frequency Linear RF Amplifier Synthesis Method Based on Evolutionary Computation and Machine Learning Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(7): 981-993 (2012) - [j58]Dimitri de Jonghe, Georges G. E. Gielen:
Characterization of Analog Circuits Using Transfer Function Trajectories. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1796-1804 (2012) - [c161]Bo Liu, Qingfu Zhang, Francisco V. Fernández, Georges G. E. Gielen:
Self-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algorithms. IEEE Congress on Evolutionary Computation 2012: 1-6 - [c160]Georges G. E. Gielen, Elie Maricau, Pieter De Wit:
Designing reliable analog circuits in an unreliable world. CICC 2012: 1-4 - [c159]Bo Liu, Hadi Aliakbarian, Soheil Radiom, Guy A. E. Vandenbosch, Georges G. E. Gielen:
Efficient multi-objective synthesis for microwave components based on computational intelligence techniques. DAC 2012: 542-548 - [c158]Elie Maricau, Dimitri de Jonghe, Georges G. E. Gielen:
Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection. DATE 2012: 745-750 - [c157]Bo Liu, Jarir Messaoudi, Georges G. E. Gielen:
A fast analog circuit yield estimation method for medium and high dimensional problems. DATE 2012: 751-756 - [c156]Adi Xhakoni, David San Segundo Bello, Georges G. E. Gielen:
Impact of TSV area on the dynamic range and frame rate performance of 3D-integrated image sensors. DATE 2012: 836-839 - [c155]Peng Gao, Xinpeng Xing, Jan Craninckx, Georges G. E. Gielen:
Design of an intrinsically-linear double-VCO-based ADC with 2nd-order noise shaping. DATE 2012: 1215-1220 - [c154]Dimitri de Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos:
Advances in variation-aware modeling, verification, and testing of analog ICs. DATE 2012: 1615-1620 - [c153]Carolina Mora Lopez, Marleen Welkenhuysen, Silke Musa, Wolfgang Eberle, Carmen Bartic, Robert Puers, Georges G. E. Gielen:
Towards a noise prediction model for in vivo neural recording. EMBC 2012: 759-762 - [c152]Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene:
A 127 μW exact timing reference for Wireless Sensor Networks based on injection locking. ESSCIRC 2012: 262-264 - [c151]Swaraj Mahato, Pieter De Wit, Elie Maricau, Georges G. E. Gielen:
Offset measurement method for accurate characterization of BTI-induced degradation in opamps. ICECS 2012: 661-664 - 2011
- [j57]Elie Maricau, Georges G. E. Gielen:
Computer-Aided Analog Circuit Design for Reliability in Nanometer CMOS. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(1): 50-58 (2011) - [j56]Bo Liu, Francisco V. Fernández, Georges G. E. Gielen:
Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(6): 793-805 (2011) - [j55]Bo Liu, Dixian Zhao, Patrick Reynaert, Georges G. E. Gielen:
Synthesis of Integrated Passive Components for High-Frequency RF ICs Based on Evolutionary Computation and Machine Learning Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(10): 1458-1468 (2011) - [j54]Athanasios Stefanou, Georges G. E. Gielen:
A Volterra Series Nonlinear Model of the Sampling Distortion in Flash ADCs Due to Substrate Noise Coupling. IEEE Trans. Circuits Syst. II Express Briefs 58-II(12): 877-881 (2011) - [j53]Bart De Vuyst, Pieter Rombouts, Georges G. E. Gielen:
A Rigorous Approach to the Robust Design of Continuous-Time Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(12): 2829-2837 (2011) - [j52]Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen:
Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks. IEEE Trans. Evol. Comput. 15(4): 557-570 (2011) - [c150]Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene:
A 0.6V to 1.6V, 46μW voltage and temperature independent 48 MHz pulsed LC oscillator for RFID tags. A-SSCC 2011: 109-112 - [c149]Xinpeng Xing, Maarten De Bock, Pieter Rombouts, Georges G. E. Gielen:
A 40MHz 12bit 84.2dB-SFDR continuous-time delta-sigma modulator in 90nm CMOS. A-SSCC 2011: 249-252 - [c148]Carolina Mora Lopez, Silke Musa, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle:
Systematic design of a programmable low-noise CMOS neural interface for cell activity recording. DATE 2011: 818-823 - [c147]Bo Liu, Ying He, Patrick Reynaert, Georges G. E. Gielen:
Global optimization of integrated transformers for high frequency microwave circuits using a Gaussian process based surrogate model. DATE 2011: 1101-1106 - [c146]Elie Maricau, Georges G. E. Gielen:
Stochastic circuit reliability analysis. DATE 2011: 1285-1290 - [c145]Georges G. E. Gielen, Elie Maricau, Pieter De Wit:
Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation. DATE 2011: 1474-1479 - [c144]Elie Maricau, Georges G. E. Gielen:
Transistor aging-induced degradation of analog circuits: Impact analysis and design guidelines. ESSCIRC 2011: 243-246 - [c143]Pieter De Wit, Georges G. E. Gielen:
A failure-resilient xDSL line driver with on-chip degradation monitor. ESSCIRC 2011: 247-250 - [c142]Hans Danneels, Kristof Coddens, Georges G. E. Gielen:
A fully-digital, 0.3V, 270 nW capacitive sensor interface without external references. ESSCIRC 2011: 287-290 - [c141]Dimitri de Jonghe, Georges G. E. Gielen:
Efficient analytical macromodeling of large analog circuits by Transfer Function Trajectories. ICCAD 2011: 91-94 - [c140]