EURO-DAC 1990: Glasgow, Scotland, UK

Tools for testing

Databases and frameworks

Formal verification

Scheduling and allocation I

Simulation languages

Cell generators

Scheduling and allocation II

Description of design systems and methodologies

Compaction and circuit packing

Combinational logic design optimization

Simulation I

Floorplanning

High level synthesis systems

Simulation II

Placement

Delay and CMOS testing

Databases and datastructuring

Physical verification and simulation

Low-level fault modelling and test generation

Selected topics in CAD systems

Routing

Test pattern generation and fault simulation

Procedural interfaces

Timing analysis and verification

Finit state machine synthesis I

Simulation modelling

Physical design optimization

Finite state machine synthesis - II

Verification and PLA testing

Novel approaches in placement

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