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ORCIDDATE 2015: Grenoble, France
- Wolfgang Nebel, David Atienza:
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015. ACM 2015, ISBN 978-3-9815370-4-8
Adaptability for low power computing
- Jianfeng Liu, Mi-Suk Hong, Kyung Tae Do, Jung Yun Choi, Jaehong Park, Mohit Kumar, Manish Kumar, Nikhil Tripathi, Abhishek Ranjan:
Clock domain crossing aware sequential clock gating. 1-6 - Hehe Li, Yongpan Liu, Qinghang Zhao, Yizi Gu, Xiao Sheng, Guangyu Sun, Chao Zhang, Meng-Fan Chang, Rong Luo, Huazhong Yang:
An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes. 7-12 - Chenchen Fu, Minming Li, Chun Jason Xue:
Race to idle or not: balancing the memory sleep time with DVS for energy minimization. 13-18 - Xue Lin, Yanzhi Wang, Massoud Pedram, Jaemin Kim, Naehyuck Chang:
Event-driven and sensorless photovoltaic system reconfiguration for electric vehicles. 19-24
System level design methods
- Farzad Samie, Lars Bauer, Chih-Ming Hsieh, Jörg Henkel:
Online binding of applications to multiple clock domains in shared FPGA-based systems. 25-30 - Stefan Hadjis, Andrew Canis, Ryoya Sobue, Yuko Hara-Azumi, Hiroyuki Tomiyama, Jason Helge Anderson:
Profiling-driven multi-cycling in FPGA high-level synthesis. 31-36 - Jung-Eun Kim, Tarek F. Abdelzaher, Lui Sha:
Schedulability bound for integrated modular avionics partitions. 37-42
Automotive systems and smart energy systems
- Anup Das, Akash Kumar, Bharadwaj Veeravalli, Rishad Ahmed Shafik, Geoff V. Merrett, Bashir M. Al-Hashimi:
Workload uncertainty characterization and adaptive frequency scaling for energy minimization of embedded systems. 43-48 - Jan R. Seyler, Thilo Streichert, Michael Glaß, Nicolas Navet, Jürgen Teich:
Formal analysis of the startup delay of SOME/IP service discovery. 49-54 - Sivakumar Thangamuthu, Nicola Concer, Pieter J. L. Cuijpers, Johan J. Lukkien:
Analysis of ethernet-switch traffic shapers for in-vehicle networking applications. 55-60 - Christian Herber, Andre Oliver Richter, Thomas Wild, Andreas Herkersdorf:
Real-time capable CAN to AVB ethernet gateway using frame aggregation and scheduling. 61-66
Power of assertions
- Alessandro Danese, Tara Ghasempouri, Graziano Pravadelli:
Automatic extraction of assertions from execution traces of behavioural models. 67-72 - Pouya Taatizadeh, Nicola Nicolici:
A methodology for automated design of embedded bit-flips detectors in post-silicon validation. 73-78 - Monica Farkash, Bryan G. Hickerson, Balavinayagam Samynathan:
Data mining diagnostics and bug MRIs for HW bug localization. 79-84 - Nicola Bombieri, Riccardo Filippozzi, Graziano Pravadelli, Francesco Stefanni:
RTL property abstraction for TLM assertion-based verification. 85-90
Design and analysis of dependable systems
- Carles Hernández, Jaume Abella:
Low-cost checkpointing in automotive safety-relevant systems. 91-96 - Faramarz Khosravi, Malte Müller, Michael Glaß, Jürgen Teich:
Uncertainty-aware reliability analysis and optimization. 97-102 - Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham:
Efficient soft error vulnerability estimation of complex designs. 103-108 - Xuanle Ren, Vítor Grade Tavares, R. D. (Shawn) Blanton:
Detection of illegitimate access to JTAG via statistical learning in chip. 109-114
Compilation and code transformations for reconfigurable computing
- Shouyi Yin, Dajiang Liu, Leibo Liu, Shaojun Wei, Yike Guo:
Joint affine transformation and loop pipelining for mapping nested loop on CGRAs. 115-120 - ShriHari RajendranRadhika, Aviral Shrivastava, Mahdi Hamzeh:
Path selection based acceleration of conditionals in CGRAs. 121-126 - Meha Kainth, Lekshmi Krishnan, Chaitra Narayana, Sandesh Gubbi Virupaksha, Russell Tessier:
Hardware-assisted code obfuscation for FPGA soft microprocessors. 127-132
Passive implementation attacks and countermeasures
- Valentina Banciu, Elisabeth Oswald, Carolyn Whitnall:
Reliable information extraction for single trace attacks. 133-138 - Daehyun Strobel, Florian Bache, David F. Oswald, Falk Schellenberg, Christof Paar:
Scandalee: a side-channel-based disassembler using local electromagnetic emanations. 139-144 - Santos Merino Del Pozo
, François-Xavier Standaert, Dina Kamel, Amir Moradi:
Side-channel attacks from static power: when should we care? 145-150 - Jinyong Lee, Yongje Lee, Hyungon Moon, Ingoo Heo, Yunheung Paek:
Extrax: security extension to extract cache resident information for snoop-based external monitors. 151-156
Loop acceleration
- Pham Nam Khanh, Amit Kumar Singh, Akash Kumar, Khin Mi Mi Aung:
Exploiting loop-array dependencies to accelerate the design space exploration with high level synthesis. 157-162 - Alessandro Cilardo, Luca Gallo:
Interplay of loop unrolling and multidimensional memory partitioning in HLS. 163-168 - Maurice Peemen, Bart Mesman, Henk Corporaal:
Inter-tile reuse optimization applied to bandwidth constrained embedded accelerators. 169-174
Tackling memory walls with emerging architectures and technologies
- Yuan Yao, Guanhua Wang, Zhiguo Ge, Tulika Mitra, Wenzhi Chen, Naxin Zhang:
SelectDirectory: a selective directory for cache coherence in many-core architectures. 175-180 - Ashish Ranjan, Shankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Vijay S. Pai, Kaushik Roy, Anand Raghunathan:
DyReCTape: a <u>dy</u>namically <u>re</u>configurable <u>c</u>ache using domain wall memory <u>tape</u>s. 181-186 - Shouyi Yin, Jiakun Li, Leibo Liu, Shaojun Wei, Yike Guo:
Cooperatively managing dynamic writeback and insertion policies in a last-level DRAM cache. 187-192 - Manil Dev Gomony, Jamie Garside, Benny Akesson, Neil C. Audsley, Kees Goossens:
A generic, scalable and globally arbitrated memory tree for shared DRAM access in real-time systems. 193-198
Breaking simulation boundaries
- Mingsong Chen, Daian Yue, Xiaoke Qin, Xin Fu, Prabhat Mishra:
Variation-aware evaluation of MPSoC task allocation and scheduling strategies using statistical model checking. 199-204 - Xiaoming Chen, Yu Wang, Huazhong Yang:
A fast parallel sparse solver for SPICE-based circuit simulators. 205-210 - Xinke Chen, Guangfei Zhang, Huandong Wang, Ruiyang Wu, Peng Wu, Longbing Zhang:
MRP: mix real cores and pseudo cores for FPGA-based chip-multiprocessor simulation. 211-216 - Christoph Gerum, Oliver Bringmann, Wolfgang Rosenstiel:
Source level performance simulation of GPU cores. 217-222
Model-based analysis and verification
- Nan Guan, Yue Tang, Yang Wang, Wang Yi:
Delay analysis of structural real-time workload. 223-228 - Daniel Kroening, Lihao Liang, Tom Melham, Peter Schrammel, Michael Tautschnig:
Effective verification of low-level software with nested interrupts. 229-234 - BaekGyu Kim, Lu Feng, Linh T. X. Phan, Oleg Sokolsky, Insup Lee:
Platform-specific timing verification framework in model-based implementation. 235-240 - Andreas Ibing:
Architecture description language based retargetable symbolic execution. 241-246
Hot topic - design methodologies for a cyber-physical systems approach to personalized medicine-on-a-chip: challenges and opportunities
- Mohamed Ibrahim, Krishnendu Chakrabarty:
Error recovery in digital microfluidics for personalized medicine. 247-252 - Paul Bogdan:
A cyber-physical systems approach to personalized medicine: challenges and opportunities for noc-based multicore platforms. 253-258 - Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
On-chip network-enabled many-core architectures for computational biology applications. 259-264
Interactive presentations
- Fabian Oboril, Jos Ewert, Mehdi Baradaran Tahoori:
High-resolution online power monitoring for modern microprocessors. 265-268 - Andres Gomez, Christian Pinto, Andrea Bartolini, Davide Rossi, Luca Benini, Hamed Fatemi, José Pineda de Gyvez:
Reducing energy consumption in microcontroller-based platforms with low design margin co-processors. 269-272 - Mahdi Jelodari Mamaghani, Jim D. Garside, Doug A. Edwards:
De-elastisation: from asynchronous dataflows to synchronous circuits. 273-276 - Jannis Stoppe, Robert Wille, Rolf Drechsler:
Automated feature localization for dynamically generated SystemC designs. 277-280 - Matthias Kauer, Swaminathan Narayanaswamy, Martin Lukasiewycz, Sebastian Steinhorst, Samarjit Chakraborty:
Inductor optimization for active cell balancing using geometric programming. 281-284 - Philipp Mundhenk, Sebastian Steinhorst, Martin Lukasiewycz, Suhaib A. Fahmy, Samarjit Chakraborty:
Lightweight authentication for secure automotive networks. 285-288 - Michael Shoniker, Bruce F. Cockburn, Jie Han, Witold Pedrycz:
Minimizing the number of process corner simulations during design verification. 289-292 - Ke Chen, Fabrizio Lombardi, Jie Han:
An approximate voting scheme for reliable computing. 293-296 - Rochus Nowosielski, Lukas Gerlach, Stephan Bieband, Guillermo Payá Vayá, Holger Blume:
FLINT: layout-oriented FPGA-based methodology for fault tolerant ASIC design. 297-300 - Sam Skalicky, Andrew G. Schmidt, Sonia López, Matthew French:
A unified hardware/software MPSoC system construction and run-time framework. 301-304 - Shakith Fernando, Mark Wijtvliet, Cedric Nugteren, Akash Kumar, Henk Corporaal:
(AS)2: accelerator synthesis using algorithmic skeletons for rapid design space exploration. 305-308 - Philipp Niemann, Frank Hilken, Martin Gogolla, Robert Wille:
Assisted generation of frame conditions for formal models. 309-312 - Julien Deantoni, Papa Issa Diallo, Ciprian Teodorov, Joël Champeau, Benoît Combemale:
Towards a meta-language for the concurrency concern in DSLs. 313-316 - Antoine Faravelon, Nicolas Fournel, Frédéric Pétrot:
Fast and accurate branch predictor simulation. 317-320 - Wisam Kadry, Dmitry Krestyashyn, Arkadiy Morgenshtein, Amir Nahir, Vitali Sokhin, Jin Sung Park, Sung-Boem Park, Wookyeong Jeong, Jae-Cheol Son:
Comparative study of test generation methods for simulation accelerators. 321-324 - Wan-Chen Weng, Yung-Chih Chen, Jui-Hung Chen, Ching-Yi Huang, Chun-Yao Wang:
Using structural relations for checking combinationality of cyclic circuits. 325-328 - Andrws Vieira, Pedro Faustini, Luigi Carro, Érika F. Cota:
NFRs early estimation through software metrics. 329-332
Implementation and verification of security components
- Charalambos Konstantinou, Anastasis Keliris, Michail Maniatakos:
Privacy-preserving functional IP verification utilizing fully homomorphic encryption. 333-338 - Ruan de Clercq, Sujoy Sinha Roy, Frederik Vercauteren, Ingrid Verbauwhede:
Efficient software implementation of ring-LWE encryption. 339-344 - Bohan Yang, Vladimir Rozic, Nele Mentens, Wim Dehaene, Ingrid Verbauwhede:
Embedded HW/SW platform for on-the-fly testing of true random number generators. 345-350
Multi-/manycore scheduling
- Chien-Hui Liao, Charles H.-P. Wen, Krishnendu Chakrabarty:
An online thermal-constrained task scheduler for 3D multi-core processors. 351-356 - Alexander Biewer, Benjamin Andres, Jens Gladigau, Torsten Schaub, Christian Haubelt:
A symbolic system synthesis approach for hard real-time systems based on coordinated SMT-solving. 357-362 - Xi Zhang, Haris Javaid, Muhammad Shafique, Jorgen Peddersen, Jörg Henkel, Sri Parameswaran:
E-pipeline: elastic hardware/software pipelines on a many-core fabric. 363-368
Exploring reliability and efficiency tradeoffs at the architectural level
- Jingweijia Tan, Zhi Li, Xin Fu:
Soft-error reliability and power co-optimization for GPGPUS register file using resistive memory. 369-374 - Kaige Yan, Xin Fu:
Energy-efficient cache design in emerging mobile platforms: the implications and optimizations. 375-380 - Jeremy Constantin, Lai Wang, Georgios Karakonstantis, Anupam Chattopadhyay, Andreas Burg:
Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment. 381-386 - Muhammad Shafique, Dennis Gnad, Siddharth Garg, Jörg Henkel:
Variability-aware dark silicon management in on-chip many-core systems. 387-392
Industrial test and validation experiments
- Alejandra Ruiz, Alberto Melzi, Tim Kelly:
Systematic application of ISO 26262 on a SEooC: Support by applying a systematic reuse approach. 393-396 - Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla:
Timing analysis of an avionics case study on complex hardware/software platforms. 397-402 - Torsten Reich, Benjamin Prautsch, Uwe Eichler, R. Buhl:
Silicon proof of the intelligent analog IP design flow for flexible automotive components. 403-404 - Fabien Teysseyre, David Navarro, Ian O'Connor, Francesco Cascio, Fabio Cenni, Olivier Guillaume:
Fast optical simulation from a reduced set of impulse responses using SystemC-AMS. 405-409 - Stephen Bergman, Gabor Bobok, Walter Kowalski, Shlomit Koyfman, Shiri Moran, Ziv Nevo, Avigail Orni, Viresh Paruthi, Wolfgang Roesner, Gil Shurek, Vasantha Vuyyuru:
Designer-level verification: an industrial experience story. 410-411 - Vibhu Sharma:
Minimum current consumption transition time optimization methodology for low power CTS. 412-416
Online testing and reliable memories
- Michail Mavropoulos, Georgios Keramidas, Dimitris Nikolos:
A defect-aware reconfigurable cache architecture for low-vccmin DVFS-enabled systems. 417-422 - Ying Zhang, Zebo Peng, Jianhui Jiang, Huawei Li, Masahiro Fujita:
Temperature-aware software-based self-testing for delay faults. 423-428 - T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi:
Operational fault detection and monitoring of a memristor-based LUT. 429-434 - Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Mohammad Fattah, Pasi Liljeberg, Juha Plosila, Zainalabedin Navabi, Hannu Tenhunen:
Power-aware online testing of manycore systems in the dark silicon era. 435-440
How resilient are emerging technologies?
- M. Saliva, Florian Cacho, Vincent Huard, X. Federspiel, D. Angot, Ahmed Benhassain, Alain Bravaix, Lorena Anghel:
Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI. 441-446 - Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras:
Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell. 447-452 - Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Fault modeling in controllable polarity silicon nanowire circuits. 453-458
Hardware trojan and active implementation attacks
- Prakash Dey, Abhishek Chakraborty, Avishek Adhikari, Debdeep Mukhopadhyay:
Improved practical differential fault analysis of grain-128. 459-464 - Masaru Oya, Youhua Shi, Masao Yanagisawa, Nozomu Togawa:
A score-based classification method for identifying hardware-trojans at gate-level netlists. 465-470 - Burçin Çakir, Sharad Malik:
Hardware Trojan detection for gate-level ICs using signal correlation based clustering. 471-476
Variability challenges in nanoscale circuits
- XianWei Zhang, Youtao Zhang, Bruce R. Childers, Jun Yang:
Exploiting DRAM restore time variations in deep sub-micron scaling. 477-482 - Zhe Wang, Xuan Wang, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong, Haoran Li, Rafael Kioji Vivas Maeda, Zhifei Wang:
Adaptively tolerate power-gating-induced power/ground noise under process variations. 483-488 - Adam Teman, Georgios Karakonstantis, Robert Giterman, Pascal Andreas Meinerzhagen, Andreas Peter Burg:
Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories. 489-494 - Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn:
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. 495-500
Emerging technologies for NoCs
- Luan H. K. Duong, Mahdi Nikdast, Jiang Xu, Zhehui Wang, Yvain Thonnart, Sébastien Le Beux, Peng Yang, Xiaowen Wu, Zhifei Wang:
Coherent crosstalk noise analyses in ring-based optical interconnects. 501-506 - Changlin Chen, Marius Enachescu, Sorin Dan Cotofana:
Enabling vertical wormhole switching in 3D NoC-bus hybrid systems. 507-512 - Andrea Mineo, Mohd Shahrizal Rusli, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono:
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures. 513-518
Critical embedded systems
- Timo Feld, Frank Slomka:
Sufficient response time analysis considering dependencies between rate-dependent tasks. 519-524 - Alessandro Biondi, Giorgio C. Buttazzo:
Engine control: task modeling and analysis. 525-530 - Andrea Höller, Nermin Kajtazovic, Tobias Rauter, Kay Römer, Christian Kreiner:
Evaluation of diverse compiling for software-fault detection. 531-536 - Eberle A. Rambo, Rolf Ernst:
Worst-case communication time analysis of networks-on-chip with shared virtual channels. 537-542
Analyzing and improving memories
- Charalampos Antoniadis, Georgios Karakonstantis, Nestor E. Evmorfopoulos, Andreas Peter Burg, George I. Stamoulis:
On the statistical memory architecture exploration and optimization. 543-548 - Hiromitsu Awano, Masayuki Hiromoto, Takashi Sato:
ECRIPSE: an efficient method for calculating RTN-induced failure probability of an SRAM cell. 549-554 - Jung-Hoon Kim, Sang-Hoon Kim, Jin-Soo Kim:
Subpage programming for extending the lifetime of NAND flash memory. 555-560
Architectures and design for cyber-physical systems
- Nikunj Bajaj, Pierluigi Nuzzo, Michael Masin, Alberto L. Sangiovanni-Vincentelli:
Optimized selection of reliable and cost-effective cyber-physical system architectures. 561-566 - Mengying Zhao, Qing'an Li, Mimi Xie, Yongpan Liu, Jingtong Hu, Chun Jason Xue:
Software assisted non-volatile register reduction for energy harvesting based cyber-physical system. 567-572 - Umar Waqas, Marc Geilen, Jack Kandelaars, Lou J. Somers, Twan Basten, Sander Stuijk, Patrick Vestjens, Henk Corporaal:
A re-entrant flowshop heuristic for online scheduling of the paper path in a large scale printer. 573-578 - Daniel Münch, Michael Paulitsch, Oliver Hanka, Andreas Herkersdorf:
MPIOV: scaling hardware-based I/O virtualization for mixed-criticality embedded real-time systems using non transparent bridges to (multi-core) multi-processor systems. 579-584
Interactive presentations
- Panasayya Yalla, Ekawat Homsirikamol, Jens-Peter Kaps:
Comparison of multi-purpose cores of Keccak and AES. 585-588 - Rafal Baranowski, Farshad Firouzi, Saman Kiamehr, Chang Liu, Mehdi Baradaran Tahoori, Hans-Joachim Wunderlich:
On-line prediction of NBTI-induced aging rates. 589-592 - Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu:
Retraining-based timing error mitigation for hardware neural networks. 593-596 - T. Berkin Cilingiroglu, Mahmoud Zangeneh, Aydan Uyar, W. Clem Karl, Janusz Konrad, Ajay Joshi, Bennett B. Goldberg, M. Selim Ünlü:
Dictionary-based sparse representation for resolution improvement in laser voltage imaging of CMOS integrated circuits. 597-600 - Philipp Jovanovic, Ilia Polian:
Fault-based attacks on the Bel-T block cipher family. 601-604 - Rong Ye, Feng Yuan, Jie Zhang, Qiang Xu:
On the premises and prospects of timing speculation. 605-608 - Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene:
Impact of interconnect multiple-patterning variability on SRAMs. 609-612 - Anouk Van Laer, Chamath Ellawala, Muhammad Ridwan Madarbux, Philip M. Watts, Timothy M. Jones:
Coherence based message prediction for optically interconnected chip multiprocessors. 613-616 - Roberto Vargas, Eduardo Quiñones, Andrea Marongiu:
OpenMP and timing predictability: a possible union? 617-620 - Georg Macher, Harald Sporer, Reinhard Berlach, Eric Armengaud, Christian Kreiner:
SAHARA: a security-aware hazard and risk analysis method. 621-624 - Santanu Sarma, Nikil D. Dutt, Puneet Gupta, Nalini Venkatasubramanian, Alexandru Nicolau:
Cyberphysical-system-on-chip (CPSoC): a self-aware MPSoC paradigm with cross-layer virtual sensing and actuation. 625-628 - Andrea Corna, L. Fontana, A. A. Nacci, Donatella Sciuto:
Occupancy detection via iBeacon on Android devices for smart building management. 629-632 - Jason Kane, Qing Yang, Robert Hernandez, Willard Simoneau, Matthew Seaton:
A neural machine interface architecture for real-time artificial lower limb control. 633-636
Special day hot topic: platforms for the IoT
- Jan M. Rabaey:
The human intranet: where swarms and humans meet. 637-640
Physical unclonable functions
- Phuong Ha Nguyen, Durga Prasad Sahoo, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay:
Efficient attacks on robust ring oscillator PUF with enhanced challenge-response set. 641-646