DFT 2006: Arlington, Virginia, USA

Invited Talk

Adaptive Design and Gate Level Redundancy

Delay Test

Emerging Technologies

Test Compression

Invited Talk

Defect Tolerance and Error Correction

BIST and Pseudo-Functional Test

Reliability Evaluation and Analysis

Approaches for Soft Errors

Interactive Papers

Diagnosis

Defect and Fault Tolerance in Sensors and NOCs

Test Techniques

Processor Checking and Jitter

Fault Tolerance Designs

a service of Schloss Dagstuhl - Leibniz Center for Informatics