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ORCID26th IOLTS 2020: Napoli, Italy
- 26th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2020, Napoli, Italy, July 13-15, 2020. IEEE 2020, ISBN 978-1-7281-8187-5
- Shamik Kundu, Ahmet Soyyigit, Khaza Anuarul Hoque, Kanad Basu:
High-level Modeling of Manufacturing Faults in Deep Neural Network Accelerators. 1-4 - Irith Pomeranz:
Storage Based Built-In Test Pattern Generation Method for Close-to-Functional Broadside Tests. 1-4 - Irith Pomeranz, Sandip Kundu:
Reduced Fault Coverage as a Target for Design Scaffolding Security. 1-6 - Han Wang, Hossein Sayadi, Setareh Rafatirad, Avesta Sasan, Houman Homayoun:
SCARF: Detecting Side-Channel Attacks at Real-time using Low-level Hardware Features. 1-6 - Pablo Ilha Vaz, Patrick Girard
, Arnaud Virazel, Hassen Aziza:
A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications. 1-6 - Yukiya Miura, Yuya Kinoshita:
Soft Error Tolerance of Power-Supply-Noise Hardened Latches. 1-6 - Josie E. Rodriguez Condia, Matteo Sonza Reorda:
On the testing of special memories in GPGPUs. 1-6 - Kathrin Garb, Johannes Obermaier:
Temporary Laser Fault Injection into Flash Memory: Calibration, Enhanced Attacks, and Countermeasures. 1-7 - Basim Shanyour, Spyros Tragoudas:
Broadside ATPG for Low Power Trojans Detection using Built-in Current Sensors. 1-3 - Ahmet Cagri Bagbaba, Maksim Jenihhin, Raimund Ubar, Christian Sauer:
Representing Gate-Level SET Faults by Multiple SEU Faults at RTL. 1-6 - Aleksandar Simevski, Oliver Schrape, Carlos Benito, Milos Krstic, Marko S. Andjelkovic:
PISA: Power-robust Multiprocessor Design for Space Applications. 1-6 - Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yukiya Miura:
On-Chip Delay Measurement for Degradation Detection And Its Evaluation under Accelerated Life Test. 1-6 - Yufan Lu, Xiaojun Zhai, Sangeet Saha, Shoaib Ehsan, Klaus D. McDonald-Maier:
A self-scrubbing scheme for embedded systems in radiation environments. 1-4 - Ana Lasheras, Ramon Canal, Eva Rodríguez, Luca Cassano:
Lightweight Protection of Cryptographic Hardware Accelerators against Differential Fault Analysis. 1-6 - Michele Portolan, R. Silveira Feitoza, Ghislain Takam Tchendjou, Vincent Reynaud, Kalpana Senthamarai Kannan, Manuel J. Barragán, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Régis Leveugle, Salvador Mir:
A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System. 1-4 - Christopher Münch, Mehdi B. Tahoori:
Defect Characterization of Spintronic-based Neuromorphic Circuits. 1-4 - Florence Azaïs, Serge Bernard, Mariane Comte, Bastien Deveautour, Sophie Dupuis, Hassan El Badawi, Marie-Lise Flottes, Patrick Girard, Vincent Kerzèrho, Laurent Latorre, François Lefèvre, Bruno Rouzeyre, Emanuele Valea, T. Vayssade, Arnaud Virazel:
Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs. 1-4 - Chandramouli N. Amarnath, Md Imran Momtaz, Abhijit Chatterjee:
Encoded Check Driven Concurrent Error Detection in Particle Filters for Nonlinear State Estimation. 1-6 - Rishad A. Shafik, Adrian Wheeldon, Alex Yakovlev:
Explainability and Dependability Analysis of Learning Automata based AI Hardware. 1-4 - Yuki Ikegaya, Toshinori Hosokawa, Yuta Ishiyama, Hiroshi Yamazaki:
A Test Sensitization State Compaction Method on Controller Augmentation. 1-6 - Vishal Gupta, Saurabh Khandelwal, Giulio Panunzi, Eugenio Martinelli, Said Hamdioui, Abusaleh M. Jabir, Marco Ottavi:
Yield Estimation of a Memristive Sensor Array. 1-2 - Homer Gamil, Pranav Mehta, Eduardo Chielle, Adriano Di Giovanni, Mohammed Nabeel, Francesco Arneodo, Michail Maniatakos:
Muon-Ra: Quantum random number generation from cosmic rays. 1-6 - Quang-Linh Nguyen, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre:
A Secure Scan Controller for Protecting Logic Locking. 1-6 - Panagiota Papavramidou, Michael Nicolaidis, Patrick Girard:
An ECC-Based Repair Approach with an Offset-Repair CAM for Mitigating the MBUs Affecting Repair CAM. 1-6 - Kazunari Takasaki, Kento Hasegawa, Ryoichi Kida, Nozomu Togawa:
An Anomalous Behavior Detection Method for IoT Devices by Extracting Application-Specific Power Behaviors. 1-4 - Ambika Prasad Shah, Patrick Girard:
Impact of Aging on Soft Error Susceptibility in CMOS Circuits. 1-4 - Muhammad Abdullah Hanif, Muhammad Shafique:
Dependable Deep Learning: Towards Cost-Efficient Resilience of Deep Neural Network Accelerators against Soft Errors and Permanent Faults. 1-4 - Toshinori Hosokawa, Kenichiro Misawa, Hiroshi Yamazaki, Masayoshi Yoshimura, Masayuki Arai:
A Low Capture Power Oriented X-Identification-Filling Co-Optimization Method. 1-4 - C. P. Ravikumar:
Industrial Practices in Low-Power Robust Design. 1-4 - Sarah Azimi, Corrado De Sio, Luca Sterpone:
In-Circuit Mitigation Approach of Single Event Transients for 45nm Flip-Flops. 1-6 - Zahra Kazemi, Mahdi Fazeli, David Hély, Vincent Beroulle:
Hardware Security Vulnerability Assessment to Identify the Potential Risks in A Critical Embedded Application. 1-6 - Tatsuki Kurihara, Kento Hasegawa, Nozomu Togawa:
Evaluation on Hardware-Trojan Detection at Gate-Level IP Cores Utilizing Machine Learning Methods. 1-4 - Abhishek Jain, Andrea Veggetti, Dennis Crippa, Antonio Benfante, Simone Gerardin, Marta Bagatin:
Single Phase Clock Based Radiation Tolerant D Flip-flop Circuit. 1-6 - Antonio Leonel Hernández Martínez, S. Saqib Khursheed, Daniele Rossi:
Leveraging CMOS Aging for Efficient Microelectronics Design. 1-4 - João Paulo Cardoso de Lima, Rafael Fão de Moura, Luigi Carro:
Leveraging reuse and endurance by efficient mapping and placement for NVM-based FPGAs. 1-6 - Sarah A. El-Sayed, Theofilos Spyrou, Antonios Pavlidis, Engin Afacan, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos:
Spiking Neuron Hardware-Level Fault Modeling. 1-4 - Cristiana Bolchini, Luca Cassano, Andrea Mazzeo, Antonio Miele:
Error Modeling for Image Processing Filters accelerated onto SRAM-based FPGAs. 1-6 - Tommaso Melis, Emmanuel Simeu, Etienne Auvray:
Automatic Fault Simulators for Diagnosis of Analog Systems. 1-6 - Fernando Fernandes dos Santos, Marcelo Brandalero, Pedro Martins Basso, Michael Hübner, Luigi Carro, Paolo Rech:
Reduced-Precision DWC for Mixed-Precision GPUs. 1-6 - Karthik Pattabiraman, Guanpeng Li, Zitao Chen:
Error Resilient Machine Learning for Safety-Critical Systems: Position Paper. 1-4 - Dan Alexandrescu, Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux:
Enabling Cross-Layer Reliability and Functional Safety Assessment Through ML-Based Compact Models. 1-6 - Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone:
Machine Learning Clustering Techniques for Selective Mitigation of Critical Design Features. 1-7 - Eduardo Weber Wächter, Server Kasap, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier:
A Framework and Protocol for Dynamic Management of Fault Tolerant Systems in Harsh Environments. 1-6 - Leila Bagheriye, Ghazanfar Ali, Hans G. Kerkhoff:
Life-Time Prognostics of Dependable VLSI-SoCs using Machine-learning. 1-4 - Christian Schulz-Hanke:
Fast BCH 1-Bit Error Correction Combined with Fast Multi-Bit Error Detection. 1-5
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