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ORCID24th DSD 2021: Palermo, Spain
- Francesco Leporati, Salvatore Vitabile, Amund Skavhaug:
24th Euromicro Conference on Digital System Design, DSD 2021, Virtual Event / Palermo, Sicily, Italy, September 1-3, 2021. IEEE 2021, ISBN 978-1-6654-2703-6 - Arne Kreddig
, Simon Conrady, Manu Manuel, Walter Stechele:
A Framework for Hardware-Accelerated Design Space Exploration for Approximate Computing on FPGA. 1-8 - Gianluca Bellocchi, Alessandro Capotondi, Francesco Conti, Andrea Marongiu:
A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment. 9-17 - Ercan Kalali, Rene van Leuken:
A Power-Efficient Parameter Quantization Technique for CNN Accelerators. 18-23 - Toms Sturmanis, Rihards Novickis:
An efficient FPGA-based co-processor for feature point detection and tracking. 24-29 - Muhammad Ali, Matthias von Ameln, Diana Goehringer:
Vector Processing Unit: A RISC-V based SIMD Co-processor for Embedded Processing. 30-34 - Xiaoyi Ling, Takahiro Notsu, Jason Helge Anderson:
An Open-Source Framework for the Generation of RISC-V Processor + CGRA Accelerator Systems. 35-42 - Marcin Kowalczyk, Tomasz Kryjak:
A Connected Component Labelling algorithm for a multi-pixel per clock cycle video stream. 43-50 - Ievgeniia Maksymova, Christian Steger, Norbert Druml:
An adaptive pixel accumulation algorithm for a 1D micro-scanning LiDAR. 51-57 - Filippo Sciamanna, Michele Zanella, Giuseppe Massari, William Fornaciari:
Managing the Resource Continuum in a Real Video Surveillance Scenario. 58-61 - Padmanabhan Balasubramanian, Anna Bernasconi, Valentina Ciriani, Tiziano Villa:
A Boolean Heuristic for Disjoint SOP Synthesis. 62-68 - Jitka Kocnová, Zdenek Vasícek:
Resynthesis of logic circuits using machine learning and reconvergent paths. 69-76 - Viktor Teren, Jordi Cortadella, Tiziano Villa:
Decomposition of transition systems into sets of synchronizing state machines. 77-81 - Omair Rafique, Yu Bai, Klaus Schneider, Guangxi Yan:
Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns. 82-89 - Tadej Murovic, Andrej Trost:
Massively parallel binary neural network inference for detecting ships in FPGA systems on the edge. 90-96 - Shivani Shah, Vaibhavi Mathur, Sahithi Meenakshi Vutakuru, Kavya Borra, Nanditha P. Rao:
Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher. 97-100 - Alessandro Cilardo, Stefano Mercogliano:
FPGA-based real-time monitoring support for CAN applications. 101-106 - Tobias Dörr, Timo Sandmann, Hannes Mohr, Jürgen Becker:
Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks. 107-114 - Troya Çagil Köylü, Hans Okkerman, Cezar Rodolfo Wedig Reinbrecht, Said Hamdioui, Mottaqiallah Taouil:
Protecting IoT Devices through a Hardware-driven Memory Verification. 115-122 - Gianluca Martino, Arne Grünhagen, Julien Branlard, Annika Eichler, Görschwin Fey, Holger Schlarb:
Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems. 123-130 - Jintaek Kang, Changjae Yi, Keonjoo Lee, Seungwook Lee, Soojung Ryu, Soonhoi Ha:
Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration. 131-138 - M. K. Aparna Nair, P. Veda Bhanu, Soumya J., Linga Reddy Cenkeramaddi:
Architectural Implementation of a Reconfigurable NoC Design for Multi-Applications. 139-142 - Bita Dabiri, Mehdi Modarressi, Masoud Daneshtalab:
Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design. 143-149 - Hai-Dang Vu, Sébastien Le Nours, Sébastien Pillement:
Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems. 150-157 - Veronia Iskandar, Mohamed A. Abd El Ghany, Diana Goehringer:
Near-Data-Processing Architectures Performance Estimation and Ranking using Machine Learning Predictors. 158-165 - Stefan Scharoba, Kai-Uwe Basener, Jens Bielefeldt, Hans-Werner Wiesbrock, Michael Hübner:
Towards Machine Learning Support for Embedded System Tests. 166-173 - Nikos Petrellis, Stavros Zogas, Panagiotis Christakos, Georgios Keramidas, Panagiotis Mousouliotis, Nikolaos S. Voros, Christos P. Antonopoulos:
High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm. 174-177 - Matteo Bertolucci, Luca Fanucci:
Highly Parallel Sample Rate Converter for Space Telemetry Transmitters. 178-181 - Caterina Nahler, Armin Schoenlieb, Sebastian Handel, Hannes Plank, Christian Steger, Norbert Druml:
Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras. 182-186 - Wenyao Zhu, Zhonghai Lu:
Evaluation of Time Series Clustering on Embedded Sensor Platform. 187-191 - Gabriella D'Andrea, Giacomo Valente, Luigi Pomante, Tania Di Mascio:
An Investigation of Dynamic Partial Reconfiguration Offloading in Hard Real-Time Systems. 192-198 - Tobias Scheipel, Peter Brungs, Marcel Baunach:
A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime. 199-207 - Swantje Plambeck, Gianluca Martino, Görschwin Fey:
Metrics for the Evaluation of Approximate Sequential Streaming Circuits. 208-211 - Shayan Tabatabaei Nikkhah, Marc Geilen, Dip Goswami, Martijn Koedam, Andrew Nelson, Kees Goossens:
A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments. 212-220 - Evangelos Petrongonas, Vasileios Leon, George Lentaris, Dimitrios Soudris:
ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs. 221-228 - Yu Yang, Ahmed Hemani, Kolin Paul:
Scheduling Persistent and Fully Cooperative Instructions. 229-237 - Marie Badaroux, Saverio Miroddi, Frédéric Pétrot:
To Pin or Not to Pin: Asserting the Scalability of QEMU Parallel Implementation. 238-245 - Jürgen Maier:
Gain and Pain of a Reliable Delay Model. 246-250 - Thinh Hung Pham, Shanker Shreejith, Sebastian Steinhorst, Suhaib A. Fahmy, Samarjit Chakraborty:
Heterogeneous Communication Virtualization for Distributed Embedded Applications. 251-258 - Stefano Corda, Madhurya Kumaraswamy, Ahsan Javed Awan, Roel Jordans, Akash Kumar, Henk Corporaal:
NMPO: Near-Memory Computing Profiling and Offloading. 259-267 - Norbert Druml, Anna Ryabokon, Rupert Schorn, Jochen Koszescha, Kaspars Ozols, Aleksandrs Levinskis, Rihards Novickis, Ethiopia Nigussie, Jouni Isoaho, Selim Solmaz, Georg Stettinger, Sergio E. Diaz, Mauricio Marcano, Jorge Villagra, Juan Medina, Martina Schwarz, Antonio Artuñedo, Mauro Comi, Rutger Beekelaar, Onur Özçelik, Elif Aksu Tasdelen, Yesim Gürbüz, Jan Saijets, Jukka Kyynäräinen, Dmitry Morits, Björn Debaillie, Maxim Rykunov, Joan Escamilla, Jarno Vanne, Tomi Korhonen, Kalle Holma, Eva-Maria Matzhold, Carlo Novara, Fabio Tango, Paolo Burgio, Giuseppe Calafiore, Milad Karimshoushtari, Emilie Boulay, Miguel Dhaens, Kylian Praet, Han Zwijnenberg, Henri Palm, David Aledo Ortega, Ercan Kalali, Tuomas Pensala, Arto Kyytinen, Morten Larsen, Omar Veledar, Georg Macher, Michael Lafer, Lorenzo Giraudi, Jakob Reckenzaun, Daniel Hammer, Naveen Mohan, Josef Schmid, Alfred Höß, Shai Ophir, Anand Dubey, Jonas Fuchs, Maximilian Lübke, Andrei Anghel, Nicolae-Catalin Ristea, Martin Törngren, Alua Musralina, Marlene Harter, Joseena Memadathil Jose, George Dimitrakopoulos:
Programmable Systems for Intelligence in Automobiles (PRYSTINE): Final results after Year 3. 268-277 - Mahmoud Hussein, Réda Nouacer:
Building Blocks and Interaction Patterns of Unmanned Aerial Systems. 278-285 - Giovanni Agosta, Daniele Cattaneo, William Fornaciari, Andrea Galimberti, Giuseppe Massari, Federico Reghenzani, Federico Terraneo, Davide Zoni, Carlo Brandolese, Massimo Celino, Francesco Iannone, Paolo Palazzari, Giuseppe Zummo, Massimo Bernaschi, Pasqua D'Ambra, Sergio Saponara, Marco Danelutto, Massimo Torquati, Marco Aldinucci, Yasir Arfat, Barbara Cantalupo, Iacopo Colonnelli, Roberto Esposito, Alberto Riccardo Martinelli, Gianluca Mittone, Olivier Beaumont, Bérenger Bramas, Lionel Eyraud-Dubois, Brice Goglin, Abdou Guermouche, Raymond Namyst, Samuel Thibault, Antonio Filgueras, Miquel Vidal, Carlos Álvarez, Xavier Martorell, Ariel Oleksiak, Michal Kulczewski, Alessandro Lonardo, Piero Vicini, Francesca Lo Cicero, Francesco Simula, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Pier Stanislao Paolucci, Matteo Turisini, Francesco Giacomini, Tommaso Boccali, Simone Montangero, Roberto Ammendola:
TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale. 286-294 - Michael Karner, Joachim Hillebrand, Manuela Klocker, Ramiro Sámano-Robles:
Going to the Edge - Bringing Internet of Things and Artificial Intelligence Together. 295-302 - Romina Eramo, Vittoriano Muttillo, Luca Berardinelli, Hugo Bruneliere, Abel Gómez, Alessandra Bagnato, Andrey Sadovykh, Antonio Cicchetti:
AIDOaRt: AI-augmented Automation for DevOps, a Model-based Framework for Continuous Development in Cyber-Physical Systems. 303-310 - Klaus Pressel, Josef Moser, Sven Rzepka, Klas Brinkfeldt, Susan Zhao, Willem D. van Driel, Paolo Giammatteo, Baris Bulut, Müjdat Soytürk, Luigi Pomante:
The H2020-ECSEL Project "iRel40" (Intelligent Reliability 4.0). 311-318 - Philippe Gougeon, Thierry Goubier, Kevin Nguyen, Thomas Arvieu:
Pre-Integrated Architectures for sustainable complex Cyber-Physical Systems. 319-324 - Etienne Tehrani, Tarik Graba, Abdelmalek Si-Merabet, Jean-Luc Danger:
RSM Protection of the PRESENT Lightweight Cipher as a RISC-V Extension. 325-332 - Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Secure and dependable: Area-efficient masked and fault-tolerant architectures. 333-338 - Evangelos Haleplidis, Thanasis Tsakoulis, Alexander El-Kady, Charis Dimopoulos, Odysseas G. Koufopavlou, Apostolos P. Fournaris:
Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms. 339-346 - Thomas Claesen, Arish Sateesan, Jo Vliegen, Nele Mentens:
Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA. 347-354 - Nikolaos Foivos Polychronou, Pierre-Henri Thevenon, Maxime Puys, Vincent Beroulle:
MaDMAN: Detection of Software Attacks Targeting Hardware Vulnerabilities. 355-362 - Vanthanh Khuat, Jean-Max Dutertre, Jean-Luc Danger:
Analysis of a Laser-induced Instructions Replay Fault Model in a 32-bit Microcontroller. 363-370 - Dmytro Petryk, Zoya Dyka, Roland Sorge, Jan Schäffner, Peter Langendörfer:
Optical Fault Injection Attacks against Radiation-Hard Shift Registers. 371-375 - Dominic Pirker, Thomas Fischer, Christoph Reiter, Harald Witschnig, Christian Steger:
Towards a More Flexible IoT SAFE Implementation. 376-380 - Lampros Pyrgas, Paris Kitsos:
5G Security: FPGA Implementation of SNOW-V Stream Cipher. 381-384 - Felipe Valencia, Ilia Polian, Francesco Regazzoni:
Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities. 385-388 - Philipp Weiss, Emil Daporta, Andreas Weichslgartner, Sebastian Steinhorst:
Checkpointing Period Optimization of Distributed Fail-Operational Automotive Applications. 389-395 - Jose A. Matute, Myriam Elizabeth Vaca Recalde, Joshué Pérez:
MPC-Based Speed Tracking for Automated Urban Buses Performing V2I Communications with Traffic Lights*. 396-401 - Dharshan Krishna Murthy, Alejandro Masrur:
Controlled Intra-Platoon Collisions for Emergency Braking in Close-Distance Driving Arrangements. 402-409 - Philipp Clément, Herbert Danzinger, Omar Veledar, Clemens Könczöl, Georg Macher, Arno Eichberger:
Measuring trust in automated driving using a multi-level approach to human factors*. 410-417 - Milan Copic, Rainer Leupers, Gerd Ascheid:
Runnable Configuration in Mixed Classic/Adaptive AUTOSAR Systems by Leveraging Nondeterminism. 418-425 - Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla:
Enabling Unit Testing of Already-Integrated AI Software Systems: The Case of Apollo for Autonomous Driving. 426-433 - Le Ha Hoang, Muhammad Abdullah Hanif, Muhammad Shafique:
TRe-Map: Towards Reducing the Overheads of Fault-Aware Retraining of Deep Neural Networks by Merging Fault Maps. 434-441 - Alexander Montgomerie-Corcoran, Christos-Savvas Bouganis:
POMMEL: Exploring Off-Chip Memory Energy & Power Consumption in Convolutional Neural Network Accelerators. 442-448 - Hamid Tabani, Ajay Balasubramaniam, Shabbir Marzban, Elahe Arani, Bahram Zonooz:
Improving the Efficiency of Transformers for Resource-Constrained Devices. 449-456 - Rumia Masburah, Sayan Sinha, Rajib Lochan Jana, Soumyajit Dey, Qi Zhu:
Co-designing Intelligent Control of Building HVACs and Microgrids. 457-464 - Kanwal Ashraf, Yannick Le Moullec, Tamás Pardy, Toomas Rang:
Model-based System Architecture for Event-triggered Wireless Control of Bio-analytical Devices. 465-471 - Alexis Arcaya-Jordan, Alain Pegatoquet, Andrea Castagnetti:
Modeling Battery SoC Predictions for Smart Connected Glasses Simulations. 472-479 - Beatriz Martínez-Vega, Raquel León, Himar Fabelo, Samuel Ortega, Gustavo M. Callicó, David Suarez-Vega, Bernardino Clavo:
Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring. 480-487 - Shuaijie Ying, Sudip Roy, Juinn-Dar Huang, Shigeru Yamashita:
Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip. 488-494 - Philipp Niemann, Luca Müller, Rolf Drechsler:
Combining SWAPs and Remote CNOT Gates for Quantum Circuit Transformation. 495-501 - Dariia Verchyk, Johanna Sepúlveda:
Towards Post-Quantum Enhanced Identity-Based Encryption. 502-509 - Ioannis Memos Bagkratsas, Nicolas Sklavos:
Digital Forensics, Video Forgery Recognition, for Cybersecurity Systems. 510-513 - Luíza C. Garaffa, Abdullah Aljuffri, Cezar Reinbrecht, Said Hamdioui, Mottaqiallah Taouil, Johanna Sepúlveda:
Revealing the Secrets of Spiking Neural Networks: The Case of Izhikevich Neuron. 514-518 - Mehran Goli, Alireza Mahzoon, Rolf Drechsler:
Automated Debugging-Aware Visualization Technique for SystemC HLS Designs. 519-526 - Ondrej Novák:
Search Strategy of Large Nonlinear Block Codes. 527-534 - Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda:
Maximizing the Switching Activity of Different Modules Within a Processor Core via Evolutionary Techniques. 535-540 - Patrick Behal, Florian Huemer, Robert Najvirt, Andreas Steininger:
An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits. 541-548 - Jakub Lojda, Richard Panek, Zdenek Kotásek:
Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs. 549-552 - Richard Panek, Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek:
Reliability Analysis of the FPGA Control System with Reconfiguration Hardening. 553-556 - Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar:
Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules. 557-561
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