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DATE 2014: Dresden, Germany

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
License: https://opendatacommons.org/licenses/by/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

> Home > Conferences and Workshops > DATE

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Gerhard P. Fettweis, Wolfgang Nebel:
Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014. European Design and Automation Association 2014, ISBN 978-3-9815370-2-4
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  - conf/date/SabrySARM14
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Mohamed M. Sabry, Arvind Sridhar, David Atienza, Patrick Ruch, Bruno Michel:
Integrated microfluidic power generation and cooling for bright silicon MPSoCs. 1-6
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  - conf/date/AksanliR14
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Baris Aksanli, Tajana Rosing:
Providing regulation services and managing data center peak power budgets. 1-4
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  - conf/date/BiewerGH14
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Alexander Biewer, Jens Gladigau, Christian Haubelt:
A novel model for system-level decision making with combined ASP and SMT solving. 1-4
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  - conf/date/MurilloWCLA14
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Luis Gabriel Murillo, Simon Wawroschek, Jerónimo Castrillón, Rainer Leupers, Gerd Ascheid:
Automatic detection of concurrency bugs through event ordering constraints. 1-6
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  - conf/date/GangopadhyayLNR14
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Samantak Gangopadhyay, Youngtak Lee, Saad Bin Nasir, Arijit Raychowdhury:
Modeling and analysis of digital linear dropout regulators with adaptive control for high efficiency under wide dynamic range digital loads. 1-6
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  - conf/date/AmaruGM14
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Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
An efficient manipulation package for Biconditional Binary Decision Diagrams. 1-6
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  - conf/date/ChangOSK14
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Doohwang Chang, Sule Ozev, Ozgur Sinanoglu, Ramesh Karri:
Approximating the age of RF/analog circuits through re-characterization and statistical estimation. 1-4
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  - conf/date/YehHN14
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Hua-Hsin Yeh, Shih-Hsu Huang, Yow-Tyng Nieh:
Leakage-power-aware clock period minimization. 1-6
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  - conf/date/ChandraMCCM14
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Vikas Chandra, Subhasish Mitra, Chen-Yong Cher, Silvia Melitta Müller:
Cross layer resiliency in real world. 1
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  - conf/date/VijaykumarV14
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M. Vijaykumar, V. Vasudevan:
Statistical static timing analysis using a skew-normal canonical delay model. 1-6
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  - conf/date/RoyJ14
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Amitabha Roy, Timothy M. Jones:
ALLARM: Optimizing sparse directories for thread-local data. 1-6
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  - conf/date/ErbSSB14
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Dominik Erb, Karsten Scheibler, Matthias Sauer, Bernd Becker:
Efficient SMT-based ATPG for interconnect open defects. 1-6
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  - conf/date/Bautista-GomezCCDFGPRR14
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Leonardo Arturo Bautista-Gomez, Franck Cappello, Luigi Carro, Nathan DeBardeleben, Bo Fang, Sudhanva Gurumurthi, Karthik Pattabiraman, Paolo Rech, Matteo Sonza Reorda:
GPGPUs: How to combine high computational power with high reliability. 1-9
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  - conf/date/GanapathyCACGR14
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Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio:
INFORMER: An integrated framework for early-stage memory robustness analysis. 1-4
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  - conf/date/MunirK14
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Arslan Munir, Farinaz Koushanfar:
D2Cyber: A design automation tool for dependable cybercars. 1-4
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  - conf/date/TtofisT14
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Christos Ttofis, Theocharis Theocharides:
High-quality real-time hardware stereo matching based on guided image filtering. 1-6
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  - conf/date/CasamassimaFB14
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Filippo Casamassima, Elisabetta Farella, Luca Benini:
Context aware power management for motion-sensing body area network nodes. 1-6
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  - conf/date/AhmadC14
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Tariq B. Ahmad, Maciej J. Ciesielski:
Fast STA prediction-based gate-level timing simulation. 1-6
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  - conf/date/CastellanaTF14
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Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi:
An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems. 1-4
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  - conf/date/CongLYX14
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Kai Cong, Li Lei, Zhenkun Yang, Fei Xie:
Coverage evaluation of post-silicon validation tests with virtual prototypes. 1-6
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  - conf/date/BraojosDBAA14
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Rubén Braojos, Ahmed Yasir Dogan, Ivan Beretta, Giovanni Ansaloni, David Atienza:
Hardware/software approach for code synchronization in low-power multi-core sensor nodes. 1-6
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  - conf/date/KamalGAP14
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Mehdi Kamal, Amin Ghasemazar, Ali Afzali-Kusha, Massoud Pedram:
Improving efficiency of extensible processors by using approximate custom instructions. 1-4
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  - conf/date/FriedlerKMNS14
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Ophir Friedler, Wisam Kadry, Arkadiy Morgenshtein, Amir Nahir, Vitali Sokhin:
Effective post-silicon failure localization using dynamic program slicing. 1-6
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  - conf/date/BurgioDMCB14
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Paolo Burgio, Robin Danilo, Andrea Marongiu, Philippe Coussy, Luca Benini:
A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters. 1-4
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  - conf/date/BoettcherAEGR14
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Matthias Boettcher, Bashir M. Al-Hashimi, Mbou Eyole, Giacomo Gabrielli, Alastair Reid:
Advanced SIMD: Extending the reach of contemporary SIMD architectures. 1-4
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  - conf/date/BelKKS14
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Brandon Del Bel, Jongyeon Kim, Chris H. Kim, Sachin S. Sapatnekar:
Improving STT-MRAM density through multibit error correction. 1-6
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  - conf/date/IliasovASM14
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Alex Iliasov, Arseniy Alekseyev, Danil Sokolov, Andrey Mokhov:
Design of safety critical systems by refinement. 1-4
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  - conf/date/WangLXCP14
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Yanzhi Wang, Xue Lin, Qing Xie, Naehyuck Chang, Massoud Pedram:
Minimizing state-of-health degradation in hybrid electrical energy storage systems with arbitrary source and load profiles. 1-4
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  - conf/date/MoralesHBHV14
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Valentin Mena Morales, Pierre-Henri Horrein, Amer Baghdadi, Erik Hochapfel, Sandrine Vaton:
Energy-efficient FPGA implementation for binomial option pricing using OpenCL. 1-6
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  - conf/date/NejatAA14
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Mehrzad Nejat, Bijan Alizadeh, Ali Afzali-Kusha:
Dynamic Flip-Flop conversion to tolerate process variation in low power circuits. 1-4
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  - conf/date/KauerSGCA14
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Matthias Kauer, Damoon Soudbakhsh, Dip Goswami, Samarjit Chakraborty, Anuradha M. Annaswamy:
Fault-tolerant control synthesis and verification of distributed embedded systems. 1-6
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  - conf/date/NarayananDCCLW14
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Vijaykrishnan Narayanan, Suman Datta, Gert Cauwenberghs, Donald M. Chiarulli, Steven P. Levitan, H.-S. Philip Wong:
Video analytics using beyond CMOS devices. 1-5
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  - conf/date/HelfmeierBNTS14
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Clemens Helfmeier, Christian Boit, Dmitry Nedospasov, Shahin Tajik, Jean-Pierre Seifert:
Physical vulnerabilities of Physically Unclonable Functions. 1-4
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  - conf/date/OdendahlGLARVH14
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Maximilian Odendahl, Andres Goens, Rainer Leupers, Gerd Ascheid, Benjamin Ries, Berthold Vöcking, Tomas Henriksson:
Optimized buffer allocation in multicore platforms. 1-6
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  - conf/date/HillerS14
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Matthias Hiller, Georg Sigl:
Increasing the efficiency of syndrome coding for PUFs with helper data compression. 1-6
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  - conf/date/BardizbanyanSWL14
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Alen Bardizbanyan, Magnus Själander, David B. Whalley, Per Larsson-Edefors:
Reducing set-associative L1 data cache energy by early load data dependence detection (ELD³). 1-4
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  - conf/date/WangZMYJDP14
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Xiaohang Wang, Baoxin Zhao, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Maurizio Palesi:
Adaptive power allocation for many-core systems inspired from multiagent auction model. 1-4
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  - conf/date/JinS14
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Yier Jin, Dean Sullivan:
Real-time trust evaluation in integrated circuits. 1-6
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  - conf/date/Fu0PJZ14
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Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang:
A fault detection mechanism in a Data-flow scheduled Multithreaded processor. 1-4
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  - conf/date/BeckerNI14
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Andrew Becker, David Novo, Paolo Ienne:
SKETCHILOG: Sketching combinational circuits. 1-4
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  - conf/date/GomonyAG14
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Manil Dev Gomony, Benny Akesson, Kees Goossens:
Coupling TDM NoC and DRAM controller for cost and performance optimization of real-time systems. 1-6
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  - conf/date/RuhrmairH14
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Ulrich Rührmair, Daniel E. Holcomb:
PUFs at a glance. 1-6
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  - conf/date/JaksicC14
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Zoran Jaksic, Ramon Canal:
DRAM-based coherent caches and how to take advantage of the coherence protocol to reduce the refresh energy. 1-4
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  - conf/date/WanK14
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Jinbo Wan, Hans G. Kerkhoff:
An embedded offset and gain instrument for OpAmp IPs. 1-4
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  - conf/date/DasKV14
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Anup Das, Akash Kumar, Bharadwaj Veeravalli:
Temperature aware energy-reliability trade-offs for mapping of throughput-constrained applications on multimedia MPSoCs. 1-6
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  - conf/date/ZygmontowiczDCP14
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Adam Zygmontowicz, Jennifer Dworak, Al Crouch, John C. Potter:
Making it harder to unlock an LSIB: Honeytraps and misdirection in a P1687 network. 1-6
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  - conf/date/LiuW14
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Bao Liu, Brandon Wang:
Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks. 1-6
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  - conf/date/RossiTB14
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Maurizio Rossi, Alessandro Toppano, Davide Brunelli:
Real-time optimization of the battery banks lifetime in Hybrid Residential Electrical Systems. 1-6
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  - conf/date/BurlyaevFG14
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Dmitry Burlyaev, Pascal Fradet, Alain Girault:
Verification-guided voter minimization in triple-modular redundant circuits. 1-6
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  - conf/date/KeramidasMKN14
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Georgios Keramidas, Michail Mavropoulos, Anna Karvouniari, Dimitris Nikolos:
Spatial pattern prediction based management of faulty data caches. 1-6
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  - conf/date/DuricPSUCVB14
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Milovan Duric, Oscar Palomar, Aaron Smith, Osman S. Unsal, Adrián Cristal, Mateo Valero, Doug Burger:
EVX: Vector execution on low power EDGE cores. 1-4
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  - conf/date/SanderSDBBBMKALHRHH14
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Oliver Sander, Timo Sandmann, Viet Vu Duy, Steffen Bähr, Falco Bapp, Jürgen Becker, Hans-Ulrich Michel, Dirk Kaule, Daniel Adam, Enno Lübbers, Jürgen Hairbucher, Andre Richter, Christian Herber, Andreas Herkersdorf:
Hardware virtualization support for shared resources in mixed-criticality multicore systems. 1-6
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  - conf/date/ZangenehJ14
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Mahmoud Zangeneh, Ajay Joshi:
Sub-threshold logic circuit design using feedback equalization. 1-6
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  - conf/date/WangLLW014
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Jian Wang, Huawei Li, Tao Lv, Tiancheng Wang, Xiaowei Li:
Functional test generation guided by steady-state probabilities of abstract design. 1-4
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  - conf/date/ZuoloZMGICPOB14
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Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi:
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives. 1-6
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  - conf/date/MacrelliWRHPTR14
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Enrico Macrelli, Ningning Wang, Saibal Roy, Michael Hayes, Rudi Paolo Paganelli, Marco Tartagni, Aldo Romani:
Design and fabrication of a 315 μΗ bondwire micro-transformer for ultra-low voltage energy harvesting. 1-4
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  - conf/date/BishnoiEOT14
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Rajendra Bishnoi, Mojtaba Ebrahimi, Fabian Oboril, Mehdi Baradaran Tahoori:
Asynchronous Asymmetrical Write Termination (AAWT) for a low power STT-MRAM. 1-6
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  - conf/date/TrivediAM14
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Amit Ranjan Trivedi, Mohammad Faisal Amir, Saibal Mukhopadhyay:
Ultra-low power electronics with Si/Ge tunnel FET. 1-6
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Alexander Kordes, Bart Vermeulen, Abhijit K. Deb, Michael G. Wahl:
Startup error detection and containment to improve the robustness of hybrid FlexRay networks. 1-6
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Delong Shang, Xuefu Zhang, Fei Xia, Alex Yakovlev:
Asynchronous design for new on-chip wide dynamic range power electronics. 1-6
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Ahmed Alhammad, Rodolfo Pellizzoni:
Time-predictable execution of multithreaded applications on multicore systems. 1-6
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Xue-Yang Zhu, Marc Geilen, Twan Basten, Sander Stuijk:
Memory-constrained static rate-optimal scheduling of synchronous dataflow graphs via retiming. 1-6
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  - conf/date/KahngK14
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Andrew B. Kahng, Ilgweon Kang:
Co-optimization of memory BIST grouping, test scheduling, and logic placement. 1-6
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Ogun Turkyilmaz, Gerald Cibrario, Olivier Rozeau, Perrine Batude, Fabien Clermidy:
3D FPGA using high-density interconnect Monolithic Integration. 1-4
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Gang Han, Haibo Zeng, Yaping Li, Wenhua Dou:
SAFE: Security-Aware FlexRay Scheduling Engine. 1-4
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Yu Pu, Juan Diego Echeverri, Maurice Meijer, José Pineda de Gyvez:
Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling. 1-2
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Waleed Dweik, Murali Annavaram, Michel Dubois:
Reliability-Aware Exceptions: Tolerating intermittent faults in microprocessor array structures. 1-6
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Wen-Hao Liu, Tzu-Kai Chien, Ting-Chi Wang:
Metal layer planning for silicon interposers with consideration of routability and manufacturing cost. 1-6
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Mojtaba Ebrahimi, Adrian Evans, Mehdi Baradaran Tahoori, Razi Seyyedi, Enrico Costenaro, Dan Alexandrescu:
Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales. 1-6
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  - conf/date/CortezRHN14
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Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale:
Testing PUF-based secure key storage circuits. 1-6
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Heba Khdr, Thomas Ebi, Muhammad Shafique, Hussam Amrouch, Jörg Henkel:
mDTM: Multi-objective dynamic thermal management for on-chip systems. 1-6
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C. Katzschke, M.-P. Sohn, Markus Olbrich, Volker Meyer zu Bexten, Markus Tristl, Erich Barke:
Application of Mission Profiles to enable cross-domain constraint-driven design. 1-6
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Shuang Chen, Yanzhi Wang, Massoud Pedram:
Concurrent placement, capacity provisioning, and request flow control for a distributed cloud infrastructure. 1-6
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Zhengfeng Huang:
A high performance SEU-tolerant latch for nanoscale CMOS technology. 1-5
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Yuhao Wang, Hao Yu, Dennis Sylvester, Pingfan Kong:
Energy efficient in-memory AES encryption based on nonvolatile domain-wall nanowire. 1-4
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  - conf/date/HoffmanRAA14
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Caio Hoffman, Luiz Ramos, Rodolfo Azevedo, Guido Araujo:
Wear-out analysis of Error Correction Techniques in Phase-Change Memory. 1-4
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Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
Parallel probe based dynamic connection setup in TDM NoCs. 1-6
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Saman Kiamehr, Farshad Firouzi, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori:
Aging-aware standard cell library design. 1-4
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Seung-Soo Han, Andrew B. Kahng, Siddhartha Nath, Ashok S. Vydyanathan:
A deep learning methodology to proliferate golden signoff timing. 1-6
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Ute Zschieschang, Reinhold Rodel, Ulrike Kraft, Kazuo Takimiya, Tarek Zaki, Florian Letzkus, Joerg Butschke, Harald Richter, Joachim N. Burghartz, Wei Xiong, Boris Murmann, Hagen Klauk:
Low-voltage organic transistors for flexible electronics. 1-6
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  - conf/date/BalckGP14
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Kenneth Balck, Olga Grinchtein, Justin Pearson:
Model-based protocol log generation for testing a telecommunication test harness using CLP. 1-4
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Michael E. Imhof, Hans-Joachim Wunderlich:
Bit-Flipping Scan - A unified architecture for fault tolerance and offline test. 1-6
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A. Ubolli, Stefano Grivet-Talocia, M. Bandinu, Alessandro Chinea:
Sensitivity-based weighting for passivity enforcement of linear macromodels in power integrity applications. 1-6
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  - conf/date/DongZ14
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Chuansheng Dong, Haibo Zeng:
Minimizing stack memory for hard real-time applications on multicore platforms. 1-6
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  - conf/date/LeeA14
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Hsun-Cheng Lee, Jacob A. Abraham:
A novel low power 11-bit hybrid ADC using flash and delay line architectures. 1-4
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  - conf/date/CilardoFGM14
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Alessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo:
Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems. 1-4
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Santanu Sarma, Nikil D. Dutt:
Minimal sparse observability of complex networks: Application to MPSoC sensor placement and run-time thermal estimation & tracking. 1-6
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  - conf/date/LiSH014
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Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li:
Partial-SET: Write speedup of PCM main memory. 1-4
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  - conf/date/FourmigueBN14
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Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu:
Efficient transient thermal simulation of 3D ICs with liquid-cooling and through silicon vias. 1-6
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  - conf/date/MaliukM14
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Dzmitry Maliuk, Yiorgos Makris:
An analog non-volatile neural network platform for prototyping RF BIST solutions. 1-6
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  - conf/date/KimKGH14
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Myungsun Kim, Kibeom Kim, James R. Geraci, Seongsoo Hong:
Utilization-aware load balancing for the energy efficient operation of the big.LITTLE processor. 1-4
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  - conf/date/FrancillonNRT14
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Aurélien Francillon, Quan Nguyen, Kasper Bonne Rasmussen, Gene Tsudik:
A minimalist approach to Remote Attestation. 1-6
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  - conf/date/Sadri0WWB14
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MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini:
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. 1-4
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Hui Guo, Zhenjiang Wang, Chenggang Wu, Ruining He:
EATBit: Effective automated test for binary translation with high code coverage. 1-6
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  - conf/date/WeinstockSLAT14
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Jan Henrik Weinstock, Christoph Schumacher, Rainer Leupers, Gerd Ascheid, Laura Tosoratto:
Time-decoupled parallel SystemC simulation. 1-4
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  - conf/date/DrechslerCFHMSG14
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Rolf Drechsler, Christophe Chevallaz, Franco Fummi, Alan J. Hu, Ronny Morad, Frank Schirrmeister, Alex Goryachev:
Panel: Future SoC verification methodology: UVM evolution or revolution? 1-5
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  - conf/date/EckerVZG14
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Wolfgang Ecker, Michael Velten, Leily Zafari, Ajay Goyal:
The metamodeling approach to system level synthesis. 1-2
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  - conf/date/GuGD014
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Chuancai Gu, Nan Guan, Qingxu Deng, Wang Yi:
Partitioned mixed-criticality scheduling on multiprocessor platforms. 1-6
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  - conf/date/ChenCH14
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Yi-Hang Chen, Jian-Yu Chen, Juinn-Dar Huang:
Area minimization synthesis for reconfigurable single-electron transistor arrays with fabrication constraints. 1-4
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  - conf/date/HeidmannHHWPP14
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Nils Heidmann, Nico Hellwege, Tim Hohlein, Thomas Westphal, Dagmar Peters-Drolshagen, Steffen Paul:
Modeling of an analog recording system design for ECoG and AP signals. 1-6
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  - conf/date/AzimCPF14
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Akramul Azim, Gonzalo Carvajal, Rodolfo Pellizzoni, Sebastian Fischmeister:
Generation of communication schedules for multi-mode distributed real-time applications. 1-6
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  - conf/date/LamWCHHPZ14
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Kam-yiu Lam, Jiantao Wang, Yuan-Hao Chang, Jen-Wei Hsieh, Po-Chun Huang, Chung Keung Poon, Chun Jiang Zhu:
Garbage collection for multi-version index on flash memory. 1-4
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  - conf/date/XuB14
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Xiaolin Xu, Wayne Burleson:
Hybrid side-channel/machine-learning attacks on PUFs: A new threat? 1-6
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  - conf/date/PaulKBP14
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Somnath Paul, Robert Karam, Swarup Bhunia, Ruchir Puri:
Energy-efficient hardware acceleration through computing in the memory. 1-6
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  - conf/date/ZhuWCP14
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Di Zhu, Yanzhi Wang, Naehyuck Chang, Massoud Pedram:
Optimal design and management of a smart residential PV and energy storage system. 1-6
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  - conf/date/AltmeyerD14
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Sebastian Altmeyer, Robert I. Davis:
On the correctness, optimality and precision of Static Probabilistic Timing Analysis. 1-6
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  - conf/date/ShiC14
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Yiyu Shi, Hung-Ming Chen:
Memcomputing: The cape of good hope: [Extended special session description]. 1-3
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  - conf/date/WangLS14
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Wei Wang, Youyou Lu, Jiwu Shu:
p-OFTL: An object-based semantic-aware parallel flash translation layer. 1-6
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  - conf/date/MaurichG14
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Ingo von Maurich, Tim Güneysu:
Lightweight code-based cryptography: QC-MDPC McEliece encryption on reconfigurable devices. 1-6
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  - conf/date/SchollPDA14
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Christoph Scholl, Florian Pigorsch, Stefan Disch, Ernst Althaus:
Simple interpolants for linear arithmetic. 1-6
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  - conf/date/AbeleinCEGRGRTUW14
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Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Glaß, Felix Reimann, Laura Rodríguez Gómez, Thomas Russ, Jürgen Teich, Dominik Ull, Hans-Joachim Wunderlich:
Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures. 1-6
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  - conf/date/HaddadTBF14
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Patrick Haddad, Yannick Teglia, Florent Bernard, Viktor Fischer:
On the assumption of mutual independence of jitter realizations in P-TRNG stochastic models. 1-6
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  - conf/date/KoundinyaTFPBS14
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Pranav Koundinya, Sandhya Theril, Tao Feng, Varun Prakash, Jiming Bao, Weidong Shi:
Multi resolution touch panel with built-in fingerprint sensing support. 1-6
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  - conf/date/PalominoSASH14
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Daniel Palomino, Muhammad Shafique, Hussam Amrouch, Altamiro Amadeu Susin, Jörg Henkel:
hevcDTM: Application-driven Dynamic Thermal Management for High Efficiency Video Coding. 1-4
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  - conf/date/RehmanKSH14
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Semeen Rehman, Florian Kriebel, Muhammad Shafique, Jörg Henkel:
Compiler-driven dynamic reliability management for on-chip systems under variabilities. 1-4
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  - conf/date/JalleKAQC14
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Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Bus designs for time-probabilistic multicore processors. 1-6
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  - conf/date/RanaC14
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Manish Rana, Ramon Canal:
SSFB: A highly-efficient and scalable simulation reduction technique for SRAM yield analysis. 1-6
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  - conf/date/Torrellas14
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Josep Torrellas:
Extreme-scale computer architecture: Energy efficiency from the ground up^‡. 1-5
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  - conf/date/Guan014
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Nan Guan, Wang Yi:
General and efficient Response Time Analysis for EDF scheduling. 1-6
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Morteza Gholipour, Ying-Yu Chen, Amit Sangai, Deming Chen:
Highly accurate SPICE-compatible modeling for single- and double-gate GNRFETs with studies on technology scaling. 1-6
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Karthik Swaminathan, Moon Seok Kim, Nandhini Chandramoorthy, Behnam Sedighi, Robert Perricone, Jack Sampson, Vijaykrishnan Narayanan:
Modeling steep slope devices: From circuits to architectures. 1-6
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Benoît Dupont de Dinechin, Duco van Amstel, Marc Poulhiès, Guillaume Lager:
Time-critical computing on a single-chip massively parallel processor. 1-6
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Michael Bedford Taylor:
A landscape of the new dark silicon design regime. 1
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Wolfgang Buter, Christof Osewold, Daniel Gregorek, Alberto García Ortiz:
DCM: An IP for the autonomous control of optical and electrical reconfigurable NoCs. 1-4
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