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ORCIDMark M. Tehranipoor
Mark Mohammad Tehranipoor – Mohammad Tehranipoor
Person information
- affiliation: University of Florida, Institute for Cybersecurity Research (FICS), Gainesville, FL, USA
- affiliation: University of Connecticut, Center for Hardware Assurance, Security, and Engineering (CHASE), Storrs, CT, USA
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Books and Theses
- 2011
[b1]Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty:
Test and Diagnosis for Small-Delay Defects. Springer 2011, ISBN 978-1-4419-8296-4, pp. I-XVIII, 1-212
Journal Articles
- 2024
- [j157]Md Sami Ul Islam Sami
, Tao Zhang, Amit Mazumder Shuvo, Md. Saad Ul Haque, Paul Calzada, Kimia Zamiri Azar, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration. IEEE Access 12: 48081-48107 (2024) - [j156]Muhammad Monir Hossain, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
Fuzzing for Automated SoC Security Verification: Challenges and Solution. IEEE Des. Test 41(4): 7-16 (2024) - [j155]Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark M. Tehranipoor, Farimah Farahmandi:
Efficient SoC Security Monitoring: Quality Attributes and Potential Solutions. IEEE Des. Test 41(4): 26-34 (2024) - [j154]Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark M. Tehranipoor, Farimah Farahmandi:
The Road Not Taken: eFPGA Accelerators Utilized for SoC Security Auditing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3068-3082 (2024) - [j153]Avinash Ayalasomayajula, Nusrat Farzana Dipu, Mark M. Tehranipoor, Farimah Farahmandi:
Automatic Asset Identification for Assertion-Based SoC Security Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3264-3277 (2024) - [j152]Nusrat Farzana Dipu, Avinash Ayalasomayajula, Mark M. Tehranipoor, Farimah Farahmandi:
AGILE: Automated Assertion Generation to Detect Information Leakage Vulnerabilities. IEEE Trans. Inf. Forensics Secur. 19: 1794-1809 (2024) - [j151]Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor:
Improving Bounded Model Checkers Scalability for Circuit De-Obfuscation: An Exploration. IEEE Trans. Inf. Forensics Secur. 19: 2771-2785 (2024) - [j150]Sree Ranjani Rajendran, Nusrat Farzana Dipu, Shams Tarek, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor:
Exploring the Abyss? Unveiling Systems-on-Chip Hardware Vulnerabilities Beneath Software. IEEE Trans. Inf. Forensics Secur. 19: 3914-3926 (2024) - [j149]Paul Calzada, Md Sami Ul Islam Sami, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
Heterogeneous Integration Supply Chain Integrity Through Blockchain and CHSM. ACM Trans. Design Autom. Electr. Syst. 29(1): 9:1-9:25 (2024) - [j148]Tao Zhang, Mark M. Tehranipoor, Farimah Farahmandi:
TrustGuard: Standalone FPGA-Based Security Monitoring Through Power Side-Channel. IEEE Trans. Very Large Scale Integr. Syst. 32(2): 319-332 (2024) - [j147]Amit Mazumder Shuvo, Tao Zhang, Farimah Farahmandi, Mark M. Tehranipoor:
FLAT: Layout-Aware and Security Property-Assisted Timing Fault-Injection Attack Assessment. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1150-1163 (2024) - [j146]Md Rafid Muttaki, Md Habibur Rahman, Akshay Kulkarni, Mark M. Tehranipoor, Farimah Farahmandi:
FTC: A Universal Framework for Fault-Injection Attack Detection and Prevention. IEEE Trans. Very Large Scale Integr. Syst. 32(7): 1311-1324 (2024) - 2023
- [j145]M. Sazadur Rahman, Rui Guo, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
ReTrustFSM: Toward RTL Hardware Obfuscation-A Hybrid FSM Approach. IEEE Access 11: 19741-19761 (2023) - [j144]Tao Zhang, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology. IEEE Des. Test 40(2): 127-136 (2023) - [j143]Md Sami Ul Islam Sami, Hadi Mardani Kamali, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
Enabling Security of Heterogeneous Integration: From Supply Chain to In-Field Operations. IEEE Des. Test 40(5): 86-95 (2023) - [j142]Farimah Farahmandi, Ankur Srivastava, Giorgio Di Natale, Mark M. Tehranipoor:
Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle. ACM J. Emerg. Technol. Comput. Syst. 19(1): 4:1-4:4 (2023) - [j141]Nathan Jessurun, Olivia P. Dizon-Paradis, Jacob Harrison, Shajib Ghosh, Mark M. Tehranipoor, Damon L. Woodard, Navid Asadizanjani:
FPIC: A Novel Semantic Dataset for Optical PCB Assurance. ACM J. Emerg. Technol. Comput. Syst. 19(2): 17:1-17:21 (2023) - [j140]Md Rafid Muttaki, Roshanak Mohammadivojdan, Hadi Mardani Kamali, Mark M. Tehranipoor, Farimah Farahmandi:
HLock+: A Robust and Low-Overhead Logic Locking at the High-Level Language. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2149-2162 (2023) - [j139]Rasheed Kibria, Farimah Farahmandi, Mark M. Tehranipoor:
FSMx-Ultra: Finite State Machine Extraction From Gate-Level Netlist for Security Assessment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3613-3627 (2023) - [j138]Minyan Gao, M. Sazadur Rahman, Nitin Varshney, Mark M. Tehranipoor, Domenic Forte:
iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4541-4554 (2023) - 2022
- [j137]Yunkai Bai, Jungmin Park, Mark M. Tehranipoor, Domenic Forte:
Real-time instruction-level verification of remote IoT/CPS devices via side channels. Discov. Internet Things 2(1) (2022) - [j136]Jiaji He, Xiaolong Guo, Mark M. Tehranipoor, Apostol Vassilev, Yier Jin:
EM Side Channels in Hardware Security: Attacks and Defenses. IEEE Des. Test 39(2): 100-111 (2022) - [j135]M. Shafkat M. Khan, Chengjie Xi, Aslam A. Khan, M. Tanjidur Rahman, Mark M. Tehranipoor, Navid Asadizanjani:
Secure Interposer-Based Heterogeneous Integration. IEEE Des. Test 39(6): 156-164 (2022) - [j134]Liton Kumar Biswas, Leonidas Lavdas, M. Tanjidur Rahman, Mark M. Tehranipoor, Navid Asadizanjani:
On Backside Probing Techniques and Their Emerging Security Threats. IEEE Des. Test 39(6): 172-179 (2022) - [j133]Nitin Pundir, Sohrab Aftabjahani, Rosario Cammarota, Mark M. Tehranipoor, Farimah Farahmandi:
Analyzing Security Vulnerabilities Induced by High-level Synthesis. ACM J. Emerg. Technol. Comput. Syst. 18(3): 47:1-47:22 (2022) - [j132]Huanyu Wang, Henian Li, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
SoFI: Security Property-Driven Vulnerability Assessments of ICs Against Fault-Injection Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 452-465 (2022) - [j131]Nidish Vashistha, Hangwei Lu, Qihang Shi, Damon L. Woodard, Navid Asadizanjani, Mark M. Tehranipoor:
Detecting Hardware Trojans Using Combined Self-Testing and Imaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1730-1743 (2022) - [j130]Andrew Stern, Huanyu Wang, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
ACED-IT: Assuring Confidential Electronic Design Against Insider Threats in a Zero-Trust Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3202-3215 (2022) - [j129]Nidish Vashistha, Muhammad Monir Hossain, Md Rakib Shahriar, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
eChain: A Blockchain-Enabled Ecosystem for Electronic Device Authenticity Verification. IEEE Trans. Consumer Electron. 68(1): 23-37 (2022) - [j128]Yunkai Bai, Andrew Stern, Jungmin Park, Mark M. Tehranipoor, Domenic Forte:
RASCv2: Enabling Remote Access to Side-Channels for Mission Critical and IoT Systems. ACM Trans. Design Autom. Electr. Syst. 27(6): 65:1-65:25 (2022) - [j127]Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark M. Tehranipoor:
Power Side-Channel Leakage Assessment Framework at Register-Transfer Level. IEEE Trans. Very Large Scale Integr. Syst. 30(9): 1207-1218 (2022) - 2021
- [j126]Jacob Harrison, Navid Asadizanjani, Mark M. Tehranipoor:
On malicious implants in PCBs throughout the supply chain. Integr. 79: 12-22 (2021) - [j125]N. Nalla Anandakumar, Mohammad S. Hashmi, Mark M. Tehranipoor:
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures. Integr. 81: 175-194 (2021) - [j124]Fatemeh Ganji, Shahin Tajik, Pascal Stauss, Jean-Pierre Seifert, Mark M. Tehranipoor, Domenic Forte:
Rock'n'roll PUFs: crafting provably secure pufs from less secure ones (extended version). J. Cryptogr. Eng. 11(2): 105-118 (2021) - [j123]M. Tanjidur Rahman, Nusrat Farzana, Dhwani Mehta, Shahin Tajik, Mark M. Tehranipoor, Navid Asadizanjani:
CONCEALING-Gate: Optical Contactless Probing Resilient Design. ACM J. Emerg. Technol. Comput. Syst. 17(3): 39:1-39:25 (2021) - [j122]Ulbert J. Botero, Ronald Wilson, Hangwei Lu, Mir Tanjidur Rahman, Mukhil A. Mallaiyan, Fatemeh Ganji, Navid Asadizanjani, Mark M. Tehranipoor, Damon L. Woodard, Domenic Forte:
Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives. ACM J. Emerg. Technol. Comput. Syst. 17(4): 62:1-62:53 (2021) - [j121]Beomsoo Park, Domenic Forte, Mark M. Tehranipoor, Nima Maghari:
A Metal-Via Resistance Based Physically Unclonable Function With Backend Incremental ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4700-4709 (2021) - [j120]M. Sazadur Rahman, Adib Nahiyan, Fahim Rahman, Saverio Fazzari, Kenneth Plaks, Farimah Farahmandi, Domenic Forte, Mark M. Tehranipoor:
Security Assessment of Dynamically Obfuscated Scan Chain Against Oracle-guided Attacks. ACM Trans. Design Autom. Electr. Syst. 26(4): 29:1-29:27 (2021) - 2020
- [j119]M. Tanjidur Rahman, M. Sazadur Rahman, Huanyu Wang, Shahin Tajik, Waleed Khalil, Farimah Farahmandi, Domenic Forte, Navid Asadizanjani, Mark M. Tehranipoor:
Defense-in-depth: A recipe for logic locking to prevail. Integr. 72: 39-57 (2020) - [j118]Jungmin Park, Fahim Rahman, Apostol Vassilev, Domenic Forte, Mark M. Tehranipoor:
Leveraging Side-Channel Information for Disassembly and Security. ACM J. Emerg. Technol. Comput. Syst. 16(1): 6:1-6:21 (2020) - [j117]Zimu Guo, Sreeja Chowdhury, Mark M. Tehranipoor, Domenic Forte:
Permutation Network De-obfuscation: A Delay-based Attack and Countermeasure Investigation. ACM J. Emerg. Technol. Comput. Syst. 16(2): 17:1-17:25 (2020) - [j116]Dhwani Mehta, Hangwei Lu, Olivia P. Paradis, Mukhil Azhagan Mallaiyan Sathiaseelan, M. Tanjidur Rahman, Yousef Iskander, Praveen Chawla, Damon L. Woodard, Mark M. Tehranipoor, Navid Asadizanjani:
The Big Hack Explained: Detection and Prevention of PCB Supply Chain Implants. ACM J. Emerg. Technol. Comput. Syst. 16(4): 42:1-42:25 (2020) - [j115]Navid Asadi, Mark M. Tehranipoor:
Special Issue: 2019 PAINE Conference - Physical Assurance and Inspection of Electronics. J. Hardw. Syst. Secur. 4(1): 11-12 (2020) - [j114]Huanyu Wang, Qihang Shi, Adib Nahiyan, Domenic Forte, Mark M. Tehranipoor:
A Physical Design Flow Against Front-Side Probing Attacks by Internal Shielding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2152-2165 (2020) - [j113]Bicky Shakya, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(1): 175-202 (2020) - [j112]Tamzidul Hoque, Kai Yang, Robert Karam, Shahin Tajik, Domenic Forte, Mark M. Tehranipoor, Swarup Bhunia:
Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks. ACM Trans. Design Autom. Electr. Syst. 25(1): 4:1-4:32 (2020) - [j111]Adib Nahiyan, Jungmin Park, Miao Tony He, Yousef Iskander, Farimah Farahmandi, Domenic Forte, Mark M. Tehranipoor:
SCRIPT: A CAD Framework for Power Side-channel Vulnerability Assessment Using Information Flow Tracking and Pattern Generation. ACM Trans. Design Autom. Electr. Syst. 25(3): 26:1-26:27 (2020) - [j110]Md. Mahbub Alam, Adib Nahiyan, Mehdi Sadi, Domenic Forte, Mark M. Tehranipoor:
Soft-HaT: Software-Based Silicon Reprogramming for Hardware Trojan Implementation. ACM Trans. Design Autom. Electr. Syst. 25(4): 35:1-35:22 (2020) - [j109]Liting Yu, Xiaoxiao Wang, Fahim Rahman, Mark M. Tehranipoor:
Interconnect-Based PUF With Signature Uniqueness Enhancement. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 339-352 (2020) - [j108]Andrew Stern, Ulbert Botero, Fahim Rahman, Domenic Forte, Mark M. Tehranipoor:
EMFORCED: EM-Based Fingerprinting Framework for Remarked and Cloned Counterfeit IC Detection Using Machine Learning Classification. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 363-375 (2020) - [j107]Jungmin Park, Seongjoon Cho, Taejin Lim, Mark M. Tehranipoor:
QEC: A Quantum Entropy Chip and Its Applications. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1471-1484 (2020) - 2019
- [j106]Nima Karimian, Mark M. Tehranipoor, Damon L. Woodard, Domenic Forte:
Unlock Your Heart: Next Generation Biometric in Resource-Constrained Healthcare Systems and IoT. IEEE Access 7: 49135-49149 (2019) - [j105]Ulbert J. Botero, Mark M. Tehranipoor, Domenic Forte:
Upgrade/Downgrade: Efficient and Secure Legacy Electronic System Replacement. IEEE Des. Test 36(1): 14-22 (2019) - [j104]Ujjwal Guin, Navid Asadizanjani, Mark M. Tehranipoor:
Standards for Hardware Security. GetMobile Mob. Comput. Commun. 23(1): 5-9 (2019) - [j103]Adib Nahiyan, Farimah Farahmandi, Prabhat Mishra, Domenic Forte, Mark M. Tehranipoor:
Security-Aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 1003-1016 (2019) - [j102]Qihang Shi, Mark M. Tehranipoor, Domenic Forte:
Obfuscated Built-In Self-Authentication With Secure and Efficient Wire-Lifting. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 1981-1994 (2019) - [j101]Bicky Shakya, Hao-Ting Shen, Mark M. Tehranipoor, Domenic Forte:
Covert Gates: Protecting Integrated Circuits with Undetectable Camouflaging. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(3): 86-118 (2019) - [j100]Chip-Hong Chang, Marten van Dijk, Ulrich Rührmair, Mark M. Tehranipoor:
Emerging Attacks and Solutions for Secure Hardware in the Internet of Things. IEEE Trans. Dependable Secur. Comput. 16(3): 373-375 (2019) - [j99]Xiaolin Xu, Fahim Rahman, Bicky Shakya, Apostol Vassilev, Domenic Forte, Mark M. Tehranipoor:
Electronics Supply Chain Integrity Enabled by Blockchain. ACM Trans. Design Autom. Electr. Syst. 24(3): 31:1-31:25 (2019) - [j98]Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber:
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 253-280 (2019) - [j97]Huanyu Wang, Qihang Shi, Domenic Forte, Mark M. Tehranipoor:
Probing Assessment Framework and Evaluation of Antiprobing Solutions. IEEE Trans. Very Large Scale Integr. Syst. 27(6): 1239-1252 (2019) - [j96]Xiaoxiao Wang, Yueying Han, Mark M. Tehranipoor:
System-Level Counterfeit Detection Using On-Chip Ring Oscillator Array. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2884-2896 (2019) - [j95]Md. Mahbub Alam, Mark M. Tehranipoor, Domenic Forte:
Recycled FPGA Detection Using Exhaustive LUT Path Delay Characterization and Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2897-2910 (2019) - 2018
- [j94]Md. Mahbub Alam, Sreeja Chowdhury, Beomsoo Park, David Joseph Munzer, Nima Maghari, Mark M. Tehranipoor, Domenic Forte:
Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security. J. Hardw. Syst. Secur. 2(1): 15-32 (2018) - [j93]Sarah Amir, Bicky Shakya, Xiaolin Xu, Yier Jin, Swarup Bhunia, Mark M. Tehranipoor, Domenic Forte:
Development and Evaluation of Hardware Obfuscation Benchmarks. J. Hardw. Syst. Secur. 2(2): 142-161 (2018) - [j92]Nidish Vashistha, M. Tanjidur Rahman, Hao-Ting Shen, Damon L. Woodard, Navid Asadizanjani, Mark M. Tehranipoor:
Detecting Hardware Trojans Inserted by Untrusted Foundry Using Physical Inspection and Advanced Image Processing. J. Hardw. Syst. Secur. 2(4): 333-344 (2018) - [j91]Sandip Ray, Eric Peeters, Mark M. Tehranipoor, Swarup Bhunia:
System-on-Chip Platform Security Assurance: Architecture and Validation. Proc. IEEE 106(1): 21-37 (2018) - [j90]Xiaoxiao Wang, Dongrong Zhang, Miao Tony He, Donglin Su, Mark M. Tehranipoor:
Secure Scan and Test Using Obfuscation Throughout Supply Chain. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(9): 1867-1880 (2018) - [j89]Kun Yang, Hao-Ting Shen, Domenic Forte, Swarup Bhunia, Mark M. Tehranipoor:
Hardware-Enabled Pharmaceutical Supply Chain Security. ACM Trans. Design Autom. Electr. Syst. 23(2): 23:1-23:26 (2018) - [j88]Kun Yang, Domenic Forte, Mark M. Tehranipoor:
ReSC: An RFID-Enabled Solution for Defending IoT Supply Chain. ACM Trans. Design Autom. Electr. Syst. 23(3): 29:1-29:27 (2018) - [j87]Kun Yang, Ulbert Botero, Hao-Ting Shen, Damon L. Woodard, Domenic Forte, Mark M. Tehranipoor:
UCR: An Unclonable Environmentally Sensitive Chipless RFID Tag For Protecting Supply Chain. ACM Trans. Design Autom. Electr. Syst. 23(6): 74:1-74:24 (2018) - [j86]Zimu Guo, Xiaolin Xu, Md. Tauhidur Rahman, Mark M. Tehranipoor, Domenic Forte:
SCARe: An SRAM-Based Countermeasure Against IC Recycling. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 744-755 (2018) - [j85]Xiaolin Xu, Shahrzad Keshavarz, Domenic Forte, Mark M. Tehranipoor, Daniel E. Holcomb:
Bimodal Oscillation as a Mechanism for Autonomous Majority Voting in PUFs. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2431-2442 (2018) - [j84]Dongrong Zhang, Xiaoxiao Wang, Md. Tauhidur Rahman, Mark M. Tehranipoor:
An On-Chip Dynamically Obfuscated Wrapper for Protecting Supply Chain Against IP and IC Piracies. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2456-2469 (2018) - 2017
- [j83]Huanyu Wang, Domenic Forte, Mark M. Tehranipoor, Qihang Shi:
Probing Attacks on Integrated Circuits: Challenges and Research Opportunities. IEEE Des. Test 34(5): 63-71 (2017) - [j82]Miao Tony He, Mark M. Tehranipoor:
An Access Mechanism for Embedded Sensors in Modern SoCs. J. Electron. Test. 33(4): 397-413 (2017) - [j81]Swarup Bhunia, Mark M. Tehranipoor:
Editorial for the Introductory Issue of the Journal of Hardware and Systems Security (HaSS). J. Hardw. Syst. Secur. 1(1): 1-2 (2017) - [j80]Bicky Shakya, Miao Tony He, Hassan Salmani, Domenic Forte, Swarup Bhunia, Mark M. Tehranipoor:
Benchmarking of Hardware Trojans and Maliciously Affected Circuits. J. Hardw. Syst. Secur. 1(1): 85-102 (2017) - [j79]Md. Tauhidur Rahman, Alison Hosey, Zimu Guo, Jackson Carroll, Domenic Forte, Mark M. Tehranipoor:
Systematic Correlation and Cell Neighborhood Analysis of SRAM PUF for Robust and Unique Key Generation. J. Hardw. Syst. Secur. 1(2): 137-155 (2017) - [j78]Mahabubul Alam, Mark M. Tehranipoor, Ujjwal Guin:
TSensors Vision, Infrastructure and Security Challenges in Trillion Sensor Era. J. Hardw. Syst. Secur. 1(4): 311-327 (2017) - [j77]Nima Karimian, Zimu Guo, Mark M. Tehranipoor, Domenic Forte:
Highly Reliable Key Generation From Electrocardiogram (ECG). IEEE Trans. Biomed. Eng. 64(6): 1400-1411 (2017) - [j76]Mehdi Sadi, Sukeshwar Kannan, LeRoy Winemberg, Mark M. Tehranipoor:
SoC Speed Binning Using Machine Learning and On-Chip Slack Sensors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 842-854 (2017) - [j75]Xiaoxiao Wang, Pengyuan Jiao, Mehdi Sadi, Donglin Su, LeRoy Winemberg, Mark M. Tehranipoor:
TRO: An On-Chip Ring Oscillator-Based GHz Transient IR-Drop Monitor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 855-868 (2017) - [j74]Ujjwal Guin, Swarup Bhunia, Domenic Forte, Mark M. Tehranipoor:
SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware. IEEE Trans. Dependable Secur. Comput. 14(3): 265-278 (2017) - [j73]Jacob Wurm, Yier Jin, Yang Liu, Shiyan Hu, Kenneth Heffner, Fahim Rahman, Mark M. Tehranipoor:
Introduction to Cyber-Physical System Security: A Cross-Layer Perspective. IEEE Trans. Multi Scale Comput. Syst. 3(3): 215-227 (2017) - [j72]Kun Yang, Domenic Forte, Mark M. Tehranipoor:
CDTA: A Comprehensive Solution for Counterfeit Detection, Traceability, and Authentication in the IoT Supply Chain. ACM Trans. Design Autom. Electr. Syst. 22(3): 42:1-42:31 (2017) - [j71]Zimu Guo, Jia Di, Mark M. Tehranipoor, Domenic Forte:
Obfuscation-Based Protection Framework against Printed Circuit Boards Unauthorized Operation and Reverse Engineering. ACM Trans. Design Autom. Electr. Syst. 22(3): 54:1-54:31 (2017) - [j70]Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark M. Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson:
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 1-20 (2017) - [j69]Miao Tony He, Gustavo K. Contreras, Dat Tran, LeRoy Winemberg, Mark M. Tehranipoor:
Test-Point Insertion Efficiency Analysis for LBIST in High-Assurance Applications. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2602-2615 (2017) - [j68]Hao-Ting Shen, Fahim Rahman, Bicky Shakya, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
Poly-Si-Based Physical Unclonable Functions. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3207-3217 (2017) - [j67]Mehdi Sadi, Gustavo K. Contreras, Jifeng Chen, LeRoy Winemberg, Mark M. Tehranipoor:
Design of Reliable SoCs With BIST Hardware and Machine Learning. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3237-3250 (2017) - [j66]Fahim Rahman, Bicky Shakya, Xiaolin Xu, Domenic Forte, Mark M. Tehranipoor:
Security Beyond CMOS: Fundamentals, Applications, and Roadmap. IEEE Trans. Very Large Scale Integr. Syst. 25(12): 3420-3433 (2017) - 2016
- [j65]Kan Xiao, Adib Nahiyan, Mark M. Tehranipoor:
Security Rule Checking in IC Design. Computer 49(8): 54-61 (2016) - [j64]Shahed E. Quadir, Junlin Chen, Domenic Forte, Navid Asadizanjani, Sina Shahbazmohamadi, Lei Wang, John A. Chandy, Mark M. Tehranipoor:
A Survey on Chip to System Reverse Engineering. ACM J. Emerg. Technol. Comput. Syst. 13(1): 6:1-6:34 (2016) - [j63]Md. Tauhidur Rahman, Fahim Rahman, Domenic Forte, Mark M. Tehranipoor:
An Aging-Resistant RO-PUF for Reliable Key Generation. IEEE Trans. Emerg. Top. Comput. 4(3): 335-348 (2016) - [j62]Hassan Salmani, Mark M. Tehranipoor:
Vulnerability Analysis of a Circuit Layout to Hardware Trojan Insertion. IEEE Trans. Inf. Forensics Secur. 11(6): 1214-1225 (2016) - [j61]Yang Xie, Chongxi Bao, Caleb Serafy, Tiantao Lu, Ankur Srivastava, Mark M. Tehranipoor:
Security and Vulnerability Implications of 3D ICs. IEEE Trans. Multi Scale Comput. Syst. 2(2): 108-122 (2016) - [j60]Shiyan Hu, Yier Jin, Kenneth Heffner, Mark M. Tehranipoor:
Guest Editorial: Hardware/Software Cross-Layer Technologies for Trustworthy and Secure Computing. IEEE Trans. Multi Scale Comput. Syst. 2(3): 144-145 (2016) - [j59]Ujjwal Guin, Qihang Shi, Domenic Forte, Mark M. Tehranipoor:
FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs. ACM Trans. Design Autom. Electr. Syst. 21(4): 63:1-63:20 (2016) - [j58]Kan Xiao, Domenic Forte, Yier Jin, Ramesh Karri, Swarup Bhunia, Mark M. Tehranipoor:
Hardware Trojans: Lessons Learned after One Decade of Research. ACM Trans. Design Autom. Electr. Syst. 22(1): 6:1-6:23 (2016) - [j57]Ujjwal Guin, Domenic Forte, Mark M. Tehranipoor:
Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1233-1246 (2016) - [j56]Mehdi Sadi, Mark M. Tehranipoor:
Design of a Network of Digital Sensor Macros for Extracting Power Supply Noise Profile in SoCs. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1702-1714 (2016) - [j55]Xiaoxiao Wang, Dongrong Zhang, Donglin Su, LeRoy Winemberg, Mark M. Tehranipoor:
A Novel Peak Power Supply Noise Measurement and Adaptation System for Integrated Circuits. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1715-1727 (2016) - 2015
- [j54]Shane Kelly, Xuehui Zhang, Mohammad Tehranipoor, Andrew Ferraiuolo:
Detecting Hardware Trojans using On-chip Sensors in an ASIC Design. J. Electron. Test. 31(1): 11-26 (2015) - [j53]Xiaoxiao Wang, LeRoy Winemberg, Donglin Su, Dat Tran, Saji George, Nisar Ahmed, Steve Palosh, Allan Dobin, Mark M. Tehranipoor:
Aging Adaption in Integrated Circuits Using a Novel Built-In Sensor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(1): 109-121 (2015) - 2014
- [j52]Zachary A. Collier, Daniel DiMase, Steve Walters, Mark Mohammad Tehranipoor, James H. Lambert, Igor Linkov:
Cybersecurity Standards: Managing Risk and Creating Resilience. Computer 47(9): 70-76 (2014) - [j51]Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor:
Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead. J. Electron. Test. 30(1): 9-23 (2014) - [j50]Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor:
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment. J. Electron. Test. 30(1): 25-40 (2014) - [j49]Akihiro Tomita, Xiaoqing Wen, Yasuo Sato, Seiji Kajihara, Kohei Miyase, Stefan Holst, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang:
On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST. IEICE Trans. Inf. Syst. 97-D(10): 2706-2718 (2014) - [j48]Ilia Polian, Mohammad Tehranipoor:
Guest Editorial. IET Comput. Digit. Tech. 8(6): 237-238 (2014) - [j47]Jifeng Chen, Shuo Wang, Mohammad Tehranipoor:
Critical-reliability path identification and delay analysis. ACM J. Emerg. Technol. Comput. Syst. 10(2): 12:1-12:21 (2014) - [j46]Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris:
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE 102(8): 1207-1228 (2014) - [j45]Kan Xiao, Domenic Forte, Mohammad Tehranipoor:
A Novel Built-In Self-Authentication Technique to Prevent Inserting Hardware Trojans. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1778-1791 (2014) - [j44]Xuehui Zhang, Mohammad Tehranipoor:
Design of On-Chip Lightweight Sensors for Effective Detection of Recycled ICs. IEEE Trans. Very Large Scale Integr. Syst. 22(5): 1016-1029 (2014) - [j43]Shuo Wang, Mohammad Tehranipoor:
Light-Weight On-Chip Structure for Measuring Timing Uncertainty Induced by Noise in Integrated Circuits. IEEE Trans. Very Large Scale Integr. Syst. 22(5): 1030-1041 (2014) - 2013
- [j42]Kan Xiao, Xuehui Zhang, Mohammad Tehranipoor:
A Clock Sweeping Technique for Detecting Hardware Trojans Impacting Circuits Delay. IEEE Des. Test 30(2): 26-34 (2013) - [j41]Swarup Bhunia, Miron Abramovici, Dakshi Agrawal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, Mohammad Tehranipoor:
Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution. IEEE Des. Test 30(3): 6-17 (2013) - [j40]Azadeh Davoodi, Min Li, Mohammad Tehranipoor:
A Sensor-Assisted Self-Authentication Framework for Hardware Trojan Detection. IEEE Des. Test 30(5): 74-82 (2013) - [j39]Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor:
Efficient Pattern Generation for Small-Delay Defects Using Selection of Critical Faults. J. Electron. Test. 29(1): 35-48 (2013) - [j38]Xuehui Zhang, Andrew Ferraiuolo, Mohammad Tehranipoor:
Detection of trojans using a combined ring oscillator network and off-chip transient power analysis. ACM J. Emerg. Technol. Comput. Syst. 9(3): 25:1-25:20 (2013) - [j37]Fang Bao, Ke Peng, Mohammad Tehranipoor, Krishnendu Chakrabarty:
Generation of Effective 1-Detect TDF Patterns for Detecting Small-Delay Defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1583-1594 (2013) - [j36]Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty:
Power-safe application of tdf patterns to flip-chip designs during wafer test. ACM Trans. Design Autom. Electr. Syst. 18(3): 43:1-43:20 (2013) - [j35]Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
Crosstalk- and Process Variations-Aware High-Quality Tests for Small-Delay Defects. IEEE Trans. Very Large Scale Integr. Syst. 21(6): 1129-1142 (2013) - 2012
- [j34]Junxia Ma, Mohammad Tehranipoor, Patrick Girard:
A Layout-Aware Pattern Grading Procedure for Critical Paths Considering Power Supply Noise and Crosstalk. J. Electron. Test. 28(2): 201-214 (2012) - [j33]Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty:
Ensuring Power-Safe Application of Test Patterns Using an Effective Gating Approach Considering Current Limits. J. Low Power Electron. 8(2): 235-247 (2012) - [j32]Hassan Salmani, Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty, Patrick Girard, Xiaoqing Wen:
Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns. J. Low Power Electron. 8(2): 248-258 (2012) - [j31]Hassan Salmani, Mohammad Tehranipoor:
Layout-Aware Switching Activity Localization to Enhance Hardware Trojan Detection. IEEE Trans. Inf. Forensics Secur. 7(1): 76-87 (2012) - [j30]Hassan Salmani, Mohammad Tehranipoor, Jim Plusquellic:
A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 112-125 (2012) - [j29]Xiaoxiao Wang, Mohammad Tehranipoor, Saji George, Dat Tran, LeRoy Winemberg:
Design and Analysis of a Delay Sensor Applicable to Process/Environmental Variations and Aging Measurements. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1405-1418 (2012) - 2011
- [j28]Mohammad Tehranipoor, Hassan Salmani, Xuehui Zhang, Michel Wang, Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld:
Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges. Computer 44(7): 66-74 (2011) - [j27]Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty:
A Metric to Target Small-Delay Defects in Industrial Circuits. IEEE Des. Test Comput. 28(2): 52-61 (2011) - [j26]Junxia Ma, Mohammad Tehranipoor:
Layout-Aware Critical Path Delay Test Under Maximum Power Supply Noise Effects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1923-1934 (2011) - [j25]Charles Lamech, Reza M. Rad, Mohammad Tehranipoor, Jim Plusquellic:
An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities. IEEE Trans. Inf. Forensics Secur. 6(3-2): 1170-1179 (2011) - 2010
- [j24]Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld, Mohammad Tehranipoor:
Trustworthy Hardware: Identifying and Classifying Hardware Trojans. Computer 43(10): 39-46 (2010) - [j23]Mohammad Tehranipoor, Farinaz Koushanfar:
Guest Editors' Introduction: Confronting the Hardware Trustworthiness Problem. IEEE Des. Test Comput. 27(1): 8-9 (2010) - [j22]Mohammad Tehranipoor, Farinaz Koushanfar:
A Survey of Hardware Trojan Taxonomy and Detection. IEEE Des. Test Comput. 27(1): 10-25 (2010) - [j21]Mohammad Tehranipoor, Kenneth M. Butler:
Power Supply Noise: A Survey on Effects and Research. IEEE Des. Test Comput. 27(2): 51-67 (2010) - [j20]Kohei Miyase, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara, Patrick Girard, Laung-Terng Wang, Mohammad Tehranipoor:
High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme. IEICE Trans. Inf. Syst. 93-D(1): 2-9 (2010) - [j19]Nisar Ahmed, Mohammad Tehranipoor:
A Novel IR-Drop Tolerant Transition Delay Fault Test Pattern Generation Procedure. J. Low Power Electron. 6(1): 150-159 (2010) - [j18]Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Xiaoqing Wen, Nisar Ahmed:
A Comprehensive Analysis of Transition Fault Coverage and Test Power Dissipation for Launch-Off-Shift and Launch-Off-Capture Schemes. J. Low Power Electron. 6(2): 359-374 (2010) - [j17]Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep Submicrometer Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(5): 760-773 (2010) - [j16]Reza M. Rad, James F. Plusquellic, Mohammad Tehranipoor:
A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental Conditions. IEEE Trans. Very Large Scale Integr. Syst. 18(12): 1735-1744 (2010) - 2009
- [j15]Nisar Ahmed, Mohammad Tehranipoor:
A Novel Faster-Than-at-Speed Transition-Delay Test Method Considering IR-Drop Effects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(10): 1573-1582 (2009) - 2008
- [j14]Mohammad Tehranipoor, Reza M. Rad:
Defect Tolerance for Nanoscale Crossbar-Based Devices. IEEE Des. Test Comput. 25(6): 549-559 (2008) - [j13]Reza M. Rad, Mohammad Tehranipoor:
SCT: A novel approach for testing and configuring nanoscale devices. ACM J. Emerg. Technol. Comput. Syst. 4(3): 14:1-14:24 (2008) - [j12]Jeremy Lee, Mohammad Tehranipoor:
Layout-Aware Transition-Delay Fault Pattern Generation with Evenly Distributed Switching Activity. J. Low Power Electron. 4(3): 360-371 (2008) - [j11]Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed:
Low-Transition Test Pattern Generation for BIST-Based Applications. IEEE Trans. Computers 57(3): 303-315 (2008) - 2007
- [j10]Mohammad Tehranipoor, Kenneth M. Butler:
Guest Editors' Introduction: IR Drop in Very Deep-Submicron Designs. IEEE Des. Test Comput. 24(3): 214-215 (2007) - [j9]Mohammad Tehranipoor:
Guest Editorial. J. Electron. Test. 23(2-3): 115-116 (2007) - [j8]Reza M. Rad, Mohammad Tehranipoor:
Evaluating area and performance of hybrid FPGAs with nanoscale clusters and CMOS routing. ACM J. Emerg. Technol. Comput. Syst. 3(3): 15 (2007) - [j7]Nisar Ahmed, Mohammad Tehranipoor, C. P. Ravikumar, Kenneth M. Butler:
Local At-Speed Scan Enable Generation for Transition Fault Testing Using Low-Cost Testers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 896-906 (2007) - [j6]Mohammad Tehranipoor, Reza M. Rad:
Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 943-958 (2007) - [j5]Jeremy Lee, Mohammad Tehranipoor, Chintan Patel, Jim Plusquellic:
Securing Designs against Scan-Based Side-Channel Attacks. IEEE Trans. Dependable Secur. Comput. 4(4): 325-336 (2007) - [j4]Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ravikumar:
A critical-path-aware partial gating approach for test power reduction. ACM Trans. Design Autom. Electr. Syst. 12(2): 17 (2007) - 2006
- [j3]Jim Plusquellic, Dhruva Acharyya, Abhishek Singh, Mohammad Tehranipoor, Chintan Patel:
Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method. IEEE Des. Test Comput. 23(4): 278-293 (2006) - [j2]Nisar Ahmed, Mohammad Tehranipoor:
Improving Transition Delay Test Using a Hybrid Method. IEEE Des. Test Comput. 23(5): 402-412 (2006) - 2005
- [j1]Mohammad Tehranipoor, Mehrdad Nourani, Krishnendu Chakrabarty:
Nine-coded compression technique for testing embedded cores in SoCs. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 719-731 (2005)
Conference and Workshop Papers
- 2024
- [c226]Nusrat Farzana Dipu, Muhammad Monir Hossain, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor:
FormalFuzzer: Formal Verification Assisted Fuzz Testing for SoC Vulnerability Detection. ASPDAC 2024: 355-361 - [c225]Nurun Nahar Mondol, Arash Vafaei, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor:
RL-TPG: Automated Pre-Silicon Security Verification through Reinforcement Learning-Based Test Pattern Generation. DATE 2024: 1-6 - [c224]Bulbul Ahmed, M. Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation. ACM Great Lakes Symposium on VLSI 2024: 489-494 - [c223]Henian Li, Lang Lin, Norman Chang, Sreeja Chowdhury, Dylan Mcguire, Bozidar Novakovic, Kazuki Monta, Makoto Nagata, Ying-Shiun Li, Pramod M. S, Piin-Chen Yeh, Jyh-Shing Roger Jang, Chengjie Xi, Qiutong Jin, Navid Asadi, Mark M. Tehranipoor:
Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-Channel Simulation. HOST 2024: 107-111 - [c222]Dipayan Saha, Katayoon Yahyaei, Sujan Kumar Saha, Mark M. Tehranipoor, Farimah Farahmandi:
Empowering Hardware Security with LLM: The Development of a Vulnerable Hardware Database. HOST 2024: 233-243 - [c221]Md Sami Ul Islam Sami, Jingbo Zhou, Sujan Kumar Saha, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
SAP: Silicon Authentication Platform for System-on-Chip Supply Chain Vulnerabilities. ISPASS 2024: 109-119 - [c220]Paul Calzada, Md Sami Ul Islam Sami, Jingbo Zhou, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor:
HI-SST: Safeguarding SiP Authenticity Through Secure Split-Test in Heterogeneous Integration. ISVLSI 2024: 379-384 - [c219]Sree Ranjani Rajendran, Farimah Farahmandi, Mark M. Tehranipoor:
CAD Tools Pathway in Hardware Security. VLSID 2024: 342-347 - 2023
- [c218]Hasan Al Shaikh, Arash Vafaei, Mridha Md Mashahedur Rahman, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
SHarPen: SoC Security Verification by Hardware Penetration Test. ASP-DAC 2023: 579-584 - [c217]Shang Shi, Nitin Pundir, Hadi Mardani Kamali, Mark M. Tehranipoor, Farimah Farahmandi:
SecHLS: Enabling Security Awareness in High-Level Synthesis. ASP-DAC 2023: 585-590 - [c216]Zahin Ibnat, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Hadi Mardani Kamali, Mark M. Tehranipoor, Farimah Farahmandi:
ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs. DAC 2023: 1-6 - [c215]Rui Guo, M. Sazadur Rahman, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
EvoLUTe: Evaluation of Look-Up-Table-based Fine-Grained IP Redaction. DATE 2023: 1-6 - [c214]Muhammad Monir Hossain, Arash Vafaei, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
SoCFuzzer: SoC Vulnerability Detection using Cost Function enabled Fuzz Testing. DATE 2023: 1-6 - [c213]Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor:
SheLL: Shrinking eFPGA Fabrics for Logic Locking. DATE 2023: 1-6 - [c212]Md Rafid Muttaki, Shyvagata Saha, Hadi Mardani Kamali, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
RTLock: IP Protection using Scan-Aware Logic Locking at RTL. DATE 2023: 1-6 - [c211]Sree Ranjani Rajendran, Shams Tarek, Benjamin M. Hicks, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor:
HUnTer: Hardware Underneath Trigger for Exploiting SoC-level Vulnerabilities. DATE 2023: 1-6 - [c210]Hasan Al Shaikh, Mohammad Bin Monjil, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor, Fahim Rahman:
QuardTropy: Detecting and Quantifying Unauthorized Information Leakage in Hardware Designs using g-entropy. DFT 2023: 1-6 - [c209]Upoma Das, M. Sazadur Rahman, N. Nalla Anandakumar, Kimia Zamiri Azar, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
PSC-Watermark: Power Side Channel Based IP Watermarking Using Clock Gates. ETS 2023: 1-6 - [c208]Tao Zhang, Mark M. Tehranipoor, Farimah Farahmandi:
BitFREE: On Significant Speedup and Security Applications of FPGA Bitstream Format Reverse Engineering. ETS 2023: 1-6 - [c207]Mark M. Tehranipoor:
Microelectronics Security in CHIPS Era. ACM Great Lakes Symposium on VLSI 2023: 229 - [c206]Yunkai Bai, Jungmin Park, Mark M. Tehranipoor, Domenic Forte:
Dual Channel EM/Power Attack Using Mutual Information and its Real-time Implementation. HOST 2023: 133-143 - [c205]Daniel Volya, Tao Zhang, Nashmin Alam, Mark M. Tehranipoor, Prabhat Mishra:
Towards Secure Classical-Quantum Systems. HOST 2023: 283-292 - [c204]Muhammad Monir Hossain, Nusrat Farzana Dipu, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
TaintFuzzer: SoC Security Verification using Taint Inference-enabled Fuzzing. ICCAD 2023: 1-9 - [c203]Rasheed Kibria, Farimah Farahmandi, Mark M. Tehranipoor:
ARC-FSM-G: Automatic Security Rule Checking for Finite State Machine at the Netlist Abstraction. ITC 2023: 320-329 - [c202]Sohrab Aftabjahani, Mark M. Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein:
Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance. VTS 2023: 1-10 - [c201]Mridha Md Mashahedur Rahman, M. Sazadur Rahman, Rasheed Kibria, Mike Borza, Bandy Reddy, Adam Cron, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
CAPEC: A Cellular Automata Guided FSM-based IP Authentication Scheme. VTS 2023: 1-8 - 2022
- [c200]M. Sazadur Rahman, Rui Guo, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mohamed Abdel-Moneum, Mark M. Tehranipoor:
O'clock: lock the clock via clock-gating for SoC IP protection. DAC 2022: 775-780 - [c199]Dhwani Mehta, Nurun N. Mondol, Farimah Farahmandi, Mark M. Tehranipoor:
AIME: Watermarking AI Models by Leveraging Errors. DATE 2022: 304-309 - [c198]Nitin Pundir, Henian Li, Lang Lin, Norman Chang, Farimah Farahmandi, Mark M. Tehranipoor:
Security Properties Driven Pre-Silicon Laser Fault Injection Assessment. HOST 2022: 9-12 - [c197]Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor:
Warm Up before Circuit De-obfuscation? An Exploration through Bounded-Model-Checkers. HOST 2022: 13-16 - [c196]Md Rafid Muttaki, Tao Zhang, Mark M. Tehranipoor, Farimah Farahmandi:
FTC: A Universal Sensor for Fault Injection Attack Detection. HOST 2022: 117-120 - [c195]Amit Mazumder Shuvo, Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark M. Tehranipoor:
LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis. ISVLSI 2022: 134-139 - [c194]Upoma Das, Md Rafid Muttaki, Mark M. Tehranipoor, Farimah Farahmandi:
ADWIL: A Zero-Overhead Analog Device Watermarking Using Inherent IP Features. ITC 2022: 155-164 - [c193]Rasheed Kibria, M. Sazadur Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
RTL-FSMx: Fast and Accurate Finite State Machine Extraction at the RTL for Security Applications. ITC 2022: 165-174 - [c192]Rasheed Kibria, Nusrat Farzana, Farimah Farahmandi, Mark M. Tehranipoor:
FSMx: Finite State Machine Extraction from Flattened Netlist With Application to Security. VTS 2022: 1-7 - 2021
- [c191]Md Rafid Muttaki, Roshanak Mohammadivojdan, Mark M. Tehranipoor, Farimah Farahmandi:
HLock: Locking IPs at the High-Level Language. DAC 2021: 79-84 - [c190]Tao Zhang, Jungmin Park, Mark M. Tehranipoor, Farimah Farahmandi:
PSC-TG: RTL Power Side-Channel Leakage Assessment with Test Pattern Generation. DAC 2021: 709-714 - [c189]Md Sami Ul Islam Sami, Fahim Rahman, Farimah Farahmandi, Adam Cron, Mike Borza, Mark M. Tehranipoor:
Invited: End-to-End Secure SoC Lifecycle Management. DAC 2021: 1295-1298 - [c188]Muhammad Monir Hossain, Farimah Farahmandi, Mark M. Tehranipoor, Fahim Rahman:
BOFT: Exploitable Buffer Overflow Detection by Information Flow Tracking. DATE 2021: 1126-1129 - [c187]Mohammad Farmani, Mark M. Tehranipoor, Fahim Rahman:
RHAT: Efficient RowHammer-Aware Test for Modern DRAM Modules. ETS 2021: 1-6 - [c186]Md Sami Ul Islam Sami, Fahim Rahman, Adam Cron, Dale R. Donchin, Mike Borza, Farimah Farahmandi, Mark M. Tehranipoor:
POCA: First Power-on Chip Authentication in Untrusted Foundry and Assembly. HOST 2021: 124-135 - [c185]Bulbul Ahmed, Fahim Rahman, Nick Hooten, Farimah Farahmandi, Mark M. Tehranipoor:
AutoMap: Automated Mapping of Security Properties Between Different Levels of Abstraction in Design Flow. ICCAD 2021: 1-9 - [c184]Nitin Pundir, Farimah Farahmandi, Mark M. Tehranipoor:
Secure High-Level Synthesis: Challenges and Solutions. ISQED 2021: 164-171 - [c183]Muhammad Monir Hossain, Sajeed Mohammad, Jason Vosatka, Jeffery S. Allen, Monica Allen, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
HEXON: Protecting Firmware Using Hardware-Assisted Execution-Level Obfuscation. ISVLSI 2021: 343-349 - [c182]M. Sazadur Rahman, Henian Li, Rui Guo, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment. ITC 2021: 180-189 - [c181]Arash Vafaei, Nick Hooten, Mark M. Tehranipoor, Farimah Farahmandi:
SymbA: Symbolic Execution at C-level for Hardware Trojan Activation. ITC 2021: 223-232 - [c180]Sohrab Aftabjahani, Ryan Kastner, Mark M. Tehranipoor, Farimah Farahmandi, Jason Oberg, Anders Nordstrom, Nicole Fern, Alric Althoff:
Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions. VTS 2021: 1-10 - [c179]Nusrat Farzana, Avinash Ayalasomayajula, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
SAIF: Automated Asset Identification for Security Verification at the Register Transfer Level. VTS 2021: 1-7 - 2020
- [c178]Mark M. Tehranipoor:
The Pursuit of Happiness: Establishing Hardware Root-of-Trust for Cyber Security. ASHES@CCS 2020: 1 - [c177]M. Tanjidur Rahman, Shahin Tajik, M. Sazadur Rahman, Mark M. Tehranipoor, Navid Asadizanjani:
The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes. HOST 2020: 262-272 - [c176]Andrew Stern, Dhwani Mehta, Shahin Tajik, Farimah Farahmandi, Mark M. Tehranipoor:
SPARTA: A Laser Probing Approach for Trojan Detection. ITC 2020: 1-10 - [c175]Leonidas Lavdas, M. Tanjidur Rahman, Mark M. Tehranipoor, Navid Asadizanjani:
On Optical Attacks Making Logic Obfuscation Fragile. ITC-Asia 2020: 71-76 - [c174]Adam Duncan, Adib Nahiyan, Fahim Rahman, Grant Skipper, Martin Swany, Andrew Lukefahr, Farimah Farahmandi, Mark M. Tehranipoor:
SeRFI: Secure Remote FPGA Initialization in an Untrusted Environment. VTS 2020: 1-6 - 2019
- [c173]Beomsoo Park, Mark M. Tehranipoor, Domenic Forte, Nima Maghari:
A Metal-Via Resistance Based Physically Unclonable Function with 1.18% Native Instability. CICC 2019: 1-4 - [c172]Md. Mahbub Alam, Shahin Tajik, Fatemeh Ganji, Mark M. Tehranipoor, Domenic Forte:
RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions. FDTC 2019: 48-55 - [c171]Md Tanvir Arafin, Hao-Ting Shen, Mark M. Tehranipoor, Gang Qu:
LPN-based Device Authentication Using Resistive Memory. ACM Great Lakes Symposium on VLSI 2019: 9-14 - [c170]Adam Duncan, Grant Skipper, Andrew Stern, Adib Nahiyan, Fahim Rahman, Andrew Lukefahr, Mark M. Tehranipoor, Martin Swany:
FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection. HOST 2019: 81-90 - [c169]Xiaolong Guo, Raj Gautam Dutta, Jiaji He, Mark M. Tehranipoor, Yier Jin:
QIF-Verilog: Quantitative Information-Flow based Hardware Description Languages for Pre-Silicon Security Assessment. HOST 2019: 91-100 - [c168]Jungmin Park, Seongjoon Cho, Taejin Lim, Swarup Bhunia, Mark M. Tehranipoor:
SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator. ICCAD 2019: 1-8 - [c167]Adam Duncan, Fahim Rahman, Andrew Lukefahr, Farimah Farahmandi, Mark M. Tehranipoor:
FPGA Bitstream Security: A Day in the Life. ITC 2019: 1-10 - [c166]Nusrat Farzana, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
SoC Security Verification using Property Checking. ITC 2019: 1-10 - [c165]Domenic Forte, Swarup Bhunia, Ramesh Karri, Jim Plusquellic, Mark M. Tehranipoor:
IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future. ITC 2019: 1-4 - [c164]Fatemeh Ganji, Shahin Tajik, Pascal Stauss, Jean-Pierre Seifert, Domenic Forte, Mark M. Tehranipoor:
Rock'n'roll PUFs: Crafting Provably Secure PUFs from Less Secure Ones. PROOFS 2019: 33-48 - [c163]Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark M. Tehranipoor:
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. VTS 2019: 1-6 - 2018
- [c162]Qihang Shi, Huanyu Wang, Navid Asadizanjani, Mark M. Tehranipoor, Domenic Forte:
A Comprehensive Analysis on Vulnerability of Active Shields to Tilted Microprobing Attacks. AsianHOST 2018: 98-103 - [c161]Yueying Han, Xiaoxiao Wang, Mark M. Tehranipoor:
CIPA: Concurrent IC and PCB Authentication Using On-chip Ring Oscillator Array. ATS 2018: 109-114 - [c160]Jungmin Park, Xiaolin Xu, Yier Jin, Domenic Forte, Mark M. Tehranipoor:
Power-based side-channel instruction-level disassembler. DAC 2018: 119:1-119:6 - [c159]Orlando Arias, Fahim Rahman, Mark M. Tehranipoor, Yier Jin:
Device attestation: Past, present, and future. DATE 2018: 473-478 - [c158]Kai Yang, Jungmin Park, Mark M. Tehranipoor, Swarup Bhunia:
Hardware virtualization for protection against power analysis attack. HOST 2018: 167-172 - [c157]Mahabubul Alam, Sreeja Chowdhury, Mark M. Tehranipoor, Ujjwal Guin:
Robust, low-cost, and accurate detection of recycled ICs using digital signatures. HOST 2018: 209-214 - [c156]Kai Yang, Jungmin Park, Mark M. Tehranipoor, Swarup Bhunia:
Robust Timing Attack Countermeasure on Virtual Hardware. ISVLSI 2018: 148-153 - [c155]Andrew Stern, Ulbert Botero, Bicky Shakya, Hao-Ting Shen, Domenic Forte, Mark M. Tehranipoor:
EMFORCED: EM-based Fingerprinting Framework for Counterfeit Detection with Demonstration on Remarked and Cloned ICs. ITC 2018: 1-9 - [c154]M. Tanjidur Rahman, Qihang Shi, Shahin Tajik, Hao-Ting Shen, Damon L. Woodard, Mark M. Tehranipoor, Navid Asadizanjani:
Physical Inspection & Attacks: New Frontier in Hardware Security. IVSW 2018: 93-102 - 2017
- [c153]Xiaoxiao Wang, Yueyu Guo, Tauhid Ramhan, Dongrong Zhang, Mark M. Tehranipoor:
DOST: Dynamically obfuscated wrapper for split test against IC piracy. AsianHOST 2017: 1-6 - [c152]Zimu Guo, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
MPA: Model-assisted PCB attestation via board-level RO and temperature compensation. AsianHOST 2017: 25-30 - [c151]Kun Yang, Ulbert Botero, Hao-Ting Shen, Domenic Forte, Mark M. Tehranipoor:
A split manufacturing approach for unclonable chipless RFIDs for pharmaceutical supply chain security. AsianHOST 2017: 61-66 - [c150]Robert Karam, Tamzidul Hoque, Sandip Ray, Mark M. Tehranipoor, Swarup Bhunia:
MUTARCH: Architectural diversity for FPGA device and IP security. ASP-DAC 2017: 611-616 - [c149]Gustavo K. Contreras, Adib Nahiyan, Swarup Bhunia, Domenic Forte, Mark M. Tehranipoor:
Security vulnerability analysis of design-for-test exploits for asset protection in SoCs. ASP-DAC 2017: 617-622 - [c148]Nima Karimian, Mark M. Tehranipoor, Domenic Forte:
Non-fiducial PPG-based authentication for healthcare application. BHI 2017: 429-432 - [c147]Animesh Chhotaray, Adib Nahiyan, Thomas Shrimpton, Domenic Forte, Mark M. Tehranipoor:
Standardizing Bad Cryptographic Practice: A Teardown of the IEEE Standard for Protecting Electronic-design Intellectual Property. CCS 2017: 1533-1546 - [c146]Chip-Hong Chang, Marten van Dijk, Farinaz Koushanfar, Ulrich Rührmair, Mark M. Tehranipoor:
ASHES 2017: Workshop on Attacks and Solutions in Hardware Security. CCS 2017: 2623-2625 - [c145]Xiaolin Xu, Bicky Shakya, Mark M. Tehranipoor, Domenic Forte:
Novel Bypass Attack and BDD-based Tradeoff Analysis Against All Known Logic Locking Attacks. CHES 2017: 189-210 - [c144]Zimu Guo, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
FFD: A Framework for Fake Flash Detection. DAC 2017: 8:1-8:6 - [c143]Qihang Shi, Kan Xiao, Domenic Forte, Mark M. Tehranipoor:
Securing Split Manufactured ICs with Wire Lifting Obfuscated Built-In Self-Authentication. ACM Great Lakes Symposium on VLSI 2017: 339-344 - [c142]Sarah Amir, Bicky Shakya, Domenic Forte, Mark M. Tehranipoor, Swarup Bhunia:
Comparative Analysis of Hardware Obfuscation for IP Protection. ACM Great Lakes Symposium on VLSI 2017: 363-368 - [c141]Troy Bryant, Sreeja Chowdhury, Domenic Forte, Mark M. Tehranipoor, Nima Maghari:
A stochastic all-digital weak physically unclonable function for analog/mixed-signal applications. HOST 2017: 140-145 - [c140]Nima Karimian, Zimu Guo, Mark M. Tehranipoor, Domenic Forte:
Human recognition from photoplethysmography (PPG) based on non-fiducial features. ICASSP 2017: 4636-4640 - [c139]Mehdi Sadi, Sukeshwar Kannan, Luke England, Mark M. Tehranipoor:
Design of a digital IP for 3D-IC die-to-die clock synchronization. ISCAS 2017: 1-4 - [c138]Adib Nahiyan, Mehdi Sadi, Rahul Vittal, Gustavo K. Contreras, Domenic Forte, Mark M. Tehranipoor:
Hardware trojan detection through information flow security verification. ITC 2017: 1-10 - [c137]Liting Yu, Xiaoxiao Wang, Fahim Rahman, Mark M. Tehranipoor:
iPUF: Interconnect PUF with Self-Masking Circuit for Performance Enhancement. MTV 2017: 45-50 - [c136]Fahim Rahman, Mohammad Farmani, Mark M. Tehranipoor, Yier Jin:
Hardware-Assisted Cybersecurity for IoT Devices. MTV 2017: 51-56 - [c135]Jungmin Park, Massimiliano Corba, Antonio E. de la Sema, Richard L. Vigeant, Mark M. Tehranipoor, Swarup Bhunia:
ATAVE: A framework for automatic timing attack vulnerability evaluation. MWSCAS 2017: 559-562 - [c134]Sreeja Chowdhury, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
Aging resilient RO PUF with increased reliability in FPGA. ReConFig 2017: 1-7 - [c133]Dongrong Zhang, Miao Tony He, Xiaoxiao Wang, Mark M. Tehranipoor:
Dynamically obfuscated scan for protecting IPs against scan-based attacks throughout supply chain. VTS 2017: 1-6 - 2016
- [c132]Adib Nahiyan, Kan Xiao, Kun Yang, Yier Jin, Domenic Forte, Mark M. Tehranipoor:
AVFSM: a framework for identifying and mitigating vulnerabilities in FSMs. DAC 2016: 89:1-89:6 - [c131]Thao Le, Jia Di, Mark M. Tehranipoor, Domenic Forte, Lei Wang:
Tracking Data Flow at Gate-Level through Structural Checking. ACM Great Lakes Symposium on VLSI 2016: 185-189 - [c130]Zimu Guo, Mark M. Tehranipoor, Domenic Forte:
Aging attacks for key extraction on permutation-based obfuscation. AsianHOST 2016: 1-6 - [c129]Md. Tauhidur Rahman, Domenic Forte, Xiaoxiao Wang, Mark M. Tehranipoor:
Enhancing noise sensitivity of embedded SRAMs for robust true random number generation in SoCs. AsianHOST 2016: 1-6 - [c128]Kun Yang, Domenic Forte, Mark M. Tehranipoor:
UCR: An unclonable chipless RFID tag. HOST 2016: 7-12 - [c127]Qihang Shi, Navid Asadizanjani, Domenic Forte, Mark M. Tehranipoor:
A layout-driven framework to assess vulnerability of ICs to microprobing attacks. HOST 2016: 155-160 - [c126]Zimu Guo, Md. Tauhidur Rahman, Mark M. Tehranipoor, Domenic Forte:
A zero-cost approach to detect recycled SoC chips using embedded SRAM. HOST 2016: 191-196 - [c125]Bicky Shakya, Navid Asadizanjani, Domenic Forte, Mark M. Tehranipoor:
Chip editor: leveraging circuit edit for logic obfuscation and trusted fabrication. ICCAD 2016: 30 - [c124]Liting Yu, Xiaoxiao Wang, Yuanqing Cheng, Xiaoying Zhao, Pengyuan Jiao, Aixin Chen, Donglin Su, LeRoy Winemberg, Mehdi Sadi, Mark M. Tehranipoor:
An efficient all-digital IR-Drop Alarmer for DVFS-based SoC. ISCAS 2016: 221-224 - [c123]Zimu Guo, Nima Karimian, Mark M. Tehranipoor, Domenic Forte:
Hardware security meets biometrics for the age of IoT. ISCAS 2016: 1318-1321 - [c122]Travis Meade, Yier Jin, Mark M. Tehranipoor, Shaojie Zhang:
Gate-level netlist reverse engineering for hardware security: Control logic register identification. ISCAS 2016: 1334-1337 - [c121]Liang Wu, Xiaoxiao Wang, Xiaoying Zhao, Yuanqing Cheng, Donglin Su, Aixin Chen, Qihang Shi, Mark M. Tehranipoor:
AES design improvement towards information safety. ISCAS 2016: 1706-1709 - [c120]Hao-Ting Shen, Fahim Rahman, Bicky Shakya, Mark M. Tehranipoor, Domenic Forte:
Selective Enhancement of Randomness at the Materials Level: Poly-Si Based Physical Unclonable Functions (PUFs). ISVLSI 2016: 188-193 - [c119]Md. Mahbub Alam, Mark M. Tehranipoor, Domenic Forte:
Recycled FPGA detection using exhaustive LUT path delay characterization. ITC 2016: 1-10 - [c118]Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark M. Tehranipoor:
BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning. ITC 2016: 1-10 - [c117]Troy Bryant, Sreeja Chowdhury, Domenic Forte, Mark M. Tehranipoor, Nima Maghari:
A stochastic approach to analog physical unclonable function. MWSCAS 2016: 1-4 - [c116]Robert Karam, Tamzidul Hoque, Sandip Ray, Mark M. Tehranipoor, Swarup Bhunia:
Technical demonstration session: Software toolflow for FPGA bitstream obfuscation. ReConFig 2016: 1-2 - [c115]Robert Karam, Tamzidul Hoque, Sandip Ray, Mark M. Tehranipoor, Swarup Bhunia:
Robust bitstream protection in FPGA-based systems through low-overhead obfuscation. ReConFig 2016: 1-8 - [c114]Mark M. Tehranipoor:
New Directions in Hardware Security. VLSID 2016: 50-52 - [c113]Miao Tony He, Gustavo K. Contreras, Mark M. Tehranipoor, Dat Tran, LeRoy Winemberg:
Test-point insertion efficiency analysis for LBIST applications. VTS 2016: 1-6 - [c112]Sandip Ray, Swarup Bhunia, Yier Jin, Mark M. Tehranipoor:
Security validation in IoT space. VTS 2016: 1 - 2015
- [c111]Zimu Guo, Mark M. Tehranipoor, Domenic Forte, Jia Di:
Investigation of obfuscation-based anti-reverse engineering for printed circuit boards. DAC 2015: 114:1-114:6 - [c110]Shuai Chen, Junlin Chen, Domenic Forte, Jia Di, Mark M. Tehranipoor, Lei Wang:
Chip-level anti-reverse engineering using transformable interconnects. DFTS 2015: 109-114 - [c109]Gustavo K. Contreras, Nisar Ahmed, LeRoy Winemberg, Mark M. Tehranipoor:
Predictive LBIST model and partial ATPG for seed extraction. DFTS 2015: 139-146 - [c108]Mehdi Sadi, Mark M. Tehranipoor, Xiaoxiao Wang, LeRoy Winemberg:
Speed Binning Using Machine Learning And On-chip Slack Sensors. ACM Great Lakes Symposium on VLSI 2015: 155-160 - [c107]Kan Xiao, Domenic Forte, Mark M. Tehranipoor:
Efficient and secure split manufacturing via obfuscated built-in self-authentication. HOST 2015: 14-19 - [c106]Kun Yang, Domenic Forte, Mark M. Tehranipoor:
Protecting Endpoint Devices in IoT Supply Chain. ICCAD 2015: 351-356 - [c105]Bicky Shakya, Ujjwal Guin, Mark M. Tehranipoor, Domenic Forte:
Performance optimization for on-chip sensors to detect recycled ICs. ICCD 2015: 289-295 - [c104]Md. Tauhidur Rahman, Domenic Forte, Fahim Rahman, Mark M. Tehranipoor:
A pair selection algorithm for robust RO-PUF against environmental variations and aging. ICCD 2015: 415-418 - [c103]Gustavo K. Contreras, Yang Zhao, Nisar Ahmed, LeRoy Winemberg, Mohammad Tehranipoor:
LBIST pattern reduction by learning ATPG test cube properties. ISQED 2015: 147-153 - [c102]Bicky Shakya, Fahim Rahman, Mark M. Tehranipoor, Domenic Forte:
Harnessing Nanoscale Device Properties for Hardware Security. MTV 2015: 42-47 - [c101]Kun Yang, Domenic Forte, Mark M. Tehranipoor:
ReSC: RFID-Enabled Supply Chain Management and Traceability for Network Devices. RFIDSec 2015: 32-49 - [c100]Mehdi Sadi, LeRoy Winemberg, Mark M. Tehranipoor:
A robust digital sensor IP and sensor insertion flow for in-situ path timing slack monitoring in SoCs. VTS 2015: 1-6 - 2014
- [c99]Mehdi Sadi, Zoe Conroy, Bill Eklow, Matthias Kamm, Nematollah Bidokhti, Mark Mohammad Tehranipoor:
An All Digital Distributed Sensor Network Based Framework for Continuous Noise Monitoring and Timing Failure Analysis in SoCs. ATS 2014: 269-274 - [c98]Alison Hosey, Md. Tauhidur Rahman, Kan Xiao, Domenic Forte, Mohammad Tehranipoor:
Advanced Analysis of Cell Stability for Reliable SRAM PUFs. ATS 2014: 348-353 - [c97]Ujjwal Guin, Xuehui Zhang, Domenic Forte, Mohammad Tehranipoor:
Low-cost On-Chip Structures for Combating Die and IC Recycling. DAC 2014: 87:1-87:6 - [c96]Md. Tauhidur Rahman, Kan Xiao, Domenic Forte, Xuhei Zhang, Zhijie Jerry Shi, Mohammad Tehranipoor:
TI-TRNG: Technology Independent True Random Number Generator. DAC 2014: 179:1-179:6 - [c95]Said Hamdioui, Jean-Luc Danger, Giorgio Di Natale, Fethulah Smailbegovic, Gerard van Battum, Mark M. Tehranipoor:
Hacking and protecting IC hardware. DATE 2014: 1-7 - [c94]Md. Tauhidur Rahman, Domenic Forte, Jim Fahrny, Mohammad Tehranipoor:
ARO-PUF: An aging-resistant ring oscillator PUF design. DATE 2014: 1-6 - [c93]Md. Tauhidur Rahman, Domenic Forte, Quihang Shi, Gustavo K. Contreras, Mark Mohammad Tehranipoor:
CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly. DFT 2014: 46-51 - [c92]Halit Dogan, Domenic Forte, Mark Mohammad Tehranipoor:
Aging analysis for recycled FPGA detection. DFT 2014: 171-176 - [c91]Miao Tony He, Mohammad Tehranipoor:
SAM: A comprehensive mechanism for accessing embedded sensors in modern SoCs. DFT 2014: 240-245 - [c90]Kan Xiao, Md. Tauhidur Rahman, Domenic Forte, Yu Huang, Mei Su, Mohammad Tehranipoor:
Bit selection algorithm suitable for high-volume production of SRAM-PUF. HOST 2014: 101-106 - [c89]Qihang Shi, Mohammad Tehranipoor, Xiaoxiao Wang, LeRoy Winemberg:
On-chip sensor selection for effective speed-binning. MWSCAS 2014: 1073-1076 - [c88]Md. Tauhidur Rahman, Domenic Forte, Quihang Shi, Gustavo K. Contreras, Mohammad Tehranipoor:
CSST: An Efficient Secure Split-Test for Preventing IC Piracy. NATW 2014: 43-47 - [c87]Mohammad Tehranipoor, Charles Knapp:
T1A: Opportunities and challenges for secure hardware and verifying trust in integrated circuits. SoCC 2014: xxxiii-xxxiv - [c86]Mohammad Tehranipoor, Domenic Forte:
Tutorial T4: All You Need to Know about Hardware Trojans and Counterfeit ICs. VLSID 2014: 9-10 - [c85]Jifeng Chen, LeRoy Winemberg, Mohammad Tehranipoor:
Identification of testable representative paths for low-cost verification of circuit performance during manufacturing and in-field tests. VTS 2014: 1-6 - 2013
- [c84]Akihiro Tomita, Xiaoqing Wen, Yasuo Sato, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang:
On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST. Asian Test Symposium 2013: 19-24 - [c83]Fang Bao, Mohammad Tehranipoor, Harry H. Chen:
Worst-Case Critical-Path Delay Analysis Considering Power-Supply Noise. Asian Test Symposium 2013: 37-42 - [c82]Jifeng Chen, Mohammad Tehranipoor:
Critical Paths Selection and Test Cost Reduction Considering Process Variations. Asian Test Symposium 2013: 259-264 - [c81]Hassan Salmani, Mohammad Tehranipoor:
Analyzing circuit vulnerability to hardware Trojan insertion at the behavioral level. DFTS 2013: 190-195 - [c80]Gustavo K. Contreras, Md. Tauhidur Rahman, Mohammad Tehranipoor:
Secure Split-Test for preventing IC piracy by untrusted foundry and assembly. DFTS 2013: 196-203 - [c79]Kan Xiao, Mohammad Tehranipoor:
BISA: Built-in self-authentication for preventing hardware Trojan insertion. HOST 2013: 45-50 - [c78]Ujjwal Guin, Tapan J. Chakraborty, Mohammad Tehranipoor:
Functional Fmax test-time reduction using novel DFTs for circuit initialization. ICCD 2013: 1-6 - [c77]Hassan Salmani, Mohammad Tehranipoor, Ramesh Karri:
On design vulnerability analysis and trust benchmarks development. ICCD 2013: 471-474 - [c76]Jifeng Chen, Mohammad Tehranipoor:
A novel flow for reducing clock skew considering NBTI effect and process variations. ISQED 2013: 327-334 - [c75]Ujjwal Guin, Domenic Forte, Mohammad Tehranipoor:
Anti-counterfeit Techniques: From Design to Resign. MTV 2013: 89-94 - [c74]Ilia Polian, Mohammad Tehranipoor:
Special session 12A: Hot topic counterfeit IC identification: How can test help? VTS 2013: 1 - [c73]Xuehui Zhang, Kan Xiao, Mohammad Tehranipoor, Jeyavijayan Rajendran, Ramesh Karri:
A study on the effectiveness of Trojan detection techniques using a red team blue team approach. VTS 2013: 1-3 - 2012
- [c72]Wei Zhao, Mohammad Tehranipoor:
PowerMAX: Fast Power Analysis during Test. Asian Test Symposium 2012: 227-232 - [c71]Xuehui Zhang, Nicholas Tuzzio, Mohammad Tehranipoor:
Identification of recovered ICs using fingerprints from a light-weight on-chip sensor. DAC 2012: 703-708 - [c70]Min Li, Azadeh Davoodi, Mohammad Tehranipoor:
A sensor-assisted self-authentication framework for hardware trojan detection. DATE 2012: 1331-1336 - [c69]Xuehui Zhang, Kan Xiao, Mohammad Tehranipoor:
Path-delay fingerprinting for identification of recovered ICs. DFT 2012: 13-18 - [c68]Jifeng Chen, Shuo Wang, Mohammad Tehranipoor:
Efficient selection and analysis of critical-reliability paths and gates. ACM Great Lakes Symposium on VLSI 2012: 45-50 - [c67]Nicholas Tuzzio, Kan Xiao, Xuehui Zhang, Mohammad Tehranipoor:
A zero-overhead IC identification technique using clock sweeping and path delay analysis. ACM Great Lakes Symposium on VLSI 2012: 95-98 - [c66]Shuo Wang, Mohammad Tehranipoor:
TSUNAMI: a light-weight on-chip structure for measuring timing uncertainty induced by noise during functional and test operations. ACM Great Lakes Symposium on VLSI 2012: 183-188 - [c65]Andrew Ferraiuolo, Xuehui Zhang, Mohammad Tehranipoor:
Experimental analysis of a ring oscillator network for hardware Trojan detection in a 90nm ASIC. ICCAD 2012: 37-42 - [c64]Shuo Wang, Jifeng Chen, Mohammad Tehranipoor:
Representative Critical Reliability Paths for low-cost and accurate on-chip aging evaluation. ICCAD 2012: 736-741 - [c63]Xiaoxiao Wang, Dat Tran, Saji George, LeRoy Winemberg, Nisar Ahmed, Steve Palosh, Allan Dobin, Mohammad Tehranipoor:
Radic: A standard-cell-based sensor for on-chip aging and flip-flop metastability measurements. ITC 2012: 1-9 - [c62]Xiaoqing Wen, Y. Nishida, Kohei Miyase, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang:
On pinpoint capture power management in at-speed scan test generation. ITC 2012: 1-10 - [c61]Wei Zhao, Sreejit Chakravarty, Junxia Ma, Narendra Devta-Prasanna, Fan Yang, Mohammad Tehranipoor:
A novel method for fast identification of peak current during test. VTS 2012: 191-196 - 2011
- [c60]Fang Bao, Ke Peng, Krishnendu Chakrabarty, Mohammad Tehranipoor:
On Generation of 1-Detect TDF Pattern Set with Significantly Increased SDD Coverage. Asian Test Symposium 2011: 120-125 - [c59]Shuo Wang, Mohammad Tehranipoor, LeRoy Winemberg:
In-field aging measurement and calibration for power-performance optimization. DAC 2011: 706-711 - [c58]Xuehui Zhang, Mohammad Tehranipoor:
RON: An on-chip ring oscillator network for hardware Trojan detection. DATE 2011: 1638-1643 - [c57]Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor:
Critical Fault-Based Pattern Generation for Screening SDDs. ETS 2011: 177-182 - [c56]Wei Zhao, Mohammad Tehranipoor:
Peak power identification on power bumps during test application. IGCC 2011: 1-3 - [c55]Xuehui Zhang, Mohammad Tehranipoor:
Case study: Detecting hardware Trojans in third-party digital IP cores. HOST 2011: 67-70 - [c54]Xuehui Zhang, Nicholas Tuzzio, Mohammad Tehranipoor:
Red team: Design of intelligent hardware trojans with known defense schemes. ICCD 2011: 309-312 - [c53]Ke Peng, Fang Bao, Geoff Shofner, LeRoy Winemberg, Mohammad Tehranipoor:
Case Study: Efficient SDD test generation for very large integrated circuits. VTS 2011: 78-83 - [c52]Xiaoqing Wen, Mohammad Tehranipoor, Rohit Kapur, Anand Bhat, Amitava Majumdar, LeRoy Winemberg:
Special session 5B: Panel How much toggle activity should we be testing with? VTS 2011: 114 - [c51]Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty:
Power-safe test application using an effective gating approach considering current limits. VTS 2011: 160-165 - [c50]Xiaoqing Wen, Kazunari Enokimoto, Kohei Miyase, Yuta Yamato, Michael A. Kochte, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor:
Power-aware test generation with guaranteed launch safety for at-speed scan testing. VTS 2011: 166-171 - [c49]Junxia Ma, Nisar Ahmed, Mohammad Tehranipoor:
Low-cost diagnostic pattern generation and evaluation procedures for noise-related failures. VTS 2011: 309-314 - [c48]LeRoy Winemberg, Mohammad Tehranipoor:
Special session: Hot topic: Smart silicon. VTS 2011: 323 - 2010
- [c47]Ke Peng, Yu Huang, Ruifeng Guo, Wu-Tung Cheng, Mohammad Tehranipoor:
Emulating and diagnosing IR-drop by using dynamic SDF. ASP-DAC 2010: 511-516 - [c46]Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty:
Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test. Asian Test Symposium 2010: 301-306 - [c45]Sandeep Kumar Goel, Krishnendu Chakrabarty, Mahmut Yilmaz, Ke Peng, Mohammad Tehranipoor:
Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Asian Test Symposium 2010: 307-312 - [c44]Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
A Noise-Aware Hybrid Method for SDD Pattern Grading and Selection. Asian Test Symposium 2010: 331-336 - [c43]Xiaoxiao Wang, Mohammad Tehranipoor:
Novel Physical Unclonable Function with process and environmental variations. DATE 2010: 1065-1070 - [c42]Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty:
High-quality pattern selection for screening small-delay defects considering process variations and crosstalk. DATE 2010: 1426-1431 - [c41]Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Junxia Ma, Wei Zhao, Mohammad Tehranipoor, Xiaoqing Wen:
Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes. DDECS 2010: 376-381 - [c40]Ke Peng, Yu Huang, Pinki Mallick, Wu-Tung Cheng, Mohammad Tehranipoor:
Full-circuit SPICE simulation based validation of dynamic delay estimation. ETS 2010: 101-106 - [c39]Junxia Ma, Jeremy Lee, Mohammad Tehranipoor, Nisar Ahmed, Patrick Girard:
Pattern grading for testing critical paths considering power supply noise and crosstalk using a layout-aware quality metric. ACM Great Lakes Symposium on VLSI 2010: 127-130 - [c38]Junxia Ma, Mohammad Tehranipoor, Ozgur Sinanoglu, Sobeeh Almukhaizim:
Identification of IR-drop hot-spots in defective power distribution network using TDF ATPG. IDT 2010: 122-127 - [c37]Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Kohei Miyase, Xiaoqing Wen, Nisar Ahmed:
Is test power reduction through X-filling good enough? ITC 2010: 805 - [c36]Ke Peng, Jason Thibodeau, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
A novel hybrid method for SDD pattern grading and selection. VTS 2010: 45-50 - [c35]Hassan Salmani, Mohammad Tehranipoor, Jim Plusquellic:
A layout-aware approach for improving localized switching to detect hardware Trojans in integrated circuits. WIFS 2010: 1-6 - 2009
- [c34]Hassan Salmani, Mohammad Tehranipoor, Jim Plusquellic:
New Design Strategy for Improving Hardware Trojan Detection and Reducing Trojan Activation Time. HOST 2009: 66-73 - [c33]Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta:
A novel architecture for on-chip path delay measurement. ITC 2009: 1-10 - [c32]Junxia Ma, Jeremy Lee, Mohammad Tehranipoor:
Layout-Aware Pattern Generation for Maximizing Supply Noise Effects on Critical Paths. VTS 2009: 221-226 - 2008
- [c31]Hiroshi Furukawa, Xiaoqing Wen, Kohei Miyase, Yuta Yamato, Seiji Kajihara, Patrick Girard, Laung-Terng Wang, Mohammad Tehranipoor:
CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme for Reducing Yield Loss Risk in At-Speed Scan Testing. ATS 2008: 397-402 - [c30]Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad Tehranipoor:
Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation. DATE 2008: 1172-1177 - [c29]Xiaoxiao Wang, Hassan Salmani, Mohammad Tehranipoor, James F. Plusquellic:
Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis. DFT 2008: 87-95 - [c28]Reza M. Rad, Jim Plusquellic, Mohammad Tehranipoor:
Sensitivity Analysis to Hardware Trojans using Power Supply Transient Signals. HOST 2008: 3-7 - [c27]Xiaoxiao Wang, Mohammad Tehranipoor, Jim Plusquellic:
Detecting Malicious Inclusions in Secure Hardware: Challenges and Solutions. HOST 2008: 15-19 - [c26]Reza M. Rad, Xiaoxiao Wang, Mohammad Tehranipoor, Jim Plusquellic:
Power supply signal calibration techniques for improving detection resolution to hardware Trojans. ICCAD 2008: 632-639 - [c25]Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta:
Path-RO: a novel on-chip critical path delay measurement under process variations. ICCAD 2008: 640-646 - [c24]Jeremy Lee, Mohammad Tehranipoor:
A Novel Pattern Generation Framework for Inducing Maximum Crosstalk Effects on Delay-Sensitive Paths. ITC 2008: 1-10 - [c23]Junxia Ma, Jeremy Lee, Mohammad Tehranipoor:
Power Distribution Failure Analysis Using Transition-Delay Fault Patterns. ITC 2008: 1 - [c22]Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects. ITC 2008: 1-10 - [c21]Jeremy Lee, Mohammad Tehranipoor:
LS-TDF: Low-Switching Transition Delay Fault Pattern Generation. VTS 2008: 227-232 - [c20]Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
Test-Pattern Grading and Pattern Selection for Small-Delay Defects. VTS 2008: 233-239 - 2007
- [c19]Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram:
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design. DAC 2007: 533-538 - [c18]Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram:
Supply Voltage Noise Aware ATPG for Transition Delay Faults. VTS 2007: 179-186 - 2006
- [c17]Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram:
Timing-based delay test for screening small delay defects. DAC 2006: 320-325 - [c16]Reza M. Rad, Mohammad Tehranipoor:
A new hybrid FPGA with nanoscale clusters and CMOS routing. DAC 2006: 727-730 - [c15]Reza M. Rad, Mohammad Tehranipoor:
A Reconfiguration-based Defect Tolerance Method for Nanoscale Devices. DFT 2006: 107-118 - [c14]Mohammad Tehranipoor, Reza M. Rad:
Fine-grained island style architecture for molecular electronic devices. FPGA 2006: 226 - [c13]Mohammad Tehranipoor, Reza M. Rad:
Test and recovery for fine-grained nanoscale architectures. FPGA 2006: 226 - [c12]Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram:
A novel framework for faster-than-at-speed delay test considering IR-drop effects. ICCAD 2006: 198-203 - [c11]Jeremy Lee, Mohammad Tehranipoor, Jim Plusquellic:
A Low-Cost Solution for Protecting IPs Against Scan-Based Side-Channel Attacks. VTS 2006: 94-99 - [c10]Kee Sup Kim, Mohammad Tehranipoor:
Session Abstract. VTS 2006: 292-293 - [c9]Reza M. Rad, Mohammad Tehranipoor:
SCT: An Approach For Testing and Configuring Nanoscale Devices. VTS 2006: 370-377 - 2005
- [c8]Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed:
Low Transition LFSR for BIST-Based Applications. Asian Test Symposium 2005: 138-143 - [c7]Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ravikumar:
Partial Gating Optimization for Power Reduction During Test Application. Asian Test Symposium 2005: 242-247 - [c6]Jeremy Lee, Mohammad Tehranipoor, Chintan Patel, Jim Plusquellic:
Securing Scan Design Using Lock and Key Technique. DFT 2005: 51-62 - [c5]Nisar Ahmed, Mohammad Tehranipoor:
Improving Transition Delay Fault Coverage Using Hybrid Scan-Based Technique. DFT 2005: 187-198 - [c4]Mohammad Tehranipoor:
Defect Tolerance for Molecular Electronics-Based NanoFabrics Using Built-In Self-Test Procedure. DFT 2005: 305-313 - [c3]Nisar Ahmed, Mohammad Tehranipoor, C. P. Ravikumar:
Enhanced launch-off-capture transition fault testing. ITC 2005: 10 - [c2]Nisar Ahmed, C. P. Ravikumar, Mohammad Tehranipoor, Jim Plusquellic:
At-Speed Transition Fault Testing With Low Speed Scan Enable. VTS 2005: 42-47 - [c1]Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed:
Pattern Generation and Estimation for Power Supply Noise Analysis. VTS 2005: 439-444
Parts in Books or Collections
- 2014
- [p3]Nisar Ahmed, Mohammad Tehranipoor:
Faster-than-at-Speed Test for Screening Small-Delay Defects. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits 2014: 73-94 - [p2]Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor:
Circuit Path Grading Considering Layout, Process Variations, and Cross Talk. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits 2014: 95-118 - 2010
- [p1]Mohammad Tehranipoor, Berk Sunar:
Hardware Trojan Horses. Towards Hardware-Intrinsic Security 2010: 167-187
Editorship
- 2009
- [e4]Dimitris Gizopoulos, Susumu Horiguchi, Spyros Tragoudas, Mohammad Tehranipoor:
24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2009, Chicago, Illinois, USA, October 7-9, 2009. IEEE Computer Society 2009, ISBN 978-0-7695-3839-6 [contents] - [e3]Mohammad Tehranipoor, Jim Plusquellic:
IEEE International Workshop on Hardware-Oriented Security and Trust, HOST 2009, San Francisco, CA, USA, July 27, 2009. Proceedings. IEEE Computer Society 2009, ISBN 978-1-4244-4805-0 [contents] - 2008
- [e2]Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor:
23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA. IEEE Computer Society 2008, ISBN 978-0-7695-3365-0 [contents] - [e1]Mohammad Tehranipoor, Jim Plusquellic:
IEEE International Workshop on Hardware-Oriented Security and Trust, HOST 2008, Anaheim, CA, USA, June 9, 2008. Proceedings. IEEE Computer Society 2008, ISBN 978-1-4244-2401-6 [contents]
Data and Artifacts
- 2022
- [d1]Hassan Salmani, Mark M. Tehranipoor, Sarwono Sutikno, Fajar Wijitrisnanto:
Trust-Hub Trojan Benchmark for Hardware Trojan Detection Model Creation using Machine Learning. IEEE DataPort, 2022
Informal and Other Publications
- 2024
- [i37]Tao Zhang, Shang Shi, Md Habibur Rahman, Nitin Varshney, Akshay Kulkarni, Farimah Farahmandi, Mark M. Tehranipoor:
INSPECT: Investigating Supply Chain and Cyber-Physical Security of Battery Systems. IACR Cryptol. ePrint Arch. 2024: 211 (2024) - [i36]Shams Tarek, Dipayan Saha, Sujan Kumar Saha, Mark M. Tehranipoor, Farimah Farahmandi:
SoCureLLM: An LLM-driven Approach for Large-Scale System-on-Chip Security Verification and Policy Generation. IACR Cryptol. ePrint Arch. 2024: 983 (2024) - [i35]Rasheed Kibria, Farimah Farahmandi, Mark M. Tehranipoor:
A Survey on SoC Security Verification Methods at the Pre-silicon Stage. IACR Cryptol. ePrint Arch. 2024: 1280 (2024) - 2023
- [i34]Dipayan Saha, Shams Tarek, Katayoon Yahyaei, Sujan Kumar Saha, Jingbo Zhou, Mark M. Tehranipoor, Farimah Farahmandi:
LLM for SoC Security: A Paradigm Shift. CoRR abs/2310.06046 (2023) - [i33]Rasheed Kibria, Farimah Farahmandi, Mark M. Tehranipoor:
ARC-FSM-G: Automatic Security Rule Checking for Finite State Machine at the Netlist Abstraction. IACR Cryptol. ePrint Arch. 2023: 1037 (2023) - [i32]Dipayan Saha, Shams Tarek, Katayoon Yahyaei, Sujan Kumar Saha, Jingbo Zhou, Mark M. Tehranipoor, Farimah Farahmandi:
LLM for SoC Security: A Paradigm Shift. IACR Cryptol. ePrint Arch. 2023: 1561 (2023) - [i31]Amit Mazumder Shuvo, Tao Zhang, Farimah Farahmandi, Mark M. Tehranipoor:
A Comprehensive Survey on Non-Invasive Fault Injection Attacks. IACR Cryptol. ePrint Arch. 2023: 1769 (2023) - 2022
- [i30]Nathan Jessurun, Olivia P. Dizon-Paradis, Jacob Harrison, Shajib Ghosh, Mark M. Tehranipoor, Damon L. Woodard, Navid Asadizanjani:
FPIC: A Novel Semantic Dataset for Optical PCB Assurance. CoRR abs/2202.08414 (2022) - [i29]Bulbul Ahmed, Md Kawser Bepary, Nitin Pundir, Mike Borza, Oleg Raikhman, Amit Garg, Dale R. Donchin, Adam Cron, Mohamed Abdel-Moneum, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
Quantifiable Assurance: From IPs to Platforms. CoRR abs/2204.07909 (2022) - [i28]Hasan Al Shaikh, Mohammad Bin Monjil, Shigang Chen, Navid Asadizanjani, Farimah Farahmandi, Mark M. Tehranipoor, Fahim Rahman:
Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications. CoRR abs/2205.10962 (2022) - [i27]N. Nalla Anandakumar, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Rasheed Kibria, Upoma Das, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs. IACR Cryptol. ePrint Arch. 2022: 92 (2022) - [i26]Hasan Al Shaikh, Mohammad Bin Monjil, Shigang Chen, Farimah Farahmandi, Navid Asadizanjani, Mark M. Tehranipoor, Fahim Rahman:
Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications. IACR Cryptol. ePrint Arch. 2022: 258 (2022) - [i25]Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor:
Advances in Logic Locking: Past, Present, and Prospects. IACR Cryptol. ePrint Arch. 2022: 260 (2022) - [i24]Kimia Zamiri Azar, Muhammad Monir Hossain, Arash Vafaei, Hasan Al Shaikh, Nurun N. Mondol, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
Fuzz, Penetration, and AI Testing for SoC Security Verification: Challenges and Solutions. IACR Cryptol. ePrint Arch. 2022: 394 (2022) - [i23]Jungmin Park, N. Nalla Anandakumar, Dipayan Saha, Dhwani Mehta, Nitin Pundir, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms. IACR Cryptol. ePrint Arch. 2022: 527 (2022) - [i22]Sukanta Dey, Jungmin Park, Nitin Pundir, Dipayan Saha, Amit Mazumder Shuvo, Dhwani Mehta, Navid Asadi, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
Secure Physical Design. IACR Cryptol. ePrint Arch. 2022: 891 (2022) - [i21]Dhwani Mehta, John True, Olivia P. Dizon-Paradis, Nathan Jessurun, Damon L. Woodard, Navid Asadizanjani, Mark M. Tehranipoor:
FICS PCB X-ray: A dataset for automated printed circuit board inter-layers inspection. IACR Cryptol. ePrint Arch. 2022: 924 (2022) - [i20]Nidish Vashistha, Md Latifur Rahman, Md. Saad Ul Haque, Azim Uddin, Md Sami Ul Islam Sami, Amit Mazumder Shuo, Paul Calzada, Farimah Farahmandi, Navid Asadizanjani, Fahim Rahman, Mark M. Tehranipoor:
ToSHI - Towards Secure Heterogeneous Integration: Security Risks, Threat Assessment, and Assurance. IACR Cryptol. ePrint Arch. 2022: 984 (2022) - [i19]Rasheed Kibria, Farimah Farahmandi, Mark M. Tehranipoor:
FSMx-Ultra: Finite State Machine Extraction from Gate-Level Netlist for Security Assessment. IACR Cryptol. ePrint Arch. 2022: 1582 (2022) - 2021
- [i18]Nitin Pundir, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
What is All the FaaS About? - Remote Exploitation of FPGA-as-a-Service Platforms. IACR Cryptol. ePrint Arch. 2021: 746 (2021) - [i17]Nusrat Farzana, Farimah Farahmandi, Mark M. Tehranipoor:
SoC Security Properties and Rules. IACR Cryptol. ePrint Arch. 2021: 1014 (2021) - [i16]Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
An End-to-End Bitstream Tamper Attack Against Flip-Chip FPGAs. IACR Cryptol. ePrint Arch. 2021: 1542 (2021) - [i15]Bulbul Ahmed, Md Kawser Bepary, Nitin Pundir, Mike Borza, Oleg Raikhman, Amit Garg, Dale R. Donchin, Adam Cron, Mohamed A. Abdelmoneum, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor:
Quantifiable Assurance: From IPs to Platforms. IACR Cryptol. ePrint Arch. 2021: 1654 (2021) - 2020
- [i14]Ulbert J. Botero, Ronald Wilson, Hangwei Lu, Mir Tanjidur Rahman, Mukhil Azhagan Mallaiyan Sathiaseelan, Fatemeh Ganji, Navid Asadizanjani, Mark M. Tehranipoor, Damon L. Woodard, Domenic Forte:
Hardware Trust and Assurance through Reverse Engineering: A Survey and Outlook from Image Analysis and Machine Learning Perspectives. CoRR abs/2002.04210 (2020) - [i13]Nitin Pundir, Mark M. Tehranipoor, Fahim Rahman:
RanStop: A Hardware-assisted Runtime Crypto-Ransomware Detection Technique. CoRR abs/2011.12248 (2020) - [i12]Bicky Shakya, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
Defeating CAS-Unlock. IACR Cryptol. ePrint Arch. 2020: 324 (2020) - [i11]Hangwei Lu, Dhwani Mehta, Olivia P. Paradis, Navid Asadizanjani, Mark M. Tehranipoor, Damon L. Woodard:
FICS-PCB: A Multi-Modal Image Dataset for Automated Printed Circuit Board Visual Inspection. IACR Cryptol. ePrint Arch. 2020: 366 (2020) - 2019
- [i10]Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark M. Tehranipoor:
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. CoRR abs/1901.05909 (2019) - [i9]Zimu Guo, Xiaolin Xu, Mark M. Tehranipoor, Domenic Forte:
EOP: An Encryption-Obfuscation Solution for Protecting PCBs Against Tampering and Reverse Engineering. CoRR abs/1904.09516 (2019) - [i8]M. Tanjidur Rahman, M. Sazadur Rahman, Huanyu Wang, Shahin Tajik, Waleed Khalil, Farimah Farahmandi, Domenic Forte, Navid Asadizanjani, Mark M. Tehranipoor:
Defense-in-Depth: A Recipe for Logic Locking to Prevail. CoRR abs/1907.08863 (2019) - [i7]Fatemeh Ganji, Shahin Tajik, Pascal Stauss, Jean-Pierre Seifert, Domenic Forte, Mark M. Tehranipoor:
Theoretical and Practical Approaches for Hardness Amplification of PUFs. IACR Cryptol. ePrint Arch. 2019: 534 (2019) - [i6]M. Sazadur Rahman, Adib Nahiyan, Sarah Amir, Fahim Rahman, Farimah Farahmandi, Domenic Forte, Mark M. Tehranipoor:
Dynamically Obfuscated Scan Chain To Resist Oracle-Guided Attacks On Logic Locked Design. IACR Cryptol. ePrint Arch. 2019: 946 (2019) - 2018
- [i5]Adib Nahiyan, Mehdi Sadi, Rahul Vittal, Gustavo K. Contreras, Domenic Forte, Mark M. Tehranipoor:
Hardware Trojan Detection through Information Flow Security Verification. CoRR abs/1803.04102 (2018) - [i4]Nima Karimian, Zimu Guo, Fatemeh Tehranipoor, Damon L. Woodard, Mark M. Tehranipoor, Domenic Forte:
Secure and Reliable Biometric Access Control for Resource-Constrained Systems and IoT. CoRR abs/1803.09710 (2018) - [i3]Bashir M. Sabquat Bahar Talukder, Biswajit Ray, Mark M. Tehranipoor, Domenic Forte, Md. Tauhidur Rahman:
LDPUF: Exploiting DRAM Latency Variations to Generate Robust Device Signatures. CoRR abs/1808.02584 (2018) - 2017
- [i2]Xiaolin Xu, Bicky Shakya, Mark M. Tehranipoor, Domenic Forte:
Novel Bypass Attack and BDD-based Tradeoff Analysis Against all Known Logic Locking Attacks. IACR Cryptol. ePrint Arch. 2017: 621 (2017) - 2016
- [i1]Osnat Keren, Ilia Polian, Mark M. Tehranipoor:
Hardware Security (Dagstuhl Seminar 16202). Dagstuhl Reports 6(5): 72-93 (2016)
Coauthor Index
[j157] [j156] [j155] [j154] [j153] [j152] [j151] [j150] [j149] [j148] [j147] [j146] [j145] [j144] [j143] [j142] [j140] [j139] [j133] [j132] [j130] [j129] [j127] [j120] [j119] [j111] [j103] [c226] [c225] [c224] [c222] [c221] [c220] [c219] [c218] [c217] [c216] [c215] [c214] [c213] [c212] [c211] [c210] [c209] [c208] [c204] [c203] [c202] [c201] [c200] [c199] [c198] [c197] [c196] [c195] [c194] [c193] [c192] [c191] [c190] [c189] [c188] [c186] [c185] [c184] [c183] [c182] [c181] [c180] [c179] [c176] [c174] [c167] [c166] [i37] [i36] [i35] [i34] [i33] [i32] [i31] [i29] [i28] [i27] [i26] [i25] [i24] [i23] [i22] [i20] [i19] [i18] [i17] [i16] [i15] [i8] [i6]
Nusrat Farzana
aka: Nusrat Farzana Dipu
aka: Nusrat Farzana Dipu
[j138] [j137] [j128] [j124] [j122] [j121] [j120] [j119] [j118] [j117] [j114] [j113] [j112] [j111] [j110] [j108] [j106] [j105] [j103] [j102] [j101] [j99] [j97] [j95] [j94] [j93] [j89] [j88] [j87] [j86] [j85] [j83] [j80] [j79] [j77] [j74] [j72] [j71] [j68] [j66] [j64] [j63] [j59] [j58] [j57] [j45] [c206] [c173] [c172] [c165] [c164] [c162] [c160] [c155] [c152] [c151] [c149] [c148] [c147] [c145] [c144] [c143] [c142] [c141] [c140] [c138] [c134] [c132] [c131] [c130] [c129] [c128] [c127] [c126] [c125] [c123] [c120] [c119] [c117] [c111] [c110] [c107] [c106] [c105] [c104] [c102] [c101] [c98] [c97] [c96] [c94] [c93] [c92] [c90] [c88] [c86] [c75] [i14] [i12] [i9] [i8] [i7] [i6] [i5] [i4] [i3] [i2]
James F. Plusquellic
aka: Jim Plusquellic
aka: Jim Plusquellic
[j157] [j156] [j149] [j145] [j144] [j143] [j132] [j130] [j129] [j120] [j118] [j109] [j108] [j99] [j73] [j68] [j66] [j63] [c224] [c221] [c218] [c215] [c214] [c212] [c210] [c209] [c204] [c201] [c200] [c189] [c188] [c187] [c186] [c185] [c183] [c182] [c179] [c174] [c170] [c167] [c166] [c159] [c137] [c136] [c120] [c104] [c102] [i29] [i28] [i27] [i26] [i24] [i23] [i22] [i20] [i18] [i16] [i15] [i13] [i6]
M. Tanjidur Rahman
aka: Mir Tanjidur Rahman
aka: Mir Tanjidur Rahman
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