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ORCID60th DAC 2023: San Francisco, CA, USA
- 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023. IEEE 2023, ISBN 979-8-3503-2348-1
- Wei-Hsiang Tseng, Yao-Wen Chang:
Late Breaking Results: An Efficient Bridge-based Compression Algorithm for Topologically Quantum Error Corrected Circuits. 1-2 - Wende Tan, Yangyu Chen
, Yuan Li, Ying Liu, Jianping Wu, Yu Ding, Chao Zhang:
PTStore: Lightweight Architectural Support for Page Table Isolation. 1-6 - Su Zheng, Lancheng Zou, Siting Liu, Yibo Lin, Bei Yu, Martin D. F. Wong:
Mitigating Distribution Shift for Congestion Optimization in Global Placement. 1-6 - Changhun Han, Hoon Sung Chwa, Kilho Lee, Sangeun Oh:
SPET: Transparent SRAM Allocation and Model Partitioning for Real-time DNN Tasks on Edge TPU. 1-6 - Xiaolong Lin, Gang Li, Zizhao Liu, Yadong Liu, Fan Zhang, Zhuoran Song, Naifeng Jing, Xiaoyao Liang:
AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity. 1-6 - Hongwu Peng, Shanglin Zhou, Yukui Luo, Nuo Xu, Shijin Duan, Ran Ran, Jiahui Zhao, Chenghong Wang, Tong Geng, Wujie Wen, Xiaolin Xu, Caiwen Ding:
PASNet: Polynomial Architecture Search Framework for Two-party Computation-based Secure Neural Network Deployment. 1-6 - Josse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst:
HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms. 1-6 - Lingjun Zhu, Sung Kyu Lim:
INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps. 1-4 - Jingkai Hong, Arash Fayyazi, Amirhossein Esmaili, Mahdi Nazemi, Massoud Pedram:
Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks. 1-6 - Shamiul Alam, Jack Hutchins, Md. Shafayat Hossain, Kai Ni, Vijaykrishnan Narayanan, Ahmedullah Aziz:
Cryogenic In-Memory Matrix-Vector Multiplication using Ferroelectric Superconducting Quantum Interference Device (FE-SQUID). 1-6 - Insu Choi, Jae-Youn Hong, JaeHwa Jeon, Joon-Sung Yang:
RQ-DNN: Reliable Quantization for Fault-tolerant Deep Neural Networks. 1-2 - Cheng Gongye, Yukui Luo, Xiaolin Xu, Yunsi Fei:
HammerDodger: A Lightweight Defense Framework against RowHammer Attack on DNNs. 1-6 - Zheng-Wei Wu, Yun-Chih Chen, Yuan-Hao Chang, Tei-Wei Kuo:
APP: Enabling Soft Real-Time Execution on Densely-Populated Hybrid Memory System. 1-6 - Jin Yang, Jeremy Casas, Zhenkun Yang:
Invited: A Scalable Formal Approach for Correctness-Assured Hardware Design. 1-4 - Dongxu Lyu, Zhenyu Li, Yuzhou Chen, Ningyi Xu, Guanghui He:
FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling. 1-6 - Ling Lin, Lei Ju, Chun Jason Xue, Mingliang Zhou, Wei Zhang, Zimeng Zhou:
Work or Sleep: Freshness-Aware Energy Scheduling for Wireless Powered Communication Networks with Interference Consideration. 1-6 - Abhishek Moitra, Abhiroop Bhattacharjee, Youngeun Kim, Priyadarshini Panda:
XPert: Peripheral Circuit & Neural Architecture Co-search for Area and Energy-efficient Xbar-based Computing. 1-6 - Jason Cong:
Lightning Talk: Scaling Up Quantum Compilation - Challenges and Opportunities. 1-2 - Zhican Wang, Gang Wang, Honglan Jiang, Ningyi Xu, Guanghui He:
COSA:Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies. 1-6 - Yongbo Yu, Fuxun Yu, Xiang Sheng, Chenchen Liu, Xiang Chen:
EagleRec: Edge-Scale Recommendation System Acceleration with Inter-Stage Parallelism Optimization on GPUs. 1-6 - Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin D. F. Wong:
Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields. 1-6 - Zhijie Cai, Peng Zou, Zhengtao Wu, Xingyu Tong, Jun Yu, Jianli Chen, Yao-Wen Chang:
PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration. 1-6 - Yuke Zhang, Dake Chen, Souvik Kundu, Haomei Liu, Ruiheng Peng, Peter A. Beerel:
C2PI: An Efficient Crypto-Clear Two-Party Neural Network Private Inference. 1-6 - Liang Chang, Xin Zhao, Dongqi Fan, Zhicheng Hu, Jun Zhou:
HDSuper: Algorithm-Hardware Co-design for Light-weight High-quality Super-Resolution Accelerator. 1-6 - Danish Gufran, Saideep Tiku, Sudeep Pasricha:
VITAL: Vision Transformer Neural Networks for Accurate Smartphone Heterogeneity Resilient Indoor Localization. 1-6 - Jie He, Dejan Nickovic, Ezio Bartocci, Radu Grosu:
TD-Magic: From Pictures of Timing Diagrams To Formal Specifications. 1-6 - Carmine Rizzi, Andrea Guerrieri, Lana Josipovic:
An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow Circuits. 1-6 - Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang:
Graph Representation Learning for Microarchitecture Design Space Exploration. 1-6 - Zahin Ibnat, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi:
ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs. 1-6 - Won Woo Ro:
Lightning Talk: Efficiency and Programmability of DNN Accelerators and GPUs. 1-2 - Jingyao Zhang, Mohsen Imani, Elaheh Sadredini:
BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication. 1-6 - Sven Thijssen, Muhammad Rashedul Haq Rashed, Sumit Kumar Jha, Rickard Ewetz:
UpTime: Towards Flow-based In-Memory Computing with High Fault-Tolerance. 1-6 - Qingfeng Wang, Ze-Pei Cian, Ming Li, Igor L. Markov, Yunseong Nam:
Ever more optimized simulations of fermionic systems on a quantum computer. 1-6 - Nick Eliopoulos, Yung-Hsiang Lu:
Lightning Talk 6: Bringing Together Foundation Models and Edge Devices. 1-2 - Chieh-Lin Tsai, Chun-Feng Wu, Yuan-Hao Chang, Han-Wen Hu, Yung-Chun Lee, Hsiang-Pang Li, Tei-Wei Kuo:
A digital 3D TCAM accelerator for the inference phase of Random Forest. 1-6 - Xuanle Ren, Zhaohui Chen, Zhen Gu, Yanheng Lu, Ruiguang Zhong, Wen-Jie Lu, Jiansong Zhang, Yichi Zhang, Hanghang Wu, Xiaofu Zheng, Heng Liu, Tingqiang Chu, Cheng Hong, Changzheng Wei, Dimin Niu, Yuan Xie:
CHAM: A Customized Homomorphic Encryption Accelerator for Fast Matrix-Vector Product. 1-6 - Xinming Wei, Jiaxi Zhang, Guojie Luo:
GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-Offs. 1-6 - Chengning Wang, Dan Feng, Wei Tong, Jingning Liu:
CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays. 1-6 - Xiangjie Li, Yingtao Shen, An Zou, Yehan Ma:
EENet: Energy Efficient Neural Networks with Run-time Power Management. 1-6 - Jinwei Liu, Evangeline F. Y. Young:
EDGE: Efficient DAG-based Global Routing Engine. 1-6 - Kevin Hutto, Vincent John Mooney:
Late Breaking Results: COPPER: Computation Obfuscation by Producing Permutations for Encoding Randomly. 1-2 - Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng:
Efficient ILT via Multi-level Lithography Simulation. 1-6 - Jiaqi Yin, Yingjie Li, Daniel Robinson, Cunxi Yu:
RESPECT: Reinforcement Learning based Edge Scheduling on Pipelined Coral Edge TPUs. 1-6 - Peng Cao, Jiahao Wang:
Late Breaking Results: RL-LPO: Reinforcement Learning Based Leakage Power Optimization Framework with Graph Neural Network. 1-2 - Mohammed Bakr Sikal, Heba Khdr, Martin Rapp, Jörg Henkel:
Machine Learning-based Thermally-Safe Cache Contention Mitigation in Clustered Manycores. 1-6 - Youngsoo Shin:
Lightning Talk 21: EDA with ML, Rule-Based, or Both? 1-2 - Yang Katie Zhao, Shang Wu, Jingqun Zhang, Sixu Li, Chaojian Li, Yingyan Celine Lin:
Instant-NeRF: Instant On-Device Neural Radiance Field Training via Algorithm-Accelerator Co-Designed Near-Memory Processing. 1-6 - Shuai Zhao, Nan Chen, Yinjie Fang, Zhao Li, Wanli Chang:
A Universal Method for Task Allocation on FP-FPS Multiprocessor Systems with Spin Locks. 1-6 - Peiyu Liao, Hongduo Liu, Yibo Lin, Bei Yu, Martin D. F. Wong:
On a Moreau Envelope Wirelength Model for Analytical Global Placement. 1-6 - Yifan Gong, Pu Zhao, Zheng Zhan, Yushu Wu, Chao Wu, Zhenglun Kong, Minghai Qin, Caiwen Ding, Yanzhi Wang:
Condense: A Framework for Device and Frequency Adaptive Neural Network Models on the Edge. 1-6 - Mehrnoosh Raoufi, Jun Yang, Xulong Tang, Youtao Zhang:
EP-ORAM: Efficient NVM-Friendly Path Eviction for Ring ORAM in Hybrid Memory. 1-6 - Shanglin Zhou, Yingjie Li, Minhan Lou, Weilu Gao, Zhijie Shi, Cunxi Yu, Caiwen Ding:
Physics-aware Roughness Optimization for Diffractive Optical Neural Networks. 1-6 - Shaoyi Huang, Bowen Lei, Dongkuan Xu, Hongwu Peng, Yue Sun, Mimi Xie, Caiwen Ding:
Dynamic Sparse Training via Balancing the Exploration-Exploitation Trade-off. 1-6 - Yi Chen, Ning Liu, Ao Ren, Tao Yang, Duo Liu:
IFHE: Intermediate-Feature Heterogeneity Enhancement for Image Synthesis in Data-Free Knowledge Distillation. 1-6 - Yang Zhou, Fang Wang, Zhan Shi, Dan Feng, Yu Du:
Fair Will Go On: A Collaboration-Aware Fairness Scheme for NVMe SSD in Cloud Storage System. 1-6 - Mengxin Zheng, Qian Lou, Lei Jiang:
Primer: Fast Private Transformer Inference on Encrypted Data. 1-6 - Genggeng Liu, Yuhan Zhu, Wenzhong Guo, Xing Huang:
Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array Biochips. 1-6 - Patrick Schaumont:
Lightning Talk: The Incredible Shrinking Black Box Model. 1-2 - Halima Bouzidi, Mohanad Odema, Hamza Ouarnoughi, Smaïl Niar, Mohammad Abdullah Al Faruque:
Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs. 1-6 - Wayne Luk:
Heterogeneous Reconfigurable Accelerators: Trends and Perspectives. 1-2 - Kuei-Lin Wu, Shao-Yun Fang:
Lamellar DSA-aware Detailed Routing Considering Double Patterning and Short Template Minimization. 1-6 - Mengquan Li, Kenli Li, Mingfeng Lan, Jie Xiong, Zhuo Tang, Weichen Liu:
FIONA: Fine-grained Incoherent Optical DNN Accelerator Search for Superior Efficiency and Robustness. 1-6 - Debendra Das Sharma:
Invited: Compute Express Link™ (CXL™): An Open Interconnect for Cloud Infrastructure. 1-4 - Xuliang Zhu, Ruofei Tang, Lei Chen, Xing Li, Xin Huang, Mingxuan Yuan, Weihua Sheng, Jianliang Xu:
A Database Dependent Framework for K-Input Maximum Fanout-Free Window Rewriting. 1-6 - Qinghai Liu, Qinfei Tang, Jiarui Chen, Chuandong Chen, Ziran Zhu, Huan He, Jianli Chen, Yao-Wen Chang:
Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints. 1-6 - Khan Shaikhul Hadi, Naveed Ul Mustafa, Mark Heinrich, Yan Solihin:
Hardware Support for Durable Atomic Instructions for Persistent Parallel Programming. 1-6 - Weigang Zhang, Biyu Zhou, Xuehai Tang, Zhaoxing Wang, Songlin Hu:
MixPipe: Efficient Bidirectional Pipeline Parallelism for Training Large-Scale Models. 1-6 - Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, Bei Yu:
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration. 1-6 - Ruibin Mao, Xia Sheng, Catherine Graves, Cong Xu, Can Li:
ReRAM-based graph attention network with node-centric edge searching and hamming similarity. 1-6 - Igor Nunes, Mike Heddes, Tony Givargis, Alexandru Nicolau:
An Extension to Basis-Hypervectors for Learning from Circular Data in Hyperdimensional Computing. 1-6 - Yousef Safari, Pooya Aghanoury, Subramanian S. Iyer, Nader Sehatbakhsh, Boris Vaisband:
Hybrid Obfuscation of Chiplet-Based Systems. 1-6 - Minjeong Choi, Youngchang Choi, Kyongsu Lee, Seokhyeong Kang:
Reinforcement Learning-based Analog Circuit Optimizer using gm/ID for Sizing. 1-6 - Konstantina Koliogeorgi, Dimitrios Soudris, Sotirios Xydis:
Profile-Driven Banded Smith-Waterman acceleration for Short Read Alignment. 1-6 - Hyunwoo Choi, Suryeon Kim, Seungwon Shin:
AVX Timing Side-Channel Attacks against Address Space Layout Randomization. 1-6 - Felix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Bolzani Pöhls, Rainer Leupers:
Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware. 1-6 - Zizhang Luo, Liqiang Lu, Size Zheng, Jieming Yin, Jason Cong, Jianwei Yin, Yun Liang:
Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition. 1-6 - Yifan Zhu, Peinan Li, Lutan Zhao, Dan Meng, Rui Hou:
ChaosINTC: A Secure Interrupt Management Mechanism against Interrupt-based Attacks on TEE. 1-6 - Amel Fatima, Sihang Liu, Korakit Seemakhupt, Rachata Ausavarungnirun, Samira Manabi Khan:
vPIM: Efficient Virtual Address Translation for Scalable Processing-in-Memory Architectures. 1-6 - Zhaojun Lu, Houjia Qidiao, Qidong Chen, Zhenglin Liu, Jiliang Zhang:
An FPGA-Compatible TRNG with Ultra-High Throughput and Energy Efficiency. 1-6 - Jaewoo Park, Sugil Lee, Jongeun Lee:
NTT-PIM: Row-Centric Architecture and Mapping for Efficient Number-Theoretic Transform on PIM. 1-6 - Yun-Chen Lo, Ren-Shuo Liu:
Bit-Serial Cache: Exploiting Input Bit Vector Repetition to Accelerate Bit-Serial Inference. 1-6 - Yun-Chen Lo, Ren-Shuo Liu:
Morphable CIM: Improving Operation Intensity and Depthwise Capability for SRAM-CIM Architecture. 1-6 - Mohanad Odema, James Ferlez, Yasser Shoukry, Mohammad Abdullah Al Faruque:
SEO: Safety-Aware Energy Optimization Framework for Multi-Sensor Neural Controllers at the Edge. 1-6 - Peng Zou, Guohao Chen, Zhifeng Lin, Jun Yu, Jianli Chen:
Toward Optimal Filler Cell Insertion with Complex Implant Layer Constraints. 1-6 - Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
Sparse Hamming Graph: A Customizable Network-on-Chip Topology. 1-6 - Yu Zhu, Zhenhua Zhu, Guohao Dai, Fengbin Tu, Hanbo Sun, Kwang-Ting Cheng, Huazhong Yang, Yu Wang:
PIM-HLS: An Automatic Hardware Generation Tool for Heterogeneous Processing-In-Memory-based Neural Network Accelerators. 1-6 - Afzal Ahmad, Zhiyao Xie, Wei Zhang:
PertNAS: Architectural Perturbations for Memory-Efficient Neural Architecture Search. 1-6 - Enhyeok Jang, Seungwoo Choi, Won Woo Ro:
Quixote: Improving Fidelity of Quantum Program by Independent Execution of Controlled Gates. 1-6 - Qipan Wang, Ping Liu, Liguo Jiang, Mingjie Liu, Yibo Lin, Runsheng Wang, Ru Huang:
MTL-Designer: An Integrated Flow for Analysis and Synthesis of Microstrip Transmission Line. 1-6 - Wan-Hsuan Lin, Jason Kimko, Bochen Tan, Nikolaj S. Bjørner, Jason Cong:
Scalable Optimal Layout Synthesis for NISQ Quantum Processors. 1-6 - Changdi Yang, Yi Sheng, Peiyan Dong, Zhenglun Kong, Yanyu Li, Pinrui Yu, Lei Yang, Xue Lin:
Late Breaking Results: Fast Fair Medical Applications? Hybrid Vision Models Achieve the Fairness on the Edge. 1-2 - Cong Li, Zhe Zhou, Xingchen Li, Guangyu Sun, Dimin Niu:
NMExplorer: An Efficient Exploration Framework for DIMM-based Near-Memory Tensor Reduction. 1-6 - Yi Sheng, Junhuan Yang, Lei Yang, Yiyu Shi, Jingtong Hu, Weiwen Jiang:
Muffin: A Framework Toward Multi-Dimension AI Fairness by Uniting Off-the-Shelf Models. 1-6 - Tengcheng Wang, Wenhao Li, Haojie Pei, Yuying Sun, Zhou Jin, Weifeng Liu:
Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation. 1-6 - Wei Ren, William Kozlowski, Sandhya Koteshwara, Mengmei Ye, Hubertus Franke, Deming Chen:
AccShield: a New Trusted Execution Environment with Machine-Learning Accelerators. 1-6 - Sanghoon Lee, Jongho Park, Minho Ha, Byungil Koh, Kyoung Park, Yeseong Kim:
Sidekick: Near Data Processing for Clustering Enhanced by Automatic Memory Disaggregation. 1-6 - Chengtao An, Chunqiao Li, Xiangqi Li, Yangfeng Su, Fan Yang, Xuan Zeng:
FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display. 1-6 - Shiyao Li, Zhenhua Zhu, Yu Zhu, Qingpeng Zhu, Jiangwei Zhang, Wenxiu Sun, Guohao Dai, Fei Qiao, Huazhong Yang, Yu Wang:
Memory-Efficient and Real-Time SPAD-based dToF Depth Sensor with Spatial and Statistical Correlation. 1-6 - Hasindu Gamaarachchi, Kisaru Liyanage, Sri Parameswaran:
Invited: Algorithms and Architectures for Accelerating Long Read Sequence Analysis. 1-4 - Jingwei Zhang, Meng Zhang, Xinye Cao, Guoqing Li:
Uint-Packing: Multiply Your DNN Accelerator Performance via Unsigned Integer DSP Packing. 1-6 - S. S. Teja Nibhanupudi, Sirish Oruganti, Rahul Mathur, Nishant Gupta, Meizhi Wang, Jaydeep P. Kulkarni:
Invited: Buried Power Rails and Back-side Power Grids: Prospects and Challenges. 1-4 - Qidie Wu, Jiangyuan Gu, Youxu Lin, Boxiao Han, Hongjun He, Yang Hu, Leibo Liu, Shaojun Wei, Shouyi Yin:
RMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRA. 1-6 - A. Alper Goksoy, Sizhe An, Ümit Y. Ogras:
Energy-Efficient On-Chip Training for Customized Home-based Rehabilitation Systems. 1-6 - Yuhui Hao, Yiming Gan, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu:
BLITZCRANK: Factor Graph Accelerator for Motion Planning. 1-6 - Qinghai Liu, Disi Lin, Chuandong Chen, Huan He, Jianli Chen, Yao-Wen Chang:
A Matching Based Escape Routing Algorithm with Variable Design Rules and Constraints. 1-6 - Xuan-Jun Chen, Cynthia Kuan, Chia-Lin Yang:
Unified Agile Accuracy Assessment in Computing-in-Memory Neural Accelerators by Layerwise Dynamical Isometry. 1-6 - Waleed Khalil:
Lightning Talk: Unlocking the Potential of the Analog Domain: Exploring the Next Frontier in Hardware Security. 1 - Guangyao Yan, Xinzhe Liu, Hui Wang, Yajun Ha:
Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture. 1-6 - Ao Ren, Yuhao Wang, Tao Zhang, Jiaxing Shi, Duo Liu, Xianzhang Chen, Yujuan Tan, Yuan Xie:
HBP: Hierarchically Balanced Pruning and Accelerator Co-Design for Efficient DNN Inference. 1-6 - Hassan Nassar, Simon Pankner, Lars Bauer, Jörg Henkel:
Late Breaking Results: Configurable Ring Oscillators as a Side-Channel Countermeasure. 1-2 - Zhuo Su, Zehong Yu, Dongyan Wang, Yixiao Yang, Rui Wang, Wanli Chang, Aiguo Cui, Yu Jiang:
STCG: State-Aware Test Case Generation for Simulink Models. 1-6 - Jiteshri Dasari, Maciej J. Ciesielski:
Formal Verification of Restoring Dividers made Fast and Simple. 1-6 - Duo Wang, Mingyu Yan, Xin Liu, Mo Zou, Tianyu Liu, Wenming Li, Xiaochun Ye, Dongrui Fan:
A High-accurate Multi-objective Exploration Framework for Design Space of CPU. 1-6 - Yanchi Dong, Tianyu Jia, Kaixuan Du, Yiqi Jing, Qijun Wang, Pixian Zhan, Yadong Zhang, Fengyun Yan, Yufei Ma, Yun Liang, Le Ye, Ru Huang:
A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML Hardware. 1-6 - Chaoqun Shen, Jiliang Zhang, Gang Qu:
MES-Attacks: Software-Controlled Covert Channels based on Mutual Exclusion and Synchronization. 1-6 - Zelin Du, Wei Zhang, Zimeng Zhou, Zili Shao, Lei Ju:
Accelerating DNN Inference with Heterogeneous Multi-DPU Engines. 1-6 - Siting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu, Martin D. F. Wong:
Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement. 1-6 - Penghao Sun, Litong You, Shengan Zheng, Wanru Zhang, Ruoyan Ma, Jie Yang, Guanzhong Wang, Feng Zhu, Shu Li, Linpeng Huang:
Learning-based Data Separation for Write Amplification Reduction in Solid State Drives. 1-6 - Samuel Coward, George A. Constantinides, Theo Drane:
Automating Constraint-Aware Datapath Optimization using E-Graphs. 1-6 - Nojan Sheybani, Zahra Ghodsi, Ritvik Kapila, Farinaz Koushanfar:
ZKROWNN: Zero Knowledge Right of Ownership for Neural Networks. 1-6 - Eunji Yoo, Gunho Park, Jung Gyu Min, Se Jung Kwon, Baeseong Park, Dongsoo Lee, Youngjoo Lee:
TF-MVP: Novel Sparsity-Aware Transformer Accelerator with Mixed-Length Vector Pruning. 1-6 - Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst:
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. 1-6 - Iris Hui-Ru Jiang:
Lightning Talk: All Routes to Timing Closure. 1-2 - Ziyi Wang, Siting Liu, Yuan Pu, Song Chen, Tsung-Yi Ho, Bei Yu:
Restructure-Tolerant Timing Prediction via Multimodal Fusion. 1-6 - Susmit Jha:
Lightning Talk: Trinity - Assured Neuro-symbolic Model Inspired by Hierarchical Predictive Coding. 1-2 - Wei-Hsu Chen, Yao-Wen Chang:
Graph-Based Simultaneous Placement and Routing for Two-Dimensional Directed Self-Assembly Technology. 1-6 - Pierpaolo Morì, Shambhavi Balamuthu Sampath, Lukas Frickenstein, Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Walter Stechele, Claudio Passerone:
WinoTrain: Winograd-Aware Training for Accurate Full 8-bit Convolution Acceleration. 1-6 - Xinhao Yang, Tianyu Fu, Guohao Dai, Shulin Zeng, Kai Zhong, Ke Hong, Yu Wang:
An Efficient Accelerator for Point-based and Voxel-based Point Cloud Neural Networks. 1-6 - Jian-Jia Chen, Niklas Ueter, Mario Günzel, Georg von der Brüggen, Tei-Wei Kuo:
Property-Based Timing Analysis and Optimization for Complex Cyber-Physical Real-Time Systems. 1-2 - Vijay Janapa Reddi, Amir Yazdanbakhsh:
Architecture 2.0: Challenges and Opportunities. 1-2 - Xiangguo Liu, Yunpeng Luo, Anthony Goeckner, Trishna Chakraborty, Ruochen Jiao, Ningfei Wang, Yixuan Wang, Takami Sato, Qi Alfred Chen, Qi Zhu:
Invited: Waving the Double-Edged Sword: Building Resilient CAVs with Edge and Cloud Computing. 1-4 - Shaoyi Huang, Haowen Fang, Kaleel Mahmood, Bowen Lei, Nuo Xu, Bin Lei, Yue Sun, Dongkuan Xu, Wujie Wen, Caiwen Ding:
Neurogenesis Dynamics-inspired Spiking Neural Network Training Acceleration. 1-6 - Fangxin Liu, Haomin Li, Yongbiao Chen, Tao Yang, Li Jiang:
HyperAttack: An Efficient Attack Framework for HyperDimensional Computing. 1-6 - Chun-Yu Wei, Jie-Hong R. Jiang:
Don't-Care Aware ESOP Extraction via Reduced Decomposition-Tree Exploration. 1-6 - Dennis Rich, Anna Kasperovich, Mohamadali Malakoutian, Robert M. Radway, Shiho Hagiwara, Takahide Yoshikawa, Srabanti Chowdhury, Subhasish Mitra:
Thermal Scaffolding for Ultra-Dense 3D Integrated Circuits. 1-6 - Wenhong Ma, Xiangzhen Xiao, Guoqi Xie, Nan Guan, Yu Jiang, Wanli Chang:
Fault Tolerance in Time-Sensitive Networking with Mixed-Critical Traffic. 1-6 - Socrates S. Wong, Cecilio C. Tamarit, José F. Martínez:
PUMICE: Processing-using-Memory Integration with a Scalar Pipeline for Symbiotic Execution. 1-6 - Chi-Tse Huang, Cheng-Yang Chang, Yu-Chuan Chuang, An-Yeu Andy Wu:
BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing. 1-6 - Xiaofan Yu, Minxuan Zhou, Fatemeh Asgarinejad, Onat Güngör, Baris Aksanli, Tajana Rosing:
Lightning Talk: Private and Secure Edge AI with Hyperdimensional Computing. 1-2 - Liang Wang, Kai Lu, Nan Zhang, Xiaoyang Qu, Jianzong Wang, Jiguang Wan, Guokuan Li, Jing Xiao:
Shoggoth: Towards Efficient Edge-Cloud Collaborative Real-Time Video Inference via Adaptive Online Learning. 1-6 - Subhajit Dutta Chowdhury, Kaixin Yang, Pierluigi Nuzzo:
SimLL: Similarity-Based Logic Locking Against Machine Learning Attacks. 1-6 - Lars Nolte, Tim Twardzik, Camille Jalier, Zhigang Huang, Jiyuan Shi, Clara Kowalsky, Thomas Wild, Andreas Herkersdorf:
HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event Notification. 1-6 - Victor M. van Santen, Marcel Walter, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Robert Wille, Hussam Amrouch:
Design Automation for Cryogenic CMOS Circuits. 1-6 - Chih-Chia Lin, Chia-Yin Liu, Chih-Hsuan Yen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Intermittent-Aware Neural Network Pruning. 1-6 - Yixuan Hu, Tengyu Zhang, Meng Li, Renjie Wei, Liangzhen Lai, Yuan Wang, Runsheng Wang, Ru Huang:
Efficient Non-Linear Adder for Stochastic Computing with Approximate Spatial-Temporal Sorting Network. 1-6 - Zhongzhi Yu, Yonggan Fu, Jiayi Yuan, Haoran You, Yingyan Celine Lin:
NetBooster: Empowering Tiny Deep Learning By Standing on the Shoulders of Deep Giants. 1-6 - Nan Wu, Yingjie Li, Cong Hao, Steve Dai, Cunxi Yu, Yuan Xie:
Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks. 1-6 - Amitesh Sridharan, Fan Zhang, Yang Sui, Bo Yuan, Deliang Fan:
DSPIMM: A Fully Digital SParse In-Memory Matrix Vector Multiplier for Communication Applications. 1-6 - Zhe Jiang, Nathan Fisher, Nan Guan, Zheng Dong:
BlueFace: Integrating an Accelerator into the Core's Pipeline through Algorithm-Interface Co-Design for Real-Time SoCs. 1-6 - Najmeh Nazari, Chongzhou Fang, Sai Manoj P. D., Houman Homayoun:
Don't Cross Me! Cross-layer System Security. 1-2 - Bruno Morais, Gunar Schirner:
DmTSAR-ILP: Allocating a Unified Domain Platform for Streaming Applications. 1-6 - Kazuki Monta, Makoto Nagata, Josep Balasch, Ingrid Verbauwhede:
On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits. 1-6 - Akul Malhotra, Chunguang Wang, Sumeet Kumar Gupta:
TFix: Exploiting the Natural Redundancy of Ternary Neural Networks for Fault Tolerant In-Memory Vector Matrix Multiplication. 1-6 - Jeremy Casas, Zhenkun Yang, Wen Wang, Jin Yang, Adwait Godbole:
Towards A Formally Verified Fully Homomorphic Encryption Compute Engine. 1-6 - Hanrui Zhao, Xia Zeng, Niuniu Qi, Zhengfeng Yang, Zhenbing Zeng:
Safe DNN-type Controller Synthesis for Nonlinear Systems via Meta Reinforcement Learning. 1-6 - Antoine Grosnit, Matthieu Zimmer, Rasul Tutunov, Xing Li, Lei Chen, Fan Yang, Mingxuan Yuan, Haitham Bou-Ammar:
Lightweight Structural Choices Operator for Technology Mapping. 1-6 - Jaeho Lee, Shinnung Jeong, Seungbin Song, Kunwoo Kim, Heelim Choi, Youngsok Kim, Hanjun Kim:
Occamy: Memory-efficient GPU Compiler for DNN Inference. 1-6 - Gianluca Brilli, Giacomo Valente, Alessandro Capotondi, Paolo Burgio, T. Di Masciov, Paolo Valente, Andrea Marongiu:
Fine-Grained QoS Control via Tightly-Coupled Bandwidth Monitoring and Regulation for FPGA-based Heterogeneous SoCs. 1-6 - JaeHwa Jeon, Jae-Youn Hong, Sunghoon Kim, Insu Choi, Joon-Sung Yang:
PIE-DRAM: Postponing IECC to Enhance DRAM performance with access table. 1-2 - Tianyu Zhang, Xiaobo Sharon Hu, Song Han:
Contention-Free Configured Grant Scheduling for 5G URLLC Traffic. 1-6 - Jeferson González-Gómez, Mohammed Bakr Sikal, Heba Khdr, Lars Bauer, Jörg Henkel:
Smart Detection of Obfuscated Thermal Covert Channel Attacks in Many-core Processors. 1-6 - Sudeep Pasricha:
Lightning Talk: Efficient Embedded Machine Learning Deployment on Edge and IoT Devices. 1-2 - Yu Zhang, Yifan Chen, Zhonglin Xie, Hong Xu, Zaiwen Wen, Yibo Lin, Bei Yu:
LRSDP: Low-Rank SDP for Triple Patterning Lithography Layout Decomposition. 1-6 - Armin Darjani, Nima Kavand, Shubham Rai, Akash Kumar:
Discerning Limitations of GNN-based Attacks on Logic Locking. 1-6 - Liu Liu, Shubham Kumar, Simon Thomann, Hussam Amrouch, Xiaobo Sharon Hu:
Compact and High-Performance TCAM Based on Scaled Double-Gate FeFETs. 1-6 - Jian Zhang, Jilin Zhang, Dexuan Huo, Hong Chen:
ANAS: Asynchronous Neuromorphic Hardware Architecture Search Based on a System-Level Simulator. 1-6 - Jihe Wang, Zhaoqing Wang, Danghui Wang:
PseudoSC: A Binary Approximation to Stochastic Computing within Latent Operation-Space for Ultra-Lightweight on-Edge DNNs. 1-6 - Ashwin Sanjay Lele, Muya Chang, Samuel D. Spetalnick, Brian Crafton, Arijit Raychowdhury, Yan Fang:
Neuromorphic Swarm on RRAM Compute-in-Memory Processor for Solving QUBO Problem. 1-6 - Vijaykrishnan Narayanan:
Lightning Talk: Can memory technologies meet demands of data abundant applications? 1-2 - Jiang Hu:
Lightning Talk: Power and Performance Reconciliation - from Tradeoff to Win-Win. 1-2 - Enrico Reggiani, Renzo Andri, Lukas Cavigelli:
Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation. 1-6 - Xuan Wang, Sijun Tao, Jingjing Zhu, Yiyu Shi, Weikang Qian:
AccALS: Accelerating Approximate Logic Synthesis by Selection of Multiple Local Approximate Changes. 1-6 - Guohao Chen, Zheng Zeng, Benchao Zhu, Jiawei Li, Kun Wang, Jun Yu, Jianli Chen:
Mixed-cell-height Placement with Minimum-Implant-Area and Drain-to-Drain Abutment Constraints. 1-6 - Jialai Wang, Wenjie Qu, Yi Rong, Han Qiu, Qi Li, Zongpeng Li, Chao Zhang:
MPass: Bypassing Learning-based Static Malware Detectors. 1-6 - Junyao Wang, Hanning Chen, Mariam Issa, Sitao Huang, Mohsen Imani:
Late Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion Detection. 1-2 - Zhuo Liu, Yunan Yang, Zhenyu Pan, Anshujit Sharma, Amit Hasan, Caiwen Ding, Ang Li, Michael C. Huang, Tong Geng:
Ising-CF: A Pathbreaking Collaborative Filtering Method Through Efficient Ising Machine Learning. 1-6 - Dajiang Liu, Di Mou, Rong Zhu, Yan Zhuang, Jiaxing Shang, Jiang Zhong, Shouyi Yin:
DARIC: A Data Reuse-Friendly CGRA for Parallel Data Access via Elastic FIFOs. 1-6 - Jung-Woo Chang, Mojan Javaheripi, Farinaz Koushanfar:
VideoFlip: Adversarial Bit Flips for Reducing Video Service Quality. 1-6 - Yan-Jen Chen, Yan-Syuan Chen, Wei-Che Tseng, Cheng-Yu Chiang, Yu-Hsiang Lo, Yao-Wen Chang:
Late Breaking Results: Analytical Placement for 3D ICs with Multiple Manufacturing Technologies. 1-2 - Nikil D. Dutt, Bryan Donyanavard:
Lightning Talk: The New Era of Computational Cognitive Intelligence. 1-2 - Yu Mao, Jingzong Li, Yufei Cui, Chun Jason Xue:
Faster and Stronger Lossless Compression with Optimized Autoregressive Framework. 1-6 - Richard Petri, Grace Li Zhang, Yiran Chen, Ulf Schlichtmann, Bing Li:
PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration. 1-6 - Yuhang Li, Abhishek Moitra, Tamar Geller, Priyadarshini Panda:
Input-Aware Dynamic Timestep Spiking Neural Networks for Efficient In-Memory Computing. 1-6 - Jiapei Zheng, Hao Jiang, Xinkai Nie, Zhangcheng Huang, Chixiao Chen, Qi Liu:
TiPU: A Spatial-Locality-Aware Near-Memory Tile Processing Unit for 3D Point Cloud Neural Network. 1-6 - Jiaxian Chen, Zhaoyu Zhong, Kaoyi Sun, Chenlin Ma, Rui Mao, Yi Wang:
Lift: Exploiting Hybrid Stacked Memory for Energy-Efficient Processing of Graph Convolutional Networks. 1-6 - Cangyuan Li, Ying Wang, Huawei Li, Yinhe Han:
APPEND: Rethinking ASIP Synthesis in the Era of AI. 1-6 - Yixuan Luo, Cheng Tan, Nicolas Bohm Agostini, Ang Li, Antonino Tumeo, Nirav Dave, Tong Geng:
ML-CGRA: An Integrated Compilation Framework to Enable Efficient Machine Learning Acceleration on CGRAs. 1-6 - Ao Zhou, Jianlei Yang, Yingjie Qi, Yumeng Shi, Tong Qiao, Weisheng Zhao, Chunming Hu:
Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms. 1-6 - Junyao Wang, Sitao Huang, Mohsen Imani:
DistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification. 1-6 - He Jiang, Hongyi Cheng, Shikai Guo, Xiaochen Li:
Partition Based Differential Testing for Finding Embedded Code Generation Bugs in Simulink. 1-6 - Sukarn Agarwal, Shounak Chakraborty, Magnus Själander:
Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR). 1-6 - Noel Daniel Gundi, Zinnia Muntaha Mowri, Andrew Chamberlin, Sanghamitra Roy, Koushik Chakraborty:
STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit. 1-6 - Deming Chen:
Lightning Talk: The Next Wave of High-level Synthesis. 1-3 - Mingjia Fan, Xiaotian Tian, Yintao He, Junxian Li, Yiru Duan, Xiaozhe Hu, Ying Wang, Zhou Jin, Weifeng Liu:
AmgR: Algebraic Multigrid Accelerated on ReRAM. 1-6 - Jasper Van Woudenberg, Peter Grossmann, Avinash Varna, Joseph Friel, Daniel Dinu, Ronnie Lindsay, Steve J. Brown:
Invited: Pre-silicon Side Channel and Fault Analysis. 1-4 - Hongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu:
Layout Decomposition via Boolean Satisfiability. 1-6 - Antian Wang, Bingyin Zhao, Weihang Tan, Yingjie Lao:
NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation. 1-6 - Jin-Sung Kim, Alex McCaskey, Bettina Heim, Manish Modani, Sam Stanwyck, Timothy B. Costa:
CUDA Quantum: The Platform for Integrated Quantum-Classical Computing. 1-4 - Onur Mutlu, Can Firtina:
Invited: Accelerating Genome Analysis via Algorithm-Architecture Co-Design. 1-4 - Bo Yu, Jie Tang, Shaoshan Liu:
Invited: Autonomous Driving Digital Twin Empowered Design Automation: An Industry Perspective. 1-4 - Limin Wang, Lei Bu, Fu Song:
SCAGuard: Detection and Classification of Cache Side-Channel Attacks via Attack Behavior Modeling and Similarity Comparison. 1-6 - Lin Ding, Song Bian, Jiliang Zhang:
PIMA-LPN: Processing-in-memory Acceleration for Efficient LPN-based Post-Quantum Cryptography. 1-6 - Soonhoi Ha:
How to Boost Deep Neural Networks for Computer Vision. 1-2 - Sai Shubham, Shubham Pandit, Kailash Prasad, Joycee Mekie:
PVC-RAM:Process Variation Aware Charge Domain In-Memory Computing 6T-SRAM for DNNs. 1-2 - Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik:
INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms. 1-4 - Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator. 1-6 - Onur Mutlu:
Lightning Talk: Memory-Centric Computing. 1-2 - Jiaqi Yang, Hao Zheng, Ahmed Louri:
Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications. 1-6 - Jinwen Wang, Yuhao Wu, Han Liu, Bo Yuan, Roger D. Chamberlain, Ning Zhang:
IP Protection in TinyML. 1-6 - Min-Hsuan Chung, Je-Wei Chuang, Yao-Wen Chang:
Any-Angle Routing for Redistribution Layers in 2.5D IC Packages. 1-6 - Ding-Hao Wang, Shuo-Hung Hsu, Shu-Hsiang Yang, Pei-Ju Lin, Hui-Ting Yang, Mark Po-Hung Lin:
Late Breaking Results: PVT-Sensitive Delay Fitting for High-Performance Computing. 1-2 - Xiaolei Zhao, Zhaoyun Chen, Yang Shi, Mei Wen, Chunyun Zhang:
Automatic End-to-End Joint Optimization for Kernel Compilation on DSPs. 1-6 - Hao Qi, Yu Zhang, Ligang He, Kang Luo, Jun Huang, Haoyu Lu, Jin Zhao, Hai Jin:
PSMiner: A Pattern-Aware Accelerator for High-Performance Streaming Graph Pattern Mining. 1-6 - Saranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra:
G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators. 1-6 - Zihan Jiang, Fubing Mao, Yapu Guo, Xu Liu, Haikun Liu, Xiaofei Liao, Hai Jin, Wei Zhang:
ACGraph: Accelerating Streaming Graph Processing via Dependence Hierarchy. 1-6 - Alessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu:
Improving Standard-Cell Design Flow using Factored Form Optimization. 1-6 - Yongqiang Lyu, Rihui Sun, Gang Qu:
Processor Vulnerability Discovery. 1-3 - Zizheng Guo, Zuodong Zhang, Xun Jiang, Wuxi Li, Yibo Lin, Runsheng Wang, Ru Huang:
General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism. 1-6 - Qilin Zheng, Shiyu Li, Yitu Wang, Ziru Li, Yiran Chen, Hai Helen Li:
Accelerating Sparse Attention with a Reconfigurable Non-volatile Processing-In-Memory Architecture. 1-6 - Jinxin Zhang, Jiarui Bao, Zhangcheng Huang, Xuan Zeng, Ye Lu:
Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning. 1-6 - Jinhua Cui, Kai Tang, Laurence T. Yang:
A Fast Secure Deletion Strategy for High-Density Flash Memory through WOM-v Codes. 1-6 - You Li, Guannan Zhao, Yunqi He, Hai Zhou:
SE3: Sequential Equivalence Checking for Non-Cycle-Accurate Design Transformations †. 1-6 - Yan Ding, Chubo Liu, Mingxing Duan, Wanli Chang, Keqin Li, Kenli Li:
HAIMA: A Hybrid SRAM and DRAM Accelerator-in-Memory Architecture for Transformer. 1-6 - Wei W. Xing, Zheng Xing, Rongqi Lu, Zhelong Wang, Ning Xu, Yuanqing Cheng, Weisheng Zhao:
TOTAL: Multi-Corners Timing Optimization Based on Transfer and Active Learning. 1-6 - Liang-Chi Chen, Chien-Chung Ho, Yuan-Hao Chang:
UpPipe: A Novel Pipeline Management on In-Memory Processors for RNA-seq Quantification. 1-6 - Anupam Golder, Debayan Das, Santosh Ghosh, Avinash Varna, Majid Sabbagh, Sayak Ray, Rana Elnaggar, Joseph Friel, Daniel Dinu, Jason M. Fung:
Power Side-Channel Vulnerability Assessment of Lightweight Cryptographic Scheme, XOODYAK. 1-6 - Abhishek Balasubramaniam, Febin Sunny, Sudeep Pasricha:
R-TOSS: A Framework for Real-Time Object Detection using Semi-Structured Pruning. 1-6 - Yihong Zhu, Wenping Zhu, Chen Chen, Min Zhu, Zhengdong Li, Shaojun Wei, Leibo Liu:
Mckeycutter: A High-throughput Key Generator of Classic McEliece on Hardware. 1-6 - Yu-Chia Liu, Kuan-Chieh Hsu, Hung-Wei Tseng:
Rethinking Programming Frameworks for In-Storage Processing. 1-6 - Yonggan Fu, Ye Yuan, Shang Wu, Jiayi Yuan, Yingyan Celine Lin:
Robust Tickets Can Transfer Better: Drawing More Transferable Subnetworks in Transfer Learning. 1-6 - Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan:
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. 1-6 - Zhirui Hu, Youzuo Lin, Qiang Guan, Weiwen Jiang:
Battle Against Fluctuating Quantum Noise: Compression-Aided Framework to Enable Robust Quantum Neural Network. 1-6 - Zhiding Liang, Zhixin Song, Jinglei Cheng, Zichang He, Ji Liu, Hanrui Wang, Ruiyang Qin, Yiru Wang, Song Han, Xuehai Qian, Yiyu Shi:
Hybrid Gate-Pulse Model for Variational Quantum Algorithms. 1-6 - Phuoc Pham, Jaeyong Chung:
AGD: A Learning-based Optimization Framework for EDA and its Application to Gate Sizing. 1-6 - Wei Zi, Qian Li, Xiaoming Sun:
Optimal Synthesis of Multi-Controlled Qudit Gates. 1-6 - Mingchen Lu, Peiquan Jin, Xiaoliang Wang, Yongping Luo, Kuankuan Guo:
ZoneKV: A Space-Efficient Key-Value Store for ZNS SSDs. 1-6 - Haochun Liang, Xu Jiang, Nan Guan, Qingqiang He, Wang Yi:
Response Time Analysis and Optimization of DAG Tasks Exploiting Mutually Exclusive Execution. 1-6 - Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. 1-6 - Qian Wei, Yi Li, Zhiping Jia, Mengying Zhao, Zhaoyan Shen, Bingzhe Li:
Reinforcement Learning-Assisted Management for Convertible SSDs. 1-6 - Jaewon Jung, Jaeyong Song, Hongsun Jang, Hyeyoon Lee, Kanghyun Choi, Noseong Park, Jinho Lee:
Fast Adversarial Training with Dynamic Batch-level Attack Control. 1-6 - Mohsen Imani:
Lightning Talk: Bridging Neuro-Dynamics and Cognition. 1-2 - Guorui Xu, Fan Zhang, Xinjie Zhao, Yuan Chen, Shize Guo, Kui Ren:
Stalker: A Framework to Analyze Fragility of Cryptographic Libraries under Hardware Fault Models. 1-6 - Simon Toni Hofmann, Marcel Walter, Lorenzo Servadei, Robert Wille:
Late Breaking Results From Hybrid Design Automation for Field-coupled Nanotechnologies. 1-2 - Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM. 1-6 - Muhammad Shafique:
Emerging Trends in Multi-Accelerator and Distributed System for ML: Devices, Architectures, Tools and Applications. 1-2 - Rongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany:
Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation. 1-2 - Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. 1-6 - Marcus Pan:
System-level Innovation for the Next Decade AI Performance, Power, Area with Co-optimization. 1-2 - Zhengang Li, Yanyue Xie, Peiyan Dong, Olivia Chen, Yanzhi Wang:
Invited: Algorithm-Software-Hardware Co-Design for Deep Learning Acceleration. 1-4 - Yanqi Pan, Yifeng Zhang, Wen Xia, Xiangyu Zou, Cai Deng:
HUNTER: Releasing Persistent Memory Write Performance with A Novel PM-DRAM Collaboration Architecture. 1-6 - Dongsheng Zuo, Yikang Ouyang, Yuzhe Ma:
RL-MUL: Multiplier Design Optimization with Deep Reinforcement Learning. 1-6 - Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang:
GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. 1-6 - Bingyao Li, Yueqi Wang, Xulong Tang:
Orchestrated Scheduling and Partitioning for Improved Address Translation in GPUs. 1-6 - Yingheng Li, Aditya Pawar, Mohadeseh Azari, Yanan Guo, Youtao Zhang, Jun Yang, Kaushik Parasuram Seshadreesan, Xulong Tang:
Orchestrating Measurement-Based Quantum Computation over Photonic Quantum Processors. 1-6 - Arpan Suravi Prasad, Luca Benini, Francesco Conti:
Specialization meets Flexibility: a Heterogeneous Architecture for High-Efficiency, High-flexibility AR/VR Processing. 1-6 - Zhenhua Zhu, Jun Liu, Guohao Dai, Shulin Zeng, Bing Li, Huazhong Yang, Yu Wang:
Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor Search. 1-6 - Alexander Graening, Saptadeep Pal, Puneet Gupta:
Chiplets: How Small is too Small? 1-6 - Ecenur Ustun, Cunxi Yu, Zhiru Zhang:
Equality Saturation for Datapath Synthesis: A Pathway to Pareto Optimality. 1-2 - Pruek Vanna-Iampikul, Lingjun Zhu, Serhat Erdogan, Mohanalingam Kathaperumal, Ravi Agarwal, Ram Gupta, Kevin Rinebold, Sung Kyu Lim:
Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits. 1-6 - Xizi Chen, Rui Pan, Xiaomeng Wang, Fengshi Tian, Chi-Ying Tsui:
Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification. 1-2 - Size Zheng, Siyuan Chen, Yun Liang:
Memory and Computation Coordinated Mapping of DNNs onto Complex Heterogeneous SoC. 1-6 - Yanfang Liu, Guohao Dai, Wei W. Xing:
Seeking the Yield Barrier: High-Dimensional SRAM Evaluation Through Optimal Manifold. 1-6 - Hao Guo, Sayandeep Saha, Vasudev Gohil, Satwik Patnaik, Debdeep Mukhopadhyay, Jeyavijayan (JV) Rajendran:
ExploreFault: Identifying Exploitable Fault Models in Block Ciphers with Reinforcement Learning. 1-6 - Hongxiang Fan, Mark Chen, Liam Castelli, Zhiqiang Que, He Li, Kenneth Long, Wayne Luk:
When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA. 1-6 - Tianyu Wang, Jin Xue, Zelin Du, Zhiqi Wang, Yaotian Cui, Zili Shao:
Lightning Talk: Model, Framework and Integration for In-Storage Computing with Computational SSDs. 1-2 - Yu Huang, Long Zheng, Haifeng Liu, Zhuoran Zhou, Dan Chen, Pengcheng Yao, Qinggang Wang, Xiaofei Liao, Hai Jin:
MeG2: In-Memory Acceleration for Genome Graphs Analysis. 1-6 - Tao Yang, Yiyuan Zhou, Qidong Tang, Feng Xu, Hui Ma, Jieru Zhao, Li Jiang:
SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix Multiplication. 1-6 - Janghyeon Kim, Janghwan Lee, Jungwook Choi, JeongHo Han, Sangheon Lee:
Range-Invariant Approximation of Non-Linear Operations for Efficient BERT Fine-Tuning. 1-6 - Junhuan Yang, Yi Sheng, Yuzhou Zhang, Weiwen Jiang, Lei Yang:
On-Device Unsupervised Image Segmentation. 1-6 - Tianji Liu, Evangeline F. Y. Young:
Rethinking AIG Resynthesis in Parallel. 1-6 - Jiang Wu, Yan Lei, Zhuo Zhang, Xiankai Meng, Deheng Yang, Pan Li, Jiayu He, Xiaoguang Mao:
Mantra: Mutation Testing of Hardware Design Code Based on Real Bugs. 1-6 - Mengying Zhao, Fanjin Xu, Huichuan Zheng, Hao Zhang, Yuqing Xiong, Zhiping Jia, Xiaojun Cai:
Correlation-guided Placement for Nonvolatile FPGAs. 1-6 - Qiushi Li, Ju Ren, Yan Zhang, Chengru Song, Yiqiao Liao, Yaoxue Zhang:
Privacy-Preserving DNN Training with Prefetched Meta-Keys on Heterogeneous Neural Network Accelerators. 1-6 - Hao Kong, Di Liu, Xiangzhong Luo, Shuo Huai, Ravi Subramaniam, Christian Makaya, Qian Lin, Weichen Liu:
Towards Efficient Convolutional Neural Network for Embedded Hardware via Multi-Dimensional Pruning. 1-6 - Jin Zhao, Yu Zhang, Jian Cheng, Yiyang Wu, Chuyue Ye, Hui Yu, Zhiying Huang, Hai Jin, Xiaofei Liao, Lin Gu, Haikun Liu:
SaGraph: A Similarity-aware Hardware Accelerator for Temporal Graph Processing. 1-6 - Wei Li, Fangzhou Wang, José M. F. Moura, R. D. (Shawn) Blanton:
Global Floorplanning via Semidefinite Programming. 1-6 - Zhou Wang, Jingchuan Wei, Boxiao Han, Hongjun He, Leibo Liu, Shaojun Wei, Shouyi Yin:
CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism. 1-6 - Pengju Yao, Ping Zhang, Wenxing Zhu:
Pathfinding Model and Lagrangian-Based Global Routing. 1-6 - Guoqi Xie, Chenglai Xiong, Wei Wu, Renfa Li, Wanli Chang:
Holistic WCRT Analysis for Global Fixed-Priority Preemptive Multiprocessor Scheduling. 1-6 - Wenkai Liang, Hao Hu, Xiangyu Zou, Wen Xia, Yanqi Pan:
DRPTM: A Decoupled Read-efficient High-scalable Persistent Transactional Memory. 1-6 - Zheyuan Ma, Xi Tan, Lukasz Ziarek, Ning Zhang, Hongxin Hu, Ziming Zhao:
Return-to-Non-Secure Vulnerabilities on ARM Cortex-M TrustZone: Attack and Defense. 1-6 - Huamao Wu, Yuan Chen, Yajin Zhou, Yifei Wang, Lubo Zhang:
DriverJar: Lightweight Device Driver Isolation for ARM. 1-6 - Inhwan Lee, Eunhwan Kim, Nameun Kang, Hyunmyung Oh, Jae-Joon Kim:
In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time. 1-6 - Jia Chen, Fengbin Tu, Kunming Shao, Fengshi Tian, Xiao Huo, Chi-Ying Tsui, Kwang-Ting Cheng:
AutoDCIM: An Automated Digital CIM Compiler. 1-6 - Lixia Han, Peng Huang, Zheng Zhou, Yiyang Chen, Xiaoyan Liu, Jinfeng Kang:
A Convolution Neural Network Accelerator Design with Weight Mapping and Pipeline Optimization. 1-6 - Rajiv V. Joshi, Sudipto Chakraborty:
(Invited) Predictive analytics for cryogenic CMOS in future quantum computing systems. 1-4 - Jian Peng, Tingyuan Liang, Zhiyao Xie, Wei Zhang:
PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNN. 1-6 - Md. Shohidul Islam, Ihsen Alouani, Khaled N. Khasawneh:
Stochastic-HMDs: Adversarial-Resilient Hardware Malware Detectors via Undervolting. 1-6 - Jinming Zhuang, Zhuoping Yang, Peipei Zhou:
High Performance, Low Power Matrix Multiply Design on ACAP: from Architecture, Design Challenges and DSE Perspectives. 1-6 - Lirui Xiao, Huanrui Yang, Zhen Dong, Kurt Keutzer, Li Du, Shanghang Zhang:
CSQ: Growing Mixed-Precision Quantization Scheme with Bi-level Continuous Sparsification. 1-6 - Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst:
Invited: Caching in Automated Data Centric Vehicles for Edge Computing Scenarios. 1-4 - Qianqian Song, Xu Cheng, Peng Cao:
Critical Paths Prediction under Multiple Corners Based on BiLSTM Network. 1-6 - Chang Liu, Yongqiang Lyu, Haixia Wang, Pengfei Qiu, Dapeng Ju, Gang Qu, Dongsheng Wang:
Leaky MDU: ARM Memory Disambiguation Unit Uncovered and Vulnerabilities Exposed. 1-6 - Lin Li, Xianzhang Chen, Jiali Li, Jiapin Wang, Duo Liu, Yujuan Tan, Ao Ren:
Optimizing the Performance of NDP Operations by Retrieving File Semantics in Storage. 1-6 - Saurabh Pujar, Luca Buratti, Xiaojie Guo, Nicolas Dupuis, Burn L. Lewis, Sahil Suneja, Atin Sood, Ganesh Nalawade, Matthew Jones, Alessandro Morari, Ruchir Puri:
Invited: Automated Code generation for Information Technology Tasks in YAML through Large Language Models. 1-4 - Mengquan Li, Chao Wu, Congming Gao, Cheng Ji, Kenli Li:
RLAlloc: A Deep Reinforcement Learning-Assisted Resource Allocation Framework for Enhanced Both I/O Throughput and QoS Performance of Multi-Streamed SSDs. 1-6 - Andreas Karatzas, Iraklis Anagnostopoulos:
OmniBoost: Boosting Throughput of Heterogeneous Embedded Devices under Multi-DNN Workload. 1-6 - Haitong Li:
Emerging Hardware Technologies and 3D System Integration for Ubiquitous Machine Intelligence. 1-2 - Jian Gao, Weidong Cao, Xuan Zhang:
RoSE: Robust Analog Circuit Parameter Optimization with Sampling-Efficient Reinforcement Learning. 1-6 - Guan Shen, Jieru Zhao, Zeke Wang, Zhe Lin, Wenchao Ding, Chentao Wu, Quan Chen, Minyi Guo:
MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator Systems. 1-6 - Steve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany:
Efficient Transformer Inference with Statically Structured Sparse Attention. 1-6 - Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng:
cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. 1-6 - Kuan-Cheng Chen, Yan-Lin Chen, Yu-Sheng Lu, Yao-Wen Chang:
Toward Parallelism-Optimal Topology Generation for Wavelength-Routed Optical NoC Designs. 1-6 - Deepika Sharma, Adarsh Kumar Kosta, Kaushik Roy:
Lightning Talk: A Perspective on Neuromorphic Computing. 1-2 - Ziyue Liu, Yixing Li, Jing Hu, Xinling Yu, Shinyu Shiau, Xin Ai, Zhiyu Zeng, Zheng Zhang:
DeepOHeat: Operator Learning-based Ultra-fast Thermal Simulation in 3D-IC Design. 1-6 - Zishen Wan, Nandhini Chandramoorthy, Karthik Swaminathan, Pin-Yu Chen, Vijay Janapa Reddi, Arijit Raychowdhury:
BERRY: Bit Error Robustness for Energy-Efficient Reinforcement Learning-Based Autonomous Systems. 1-6 - Yifan Hua, Shengan Zheng, Ji Yin, Weidong Chen, Linpeng Huang:
Bumblebee: A MemCache Design for Die-stacked and Off-chip Heterogeneous Memory Systems. 1-6 - Min Li, Zhengyuan Shi, Qiuxia Lai, Sadaf Khan, Shaowei Cai, Qiang Xu:
On EDA-Driven Learning for SAT Solving. 1-6 - Nils Quetschlich, Lukas Burgholzer, Robert Wille:
Compiler Optimization for Quantum Computing Using Reinforcement Learning. 1-6 - Ruisi Zhang, Mojan Javaheripi, Zahra Ghodsi, Amit Bleiweiss, Farinaz Koushanfar:
AdaGL: Adaptive Learning for Agile Distributed Training of Gigantic GNNs. 1-6 - Hyunsei Lee, Jiseung Kim, Hanning Chen, Ariela Zeira, Narayan Srinivasa, Mohsen Imani, Yeseong Kim:
Comprehensive Integration of Hyperdimensional Computing with Deep Learning towards Neuro-Symbolic AI. 1-6 - Hyunseung Lee, Jihoon Hong, Soosung Kim, Seung Yul Lee, Jae W. Lee:
A Memory-Efficient Edge Inference Accelerator with XOR-based Model Compression. 1-6 - Patrick Iff, Maciej Besta, Matheus A. Cavalcante, Tim Fischer, Luca Benini, Torsten Hoefler:
HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement. 1-6 - Behnaz Ranjbar, Ali Hosseinghorban, Akash Kumar:
ADAPTIVE: Agent-Based Learning for Bounding Time in Mixed-Criticality Systems. 1-6 - Yi-Chen Lu, Wei-Ting Chan, Deyuan Guo, Sudipto Kundu, Vishal Khandelwal, Sung Kyu Lim:
RL-CCD: Concurrent Clock and Data Optimization using Attention-Based Self-Supervised Reinforcement Learning. 1-6 - Zixiao Wang, Yunheng Shen, Wenqian Zhao, Yang Bai, Guojin Chen, Farzan Farnia, Bei Yu:
DiffPattern: Layout Pattern Generation via Discrete Diffusion. 1-6 - Tirthak Patel, Devesh Tiwari:
Invited: Building Robust Quantum System Software for Technology-Specific Characteristics. 1-4 - Liao Huang, Dajiang Liu:
Optimizing Data Reuse for CGRA Mapping Using Polyhedral-based Loop Transformations. 1-6 - Yue Tang, Nan Guan, Xu Jiang, Zheng Dong, Wang Yi:
Reaction Time Analysis of Event-Triggered Processing Chains with Data Refreshing. 1-6 - Seunghyun Lee, Jeik Choi, Seock-Hwan Noh, Jahyun Koo, Jaeha Kung:
DBPS: Dynamic Block Size and Precision Scaling for Efficient DNN Training Supported by RISC-V ISA Extensions. 1-6 - Jae-Sun Seo:
Advances and Trends on On-Chip Compute-in-Memory Macros and Accelerators. 1-6 - Suhail Basalama, Jie Wang, Jason Cong:
A Comprehensive Automated Exploration Framework for Systolic Array Designs. 1-6
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