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ORCIDISCAS 2016: Montréal, QC, Canada
- IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016. IEEE 2016, ISBN 978-1-4799-5341-7
- Yuan Wang
, Yuequan Liu, Mengyin Jiang, Song Jia, Xing Zhang:
Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics. 1-4 - Jize Jiang, Wei Shu, Kwen-Siong Chong, Tong Lin, Ne Kyaw Zwa Lwin, Joseph Sylvester Chang, Jingyuan Liu:
Total Ionizing Dose (TID) effects on finger transistors in a 65nm CMOS process. 5-8 - Jinghang Liang, Duncan G. Elliott:
Coresidual alias-locked loops. 9-12 - Yinyin Lin, Xinyi Hu, Jianguo Yang, Xiaoyong Xue:
A compact pico-second in-situ sensor using programmable ring oscillators for advanced on chip variation characterization in 28nm HKMG. 13-16 - Tomas Figliolia, Pedro Julián, Gaspar Tognetti, Andreas G. Andreou:
A true Random Number Generator using RTN noise and a sigma delta converter. 17-20 - Srikanth V. Tenneti, P. P. Vaidyanathan:
Detecting tandem repeats in DNA using Ramanujan Filter Bank. 21-24 - H. Rehouma, Daler N. Rakhmatov, Mohammed Albulayli:
Two-pass beamforming for ultrasound imaging. 25-28 - Li Zhang, Z. N. Fu, Shing-Chow Chan, H. C. Wu, Z. G. Zhang:
A new L1-regularized time-varying autoregressive model for brain connectivity estimation: A study using visual task-related fMRI data. 29-32 - Hamidreza Sadreazami, M. Omair Ahmad, M. N. S. Swamy:
Ultrasound image despeckling in the contourlet domain using the Cauchy prior. 33-36 - Ravi Patel, Eby G. Friedman, Praveen Raghavan:
Power noise in 14, 10, and 7 nm FinFET CMOS technologies. 37-40 - Ramiro Taco, Itamar Levi, Marco Lanuzza, Alexander Fish:
Extended exploration of low granularity back biasing control in 28nm UTBB FD-SOI technology. 41-44 - Alexandra L. Zimpeck, Cristina Meinhardt, Gracieli Posser, Ricardo Augusto da Luz Reis:
FinFET cells with different transistor sizing techniques against PVT variations. 45-48 - Leila Bagheriye, Roghayeh Saeidi, Siroos Toofan:
Low power and roboust FinFET SRAM cell using independent gate control. 49-52 - Alonso Morgado, Rocío del Río Fernández, José M. de la Rosa:
Design of a power-efficient widely-programmable Gm-LC band-pass sigma-delta modulator for SDR. 53-56 - Anugerah Firdauzi, Zule Xu, Masaya Miyahara, Akira Matsuzawa:
A 74.9 dB SNDR 1 MHz bandwidth 0.9 mW delta-sigma time-to-digital converter using charge pump and SAR ADC. 57-60 - Stepan Sutula, Michele Dei, Lluís Terés, Francisco Serra-Graells:
A calibration-free 96.6-dB-SNDR non-bootstrapped 1.8-V 7.9-mW delta-sigma modulator with class-AB single-stage switched VMAs. 61-64 - Anubhuti Chopra, Shouri Chatterjee:
A 24 mW, 80 dB SNR, 50 MHz multi-bit continuous time ΣΔ ADC in 28 nm FD-SOI. 65-68 - Shanthi Pavan:
Continuous-time ΔΣ modulators with dual switched capacitor resistor DACs. 69-72 - Jingjing Hu, Johannes A. Hegt, Arthur H. M. van Roermund, Sotir F. Ouzounov:
Higher-order DWA in bandpass delta-sigma modulators and its implementation. 73-76 - Chia-Hung Chen, Yi Zhang, Tao He, Gabor C. Temes:
An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces. 77-80 - Mo M. Zhang, Paul J. Hurst, Stephen H. Lewis:
An algorithmic ADC with greater than rail-to-rail input range and near-Vt supply. 81-84 - Wen-Tze Chen, Ya-Ting Shyu, Chun-Po Huang, Soon-Jyh Chang:
A pipeline ADC with latched-based ring amplifiers. 85-88 - Peter Osheroff, George S. La Rue, Subhanshu Gupta:
A highly linear 4GS/s uncalibrated voltage-to-time converter with wide input range. 89-92 - Waziha Kabir, M. Omair Ahmad, M. N. S. Swamy:
A new anchored normalization technique for score-level fusion in multimodal biometrie systems. 93-96 - Rama Srikanth Mallavarapu, Pandu Kumar Chinnamalliah, Ajit S. Bopardikar, TaeJin Ahn:
Context based compression of FASTQ data. 97-100 - Nan Cui, Timothy York, Radoslav Marinov, Suman Mondal, Shengkui Gao, Julie Margenthaler, Samuel Achilefu, Viktor Gruev:
A 110 × 64 150 mW 28 frames/s integrated visible/near-infrared CMOS image sensor with dual exposure times for image guided surgery. 101-104 - Ebrahim Ghafar-Zadeh, Hossein Pourmodheji, Sebastian Magierowski:
Differential nuclear magnetic resonance receiver: Design, implementation and experimental results. 105-108 - Jaehyuk Lee, Unsoo Ha, Hoi-Jun Yoo:
30-fps SNR equalized electrical impedance tomography IC with fast-settle filter and adaptive current control for lung monitoring. 109-112 - Leibin Ni, Hantao Huang, Hao Yu:
On-line machine learning accelerator on digital RRAM-crossbar. 113-116 - Abinash Mohanty, Naveen Suda, Minkyu Kim, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao:
High-performance face detection with CPU-FPGA acceleration. 117-120 - Jianwei Cui, Qinru Qiu:
Towards memristor based accelerator for sparse matrix vector multiplication. 121-124 - Sicheng Li, Xiaoxiao Liu, Mengjie Mao, Hai (Helen) Li, Yiran Chen, Boxun Li, Yu Wang:
Heterogeneous systems with reconfigurable neuromorphic computing accelerators. 125-128 - Yu Wang, Lixue Xia, Tianqi Tang, Boxun Li, Song Yao, Ming Cheng, Huazhong Yang:
Low power Convolutional Neural Networks on a chip. 129-132 - Jorge R. Fernandes:
An analog integrated systems course proposal for a 2nd cycle of studies of the bologna process. 133-136 - Fabio Campi, Josh Ancill:
Introducing IC reliability elements in digital circuits and systems design education. 137-140 - Sahil Shah, Jennifer Hasler, Sihwan Kim, Ishan Lal, Matt Kagle, Michelle Collins:
A remote FPAA system for research and education. 141-144 - Vedat Tavsanoglu:
Construction of the nodal conductance matrix of a planar resistive grid and derivation of the analytical expressions of its eigenvalues and eigenvectors using the Kronecker product and sum. 145-148 - Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Peter Burg, Claude Thibeault, Warren J. Gross:
Hardware decoders for polar codes: An overview. 149-152 - Jun Lin, Jin Sha, Li Li, Chenrong Xiong, Zhiyuan Yan, Zhongfeng Wang:
A high throughput belief propagation decoder architecture for polar codes. 153-156 - Bo Yuan, Keshab K. Parhi:
Belief propagation decoding of polar codes using stochastic computing. 157-160 - Junmei Yang, Chuan Zhang, Wenqing Song, Shugong Xu, Xiaohu You:
Joint detection and decoding for MIMO systems with polar codes. 161-164 - Shuanghong Sun, Zhengya Zhang:
Architecture and optimization of high-throughput belief propagation decoding of polar codes. 165-168 - Kang L. Wang, Hochul Lee, Farbod Ebrahimi, Pedram Khalili Amiri:
Ultra-low-power, high-density spintronic programmable logic (SPL). 169-172 - Caiwen Ding, Soroush Heidari, Yanzhi Wang, Yongpan Liu, Jingtong Hu:
Multi-source in-door energy harvesting for non-volatile processors. 173-176 - Mirko Prezioso, Y. Zhong, D. Gavrilov, Farnood Merrikh-Bayat, Brian Hoskins, Gina C. Adam, Konstantin K. Likharev, Dmitri B. Strukov:
Spiking neuromorphic networks with metal-oxide memristors. 177-180 - Somnath Chakraborty, Saumil Joshi, Qiangfei Xia, Hai Li, Yiran Chen, Hao Jiang, Qing Wu, Mark Barnell, J. Joshua Yang:
Built-in selectors self-assembled into memristors. 181-184 - Klodjan Bidaj, Jean-Baptiste Bégueret, Nabil Houdali, Jerome Deroo, Sébastien Rieubon:
Time-domain PLL modeling and RJ/DJ jitter decomposition. 185-188 - Ahmed S. Sayed, Hesham N. Ahmed, Ayman M. ElTager:
Miniaturized UWB offset power divider with reflection cancellation and enhanced isolation. 189-192 - Mika Pulkkinen, Tuomas Haapala, Jarno Salomaa, Kari Halonen:
45.2% Energy efficiency improvement of UWB IR Tx by use of differential PPM in 180nm CMOS. 193-196 - Jinesh P. Nair, Ashutosh Deepak Gore, Kiran Bynam, Young-Jun Hong, Changsoon Park, Seok-Ju Yun, Manoj Choudhary:
DC offset estimation for on-off keying based ultra-low power non-coherent receivers. 197-200 - Hassan Sepehrian, Leslie A. Rusch, Wei Shi:
Multi-stage 20 Gbaud driver in 130 nm CMOS for segmented Mach-Zehnder optical modulators. 201-204 - Saad Bin Nasir, Arijit Raychowdhury:
All-digital linear regulators with proactive and reactive gain-boosting for supply droop mitigation in digital load circuits. 205-208 - Shyh-Jier Huang, Pang-Jen Chiang, Tsong-Shing Lee, Wei-Fu Su:
Enhancement of ozone-generation with modular expansions and dual-drive systems. 209-212 - Fengyu Qian, Ridvan Umaz, Yanping Gong, Baikun Li, Lei Wang:
Design of a shared-stage charge pump circuit for multi-anode microbial fuel cells. 213-216 - Abdullah Abdulslam, Farid El-Sehrawy, Yehea I. Ismail:
Five-level hybrid DC-DC converter with enhanced light-load efficiency. 217-220 - Liting Yu, Xiaoxiao Wang, Yuanqing Cheng, Xiaoying Zhao, Pengyuan Jiao, Aixin Chen, Donglin Su, LeRoy Winemberg, Mehdi Sadi, Mark M. Tehranipoor:
An efficient all-digital IR-Drop Alarmer for DVFS-based SoC. 221-224 - Chengying Chen, Liming Chen, Jun Fan, Zenghui Yu, Jun Yang, Xiaoyu Hu, Yong Hei, Feng Zhang:
A 1V, 1.1mW mixed-signal hearing aid SoC in 0.13μm CMOS process. 225-228 - Hou Zhao Qi Rex, Jong Ching Chuen, Andreas Herkersdorf:
Linux apps-usage-driven power dissipation-aware scheduler. 229-232 - Yun-Chi Huang, Kuan-Chieh Hsu, Wan-shan Hsieh, Chen-Chieh Wang, Chia-Han Lu, Chung-Ho Chen:
Dynamic SIMD re-convergence with paired-path comparison. 233-236 - Hiroshi Saito, Masashi Imai, Tomohiro Yoneda:
A task allocation method for the DTTR scheme based on task scheduling of fault patterns. 237-240 - Mauro Mangia, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti:
Security analysis of rakeness-based compressed sensing. 241-244 - Qihang Yu, Yongqiang Ma, Badong Chen, José Carlos Príncipe, Nanning Zheng, Pengju Ren:
A reconfigurable parallel FPGA accelerator for the adapt-then-combine diffusion LMS algorithm. 245-248 - Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi:
Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit. 249-252 - Tadeu N. Ferreira, Markus V. S. Lima, Paulo S. R. Diniz, Wallace Alves Martins:
Low-complexity proportionate algorithms with sparsity-promoting penalties. 253-256 - Mauro Mangia, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti:
Implicit notch filtering in compressed sensing by spectral shaping of sensing matrix. 257-260 - Yan Li, Jianhao Hu, Hao Lu, Jie Chen:
Area-efficient partial-clique-energy MRF pair design with ultra-low supply voltage. 261-264 - Guangyi Lu, Yuan Wang, Jian Cao, Song Jia, Xing Zhang:
A novel low-leakage power-rail ESD clamp circuit with adjustable triggering voltage and superior false-triggering immunity for nanoscale applications. 265-268 - Manar Abdel-Galil, Hazem Hegazy, Yehea Ismail:
RC-In-RC-Out model order reduction via node merging. 269-272 - Abhishek Roy, Benton H. Calhoun:
Exploring circuit robustness to power supply variation in low-voltage latch and register-based digital systems. 273-276 - Shibang Lin, Yuan Cao, Xiaojin Zhao, Xiao Wang, Xiaofang Pan:
A compact ultra-low power physical unclonable function based on time-domain current difference measurement. 277-280 - Harald Enzinger, Karl Freiberger, Christian Vogel:
A joint linearity-efficiency model of radio frequency power amplifiers. 281-284 - Miguel D. Fernandes, Luís B. Oliveira, João Goes:
Wideband noise cancelling balun LNA with feedback biasing. 285-288 - Arthur Liraneto Torres Costa, Hamilton Klimach, Sergio Bampi:
Ultra-low voltage wideband inductorless balun LNA with high gain and high IP2 for sub-GHz applications. 289-292 - Chamith Wijenayake, Arjuna Madanayake, Leonid Belostotski, Yongsheng Xu, Len T. Bruton:
Linear RF apertures using 2-D analog beam filters. 293-296 - Scott M. Newton, Peter R. Kinget:
A 4th-order analog continuous-time filter designed using standard cells and automatic digital logic design tools. 297-300 - Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui:
A low-power chopper bandpass amplifier for biopotential sensors. 301-304 - Karim M. Megawer, Faisal A. Hussien, Mohamed M. Aboudina, Ahmed Nader Mohieldin:
An adaptive slew rate and dead zone ring amplifier. 305-308 - Kai Tang, Bo Chen, Liheng Lou, Supeng Liu, Yong Wang, Ying Zhang, Yuanjin Zheng:
A high gain decibel-linear programmable gain amplifier of synthetic aperture radar receiver. 309-312 - Wasim Hussain, Yvon Savaria, Yves Blaquière:
A compact spatially configurable differential input stage for a field programmable interconnection network. 313-316 - Philipp Häfliger, Ghazal Nabovati, Mohamad Sawan, Nicole L. Wagner, Jordan A. Greco, Robert R. Birge:
Combined optical and chemical asynchronous event pixel array. 317-320 - Gang Wang, Michael D. Poscente, Simon S. Park, Christopher N. Andrews, Orly Yadid-Pecht, Martin P. Mintchev:
Minimally invasive pseudo-continuous blood glucose monitoring: Results from in-vitro and in-vivo testing of the e-Mosquito. 321-324 - Alexandros Koutsos, Melpomeni Kalofonou, Mohammadreza Sohbati, Chris Toumazou:
Epigenetic-IC: A fully integrated sensing platform for epigenetic reaction monitoring. 325-328 - Dora Ma, Pantelis Georgiou, Chris Toumazou:
An ISFET-based switched current DNA integrator. 329-332 - Sreenil Saha, Frederic Lesage, Mohamad Sawan:
Time-resolved reflectance using short source-detector separation. 333-336 - Michele Magno, Giovanni A. Salvatore, Severin Mutter, Waleed Farrukh, Gerhard Tröster, Luca Benini:
Autonomous smartwatch with flexible sensors for accurate and continuous mapping of skin temperature. 337-340 - Jeremy Schlachter, Vincent Camus, Christian C. Enz:
Design of energy-efficient discrete cosine transform using pruned arithmetic circuits. 341-344 - Shoubhik Gupta, Hadi Heidari, Leandro Lorenzelli, Ravinder Dahiya:
Towards bendable piezoelectric oxide semiconductor field effect transistor based touch sensor. 345-348 - Stefano Caviglia, Luigi Pinna, Maurizio Valle, Chiara Bartolozzi:
An event-driven POSFET taxel for sustained and transient sensing. 349-352 - Tsung-Ching Huang, Kwang-Ting Cheng, Raymond G. Beausoleil:
Process-variation tolerant flexible circuit for wearable electronics. 353-356 - Kodai Ueyoshi, Takao Marukame, Tetsuya Asai, Masato Motomura, Alexandre Schmid:
Memory-error tolerance of scalable and highly parallel architecture for restricted Boltzmann machines in Deep Belief Network. 357-360 - Qian Wang, Youjie Li, Peng Li:
Liquid state machine based pattern recognition on FPGA with firing-activity dependent power gating and approximate computing. 361-364 - Stanislaw Wozniak, Tomas Tuma, Angeliki Pantazi, Evangelos Eleftheriou:
Learning spatio-temporal patterns in the presence of input noise using phase-change memristors. 365-368 - Hongzhi You, Da-Hui Wang:
Neuromorphic implementation of attractor dynamics in decision circuit with NMDARs. 369-372 - Frank L. Maldonado Huayaney, Elisabetta Chicca:
A VLSI implementation of a calcium-based plasticity learning model. 373-376 - Shuang Pi, Mohammad Ghadiri-Sadrabadi, Joseph C. Bardin, Qiangfei Xia:
Memristors as radiofrequency switches. 377-380 - Thomas Mikolajick, H. Wylezich, Hannes Maehne, Stefan Slesazeck:
Versatile resistive switching in niobium oxide. 381-384 - Ioulia Tzouvadaki, Alessandro Vallero, Francesca Puppo, Giovanni De Micheli, Sandro Carrara:
Resistance impact by long connections on electrical behavior of integrated Memristive Biosensors. 385-388 - Dalibor Biolek, Zdenek Kolka, Viera Biolková, Zdenek Biolek:
Memristor models for SPICE simulation of extremely large memristive networks. 389-392 - Erika Covi, Stefano Brivio, Alexantrou Serb, Themistoklis Prodromakis, M. Fanciulli, Sabina Spiga:
HfO2-based memristors for neuromorphic applications. 393-396 - Suman Datta, Rahul Pandey, Saurabh Mookerjea:
Opportunties and challenges of tunnel FETs. 397-400 - Kaship Sheikh, Shu-Jen Han, Lan Wei:
Impact of CNT process imperfection on circuit-level functionality and yield. 401-404 - Pierre-Emmanuel Gaillardon, Mehdi Hasan, Anirban Saha, Luca Gaetano Amarù, Ross Walker, Berardi Sensale Rodriguez:
Digital, analog and RF design opportunities of three-independent-gate transistors. 405-408 - Weinan Zhu, Saungeun Park, Hsiao-Yu Chang, Maruthi N. Yogeesh, Deji Akinwande:
Flexible 2D nanoelectronics from baseband to sub-THz transistors and circuits. 409-412 - Junmei Yang, Chuan Zhang, Huayi Zhou, Xiaohu You:
Pipelined belief propagation polar decoders. 413-416 - Bertrand Le Gal, Camille Leroux, Christophe Jégo:
A scalable 3-phase polar decoder. 417-420 - Jin Sha, Jun Lin, Zhongfeng Wang:
Stage-combined belief propagation decoding of polar codes. 421-424 - Tsung-Che Wu, Chang-Ming Lee, Cheng-Kuei Wang:
Construction of parallelized-decoding LDPC codes. 425-428 - Franco Paludi, Damian A. Morero, Teodoro A. Goette, Matias Schnidrig, Facundo A. Ramos, Mario R. Hueda:
Low-complexity turbo product code for high-speed fiber-optic systems based on expurgated BCH codes. 429-432 - Dalvir K. Saini, Agasthya Ayachit, Marian K. Kazimierczuk, Hiroo Sekiya:
Small-signal analysis of closed-loop PWM boost converter in CCM with complex impedance load. 433-436 - Junrui Liang:
Design of class-E power amplifier with nonlinear components by using extended impedance method. 437-440 - Abdelali El Aroudi:
Prediction of subharmonic oscillation in switching regulators with integrative feedback loops. 441-444 - Xiucheng Hao, Fan Yang, Mingxiao He, Yongan Zheng, Ying Guo, Huailin Liao:
A 93.7% peak efficiency DC-DC buck converter with all-pass network based passive level shifter in 55 nm CMOS. 445-448 - Taehwan Shin, Yongshin Kang, Seungho Yang, Seban Kim, Jaeyong Chung:
Live demonstration: Real-time image classification on a neuromorphic computing system with zero off-chip memory access. 449 - Mahir Kabeer Gharzai, Joseph A. Schmitz, Sina Balkir, Michael W. Hoffman:
Live demonstration: Programmable vision chip with neighborhood level parallel processing. 450 - Masayuki Tamaki, Hiroomi Hikawa:
Live demonstration: Off-chip learning for hardware hand-sign recognition system. 451 - Ilya Kiselev, Daniel Neil, Shih-Chii Liu:
Live demonstration: Event-driven deep neural network hardware system for sensor fusion. 452