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ORCIDIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 43
Volume 43, Number 1, January 2024
- Hyunsu Chae
, Keren Zhu, Bhyrav Mutnury, Douglas Wallace, Douglas Winterberg, Daniel De Araujo, Jay Reddy, Adam R. Klivans, David Z. Pan:
ISOP+: Machine Learning-Assisted Inverse Stack-Up Optimization for Advanced Package Design. 2-15 - Sadia Azam, Nicola Dall'Ora, Enrico Fraccaroli, Renaud Gillon, Franco Fummi:
Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review. 16-29 - Dmitrii Kirov, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli, Roberto Passerone:
Efficient Encodings for Scalable Exploration of Cyber-Physical System Architectures. 30-43 - Wenhong Ma, Guoqi Xie, Renfa Li, Wanli Chang:
Optimality-Guaranteed Design Space Pruning for CAN-FD Frame Packing. 44-56 - Vasudev Gohil, Satwik Patnaik, Hao Guo, Dileep Kalathil, Jeyavijayan Rajendran:
DETERRENT: Detecting Trojans Using Reinforcement Learning. 57-70 - Zhengfeng Huang, Jingchang Bian, Yankun Lin, Huaguo Liang, Tianming Ni:
Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement. 71-84 - Tianyu Wang, Zizhan Chen, Wenbin Zhu, Qian Wei, Zhaoyan Shen, Zili Shao:
A Bloom-Filter-Based Unique Address Checking Approach for DAG-Based Blockchain Systems. 85-98 - Wei Chen, Dake Liu:
Conflict-Free Parallel Data Access Technology for Matrix Calculation in Memory System of ASIP of 5G/6G Macro Base Stations. 99-112 - Wonyoung Lee, Mincheol Kang, Soontae Kim:
Highly VM-Scalable SSD in Cloud Storage Systems. 113-126 - Zhenge Jia, Dawei Li, Cong Liu, Liqi Liao, Xiaowei Xu, Lichuan Ping, Yiyu Shi:
TinyML Design Contest for Life-Threatening Ventricular Arrhythmia Detection. 127-140 - Arman Roohi, Sepehr Tabrizchi, Mehrdad Morsali, David Z. Pan, Shaahin Angizi:
PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators. 141-150 - Shamiul Alam, William Mitchell Hunter, Nazmul Amin, Md. Mazharul Islam, Sumeet Kumar Gupta, Ahmedullah Aziz:
Design Space Exploration for Phase Transition Material-Augmented MRAMs With Separate Read-Write Paths. 151-160 - Israel F. Araujo, Carsten Blank, Ismael C. S. Araujo, Adenilton J. da Silva:
Low-Rank Quantum State Preparation. 161-170 - Michael Vera-Panez, Kewin Cuadros-Claro, Manuel Castillo-Cara, Luis Orozco-Barbosa:
BeeGOns!: A Wireless Sensor Node for Fog Computing in Smart City Applications. 171-175 - Zihan Zhang, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing:
3A-ReRAM: Adaptive Activation Accumulation in ReRAM-Based CNN Accelerator. 176-188 - Jinyu Bai, Sifan Sun, Weisheng Zhao, Wang Kang:
CIMQ: A Hardware-Efficient Quantization Framework for Computing-In-Memory-Based Neural Network Accelerators. 189-202 - Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo:
PowerSyn: A Logic Synthesis Framework With Early Power Optimization. 203-216 - Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu:
DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack. 217-229 - Donglei Wu, Weihao Yang, Haoyu Jin, Xiangyu Zou, Wen Xia, Binxing Fang:
FedComp: A Federated Learning Compression Framework for Resource-Constrained Edge Computing Devices. 230-243 - Daijoon Hyun, Younggwang Jung, Youngsoo Shin:
Accurate Interpolation of Library Timing Parameters Through Recurrent Convolutional Neural Network. 244-248 - Mengquan Li, Kenli Li, Chao Wu, Gang Liu, Mingfeng Lan, Yunchuan Qin, Zhuo Tang, Weichen Liu:
Automated Optical Accelerator Search Toward Superior Acceleration Efficiency, Inference Robustness, and Development Speed. 249-262 - Wenjie Li, Aokun Hu, Ningyi Xu, Guanghui He:
A Precision-Scalable Deep Neural Network Accelerator With Activation Sparsity Exploitation. 263-276 - Xing Huang, Huayang Cai, Wenzhong Guo, Genggeng Liu, Tsung-Yi Ho, Krishnendu Chakrabarty, Ulf Schlichtmann:
Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning. 277-290 - Ran Wei, Zhe Jiang, Haitao Mei, Konstantinos Barmpis, Simon Foster, Tim Kelly, Yan Zhuang:
Automated Model-Based Assurance Case Management Using Constrained Natural Language. 291-304 - Haihua Hu, Guojun Han, Wenhua Wu, Chang Liu:
Channel Parameter and Read Reference Voltages Estimation in 3-D NAND Flash Memory Using Unsupervised Learning Algorithms. 305-318 - Yao Tong, Quan Chen:
Analytical Modeling of Multiple Co-Existing Inaccuracies in RF Controlling Circuits for Superconducting Quantum Computing. 319-323 - Quan Nguyen-Gia, Hyungcheol Shin:
Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series. 324-327 - Cong Wang, Dongen Yang, Jinming Lyu, Yong Dai, Cheng Zhuo, Quan Chen:
On Model Order Reduction and Exponential Integrator for Transient Circuit Simulation. 328-339 - Xiaoxiao Liang, Yikang Ouyang, Haoyu Yang, Bei Yu, Yuzhe Ma:
RL-OPC: Mask Optimization With Deep Reinforcement Learning. 340-351 - Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Laleh Behjat, José Luís Güntzel:
ILPGRC: ILP-Based Global Routing Optimization With Cell Movements. 352-365 - Husheng Han, Xing Hu, Yifan Hao, Kaidi Xu, Pucheng Dang, Ying Wang, Yongwei Zhao, Zidong Du, Qi Guo, Yanzhi Wang, Xishan Zhang, Tianshi Chen:
Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks. 366-379 - Yunpeng Song, Yina Lv, Liang Shi:
Adaptive Differential Wearing for Read Performance Optimization on High-Density nand Flash Memory. 380-393 - Irith Pomeranz:
Dynamic Test Compaction of a Compressed Test Set Shared Among Logic Blocks. 394-402
Volume 43, Number 2, February 2024
- Zheng Xiao, Weijie Chen, Yunchuan Qin, Fan Wu, Anthony Theodore Chronopoulos, Alex Nicolau, Kenli Li:
NGLIC: A Nonaligned-Row Legalization Approach for 3-D Interdie Connection. 404-416 - Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng:
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. 417-430 - Burin Amornpaisannon, Andreas Diavastos, Li-Shiuan Peh, Trevor E. Carlson:
Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models. 431-441 - Janusz Rajski, Maciej Trawka, Jerzy Tyszer, Bartosz Wlodarczak:
H2B: Crypto Hash Functions Based on Hybrid Ring Generators. 442-455 - Kai-Xuan Lee, Chun-Chieh Lin, Tzu-Chiao Yen, Ya-Shu Chen, Chan-Peng Hsu:
FASE: Energy Isolation Framework for Latency-Sensitive Applications in Intermittent Systems With Multiple Peripherals. 456-467 - Yiwen Zhang, Hui Zheng, Zonghua Gu:
EDF-Based Energy-Efficient Semi-Clairvoyant Scheduling With Graceful Degradation. 468-479 - Yiwen Zhang, Jin-Peng Ma, Hui Zheng, Zonghua Gu:
Criticality-Aware EDF Scheduling for Constrained-Deadline Imprecise Mixed-Criticality Systems. 480-491 - Zeming Cheng, Bo Zhang, Massoud Pedram:
A High-Performance, Conflict-Free Memory-Access Architecture for Modular Polynomial Multiplication. 492-505 - Chao Fang, Wei Sun, Aojun Zhou, Zhongfeng Wang:
Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Design. 506-519 - Pei Yuan, Jonathan Allcock, Shengyu Zhang:
Does Qubit Connectivity Impact Quantum Circuit Complexity? 520-533 - Weihong Liu, Jiawei Geng, Zongwei Zhu, Yang Zhao, Cheng Ji, Changlong Li, Zirui Lian, Xuehai Zhou:
Ace-Sniper: Cloud-Edge Collaborative Scheduling Framework With DNN Inference Latency Modeling on Heterogeneous Devices. 534-547 - Jiandong Mu, Mengdi Wang, Feiwen Zhu, Jun Yang, Wei Lin, Wei Zhang:
Boosting the Convergence of Reinforcement Learning-Based Auto-Pruning Using Historical Data. 548-561 - Alireza Ghaffari, Masoud Asgharian, Yvon Savaria:
Statistical Hardware Design With Multimodel Active Learning. 562-572 - Amro Eldebiky, Grace Li Zhang, Georg Böcherer, Bing Li, Ulf Schlichtmann:
CorrectNet+: Dealing With HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation. 573-585 - Yang Bai, Xufeng Yao, Qi Sun, Wenqian Zhao, Shixin Chen, Zixiao Wang, Bei Yu:
GTCO: Graph and Tensor Co-Design for Transformer-Based Image Recognition on Tensor Cores. 586-599 - Pavlos Zouridakis, Sai Manoj Pudukotai Dinakarrao:
Performance- and Energy-Aware Gait-Based User Authentication With Intermittent Computation for IoT Devices. 600-612 - Keyu Peng, Wenxing Zhu:
Pplace-MS: Methodologically Faster Poisson's Equation-Based Mixed-Size Global Placement. 613-626 - Kyeonghyeon Baek, Taewhan Kim:
CSyn-fp: Standard Cell Synthesis of Advanced Nodes With Simultaneous Transistor Folding and Placement. 627-640 - Jing Mai, Jiarui Wang, Zhixiong Di, Yibo Lin:
Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization. 641-653 - Rassul Bairamkulov, Eby G. Friedman:
Power Aware Placement of On-Chip Voltage Regulators. 654-666 - Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi, Yuzhe Ma, Bei Yu, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng:
pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis With Perimeter Adjustment. 667-680 - Hongbing Tan, Libo Huang, Zhong Zheng, Hui Guo, Qianming Yang, Li Shen, Gang Chen, Liquan Xiao, Nong Xiao:
A Low-Cost Floating-Point Dot-Product-Dual-Accumulate Architecture for HPC-Enabled AI. 681-693 - Jerin Joe, Nilanjan Mukherjee, Irith Pomeranz, Janusz Rajski:
Generation of Two-Cycle Tests for Structurally Similar Circuits. 694-703
Volume 43, Number 3, March 2024
- Sen Yin, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang:
Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation. 705-715 - Pruthvy Yellu, Nishanth Goud Chennagouni, Qiaoyan Yu:
INEAD: Intermediate Node Evaluation-Based Attack Detection for Secure Approximate Computing Systems. 716-727 - Ayesha Siddique, Khaza Anuarul Hoque:
Moving Target Defense Through Approximation for Low-Power Neuromorphic Edge Intelligence. 728-741 - Minhui Zou, Zhenhua Zhu, Tzofnat Greenberg-Toledo, Orian Leitersdorf, Jiang Li, Junlong Zhou, Yu Wang, Nan Du, Shahar Kvatinsky:
TDPP: 2-D Permutation-Based Protection of Memristive Deep Neural Networks. 742-755 - Lu Li, Guofeng Qin, Yang Yu, Weijia Wang:
Compact Instruction Set Extensions for Kyber. 756-760 - Jiayun Zhou, Guofeng Qin, Lu Li, Chun Guo, Weijia Wang:
ISA Extensions of Shuffling Against Side-Channel Attacks. 761-773 - Mohammad Ebrahimabadi, Suhee Sanjana Mehjabin, Raphael Viera, Sylvain Guilley, Jean-Luc Danger, Jean-Max Dutertre, Naghmeh Karimi:
DELFINES: Detecting Laser Fault Injection Attacks via Digital Sensors. 774-787 - Jie Zou, Xiaotian Dai, John A. McDermid:
Context-Aware Graceful Degradation for Mixed-Criticality Scheduling in Autonomous Systems. 788-801 - Rafaella Vale, Thiago Melo D. Azevedo, Ismael C. S. Araujo, Israel F. Araujo, Adenilton J. da Silva:
Circuit Decomposition of Multicontrolled Special Unitary Single-Qubit Gates. 802-811 - Guanglong Li, Yaoyao Ye:
HPPI: A High-Performance Photonic Interconnect Design for Chiplet-Based DNN Accelerators. 812-825 - Cheng-Yun Hsieh, Hsin-Ying Tsai, Yuan-Hsiang Lu, James Chien-Mo Li:
Small Sampling Overhead Error Mitigation for Quantum Circuits. 826-839 - Jie Zhang, Hongjing Huang, Jie Sun, Juan Gómez-Luna, Onur Mutlu, Zeke Wang:
SparseACC: A Generalized Linear Model Accelerator for Sparse Datasets. 840-853 - Tuo Dai, Bizhao Shi, Guojie Luo:
Weave: Abstraction and Integration Flow for Accelerators of Generated Modules. 854-867 - Shuai Yang, Wei Zi, Bujiao Wu, Cheng Guo, Jialin Zhang, Xiaoming Sun:
Efficient Quantum Circuit Synthesis for SAT-Oracle With Limited Ancillary Qubit. 868-877 - Hongyan Li, Hang Lu, Xiaowei Li:
Mortar-FP8: Morphing the Existing FP32 Infrastructure for High-Performance Deep Learning Acceleration. 878-891 - Jingyu Wang, Lu Zhang, Xueqing Li, Huazhong Yang, Yongpan Liu:
ULSeq-TA: Ultra-Long Sequence Attention Fusion Transformer Accelerator Supporting Grouped Sparse Softmax and Dual-Path Sparse LayerNorm. 892-905 - Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao:
DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory. 906-918 - Chen Yang, Yaoyao Yang, Yishuo Meng, Kaibo Huo, Siwei Xiang, Jianfei Wang, Li Geng:
Flexible and Efficient Convolutional Acceleration on Unified Hardware Using the Two-Stage Splitting Method and Layer-Adaptive Allocation of 1-D/2-D Winograd Units. 919-932 - Xiaoqiang Tang, Antonio Raffo, Nicola Donato, Giovanni Crupi, Jialin Cai:
Theoretical and Experimental Analysis of a CSWPL Behavioral Model for Microwave GaN Transistors Including DC Bias Voltages. 933-943 - Binwu Zhu, Su Zheng, Ziyang Yu, Guojin Chen, Yuzhe Ma, Fan Yang, Bei Yu, Martin D. F. Wong:
L2O-ILT: Learning to Optimize Inverse Lithography Techniques. 944-955 - Ziran Zhu, Yangjie Mei, Kangkang Deng, Huan He, Jianli Chen, Jun Yang, Yao-Wen Chang:
High-Performance Placement Engine for Modern Large-Scale FPGAs With Heterogeneity and Clock Constraints. 956-969 - Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Tunhou Zhang, Jiang Hu, Yiran Chen:
Toward Fully Automated Machine Learning for Routability Estimator Development. 970-982 - Xiaoze Lin, Liyang Lai, Huawei Li:
Parallel Static Learning Toward Heterogeneous Computing Architectures. 983-993 - Yixuan Wang, Weichao Zhou, Jiameng Fan, Zhilu Wang, Jiajun Li, Xin Chen, Chao Huang, Wenchao Li, Qi Zhu:
POLAR-Express: Efficient and Precise Formal Reachability Analysis of Neural-Network Controlled Systems. 994-1007
Volume 43, Number 4, April 2024
- Sai Pentapati, Kyungwook Chang, Sung Kyu Lim:
Pin-3D: Effective Physical Design Methodology for Multidie Co-Optimization in Monolithic 3-D ICs. 1009-1022 - Hao Ding, Yanlong He, Zhongyi Zhai, Zhi Li, Junyan Qian, Lingzhong Zhao:
Efficient 3-D Processor Array Reconfiguration Algorithms Based on Bucket Effect. 1023-1036 - Yu-Shun Hsiao, Zishen Wan, Tianyu Jia, Radhika Ghosal, Abdulrahman Mahmoud, Arijit Raychowdhury, David Brooks, Gu-Yeon Wei, Vijay Janapa Reddi:
Silent Data Corruption in Robot Operating System: A Case for End-to-End System-Level Fault Analysis Using Autonomous UAVs. 1037-1050 - Xiaohui Wei, Nan Jiang, Hengshan Yue, Xiaonan Wang, Jianpeng Zhao, Guangli Li, Meikang Qiu:
ApproxDup: Developing an Approximate Instruction Duplication Mechanism for Efficient SDC Detection in GPGPUs. 1051-1064 - Kaniz Mishty, Mehdi Sadi:
System and Design Technology Co-Optimization of SOT-MRAM for High-Performance AI Accelerator Memory System. 1065-1078 - Luca Sterpone, Sarah Azimi, Corrado De Sio:
CNN-Oriented Placement Algorithm for High-Performance Accelerators on Rad-Hard FPGAs. 1079-1092 - Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu:
Semi-Tensor Product-Based Exact Synthesis for Logic Rewriting. 1093-1106 - Jinming Zhang, Xi Fan, Yaoyao Ye, Xuyan Wang, Guojie Xiong, Xianglun Leng, Ningyi Xu, Yong Lian, Guanghui He:
INDM: Chiplet-Based Interconnect Network and Dataflow Mapping for DNN Accelerators. 1107-1120 - João Batista Pereira Matos Jr., Eddie B. de Lima Filho, Iury Bessa, Edoardo Manino, Xidan Song, Lucas C. Cordeiro:
Counterexample Guided Neural Network Quantization Refinement. 1121-1134 - Li Lu, Junchao Chen, Markus Ulbricht, Milos Krstic:
Toward Critical Flip-Flop Identification for Soft-Error Tolerance With Graph Neural Networks. 1135-1148 - Chandramouli N. Amarnath, Mohamed Mejri, Kwondo Ma, Abhijit Chatterjee:
Error Resilience in Deep Neural Networks Using Neuron Gradient Statistics. 1149-1162 - Chen Yin, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing:
DeltaGNN: Accelerating Graph Neural Networks on Dynamic Graphs With Delta Updating. 1163-1176 - Liqiang Lu, Zizhang Luo, Size Zheng, Jieming Yin, Jason Cong, Yun Liang, Jianwei Yin:
Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition. 1177-1190 - Xiaoyu Sun, Weidong Cao, Brian Crafton, Kerem Akarvardar, Haruki Mori, Hidehiro Fujiwara, Hiroki Noguchi, Yu-Der Chih, Meng-Fan Chang, Yih Wang, Tsung-Yung Jonathan Chang:
Efficient Processing of MLPerf Mobile Workloads Using Digital Compute-In-Memory Macros. 1191-1205 - Lihao Liu, Fan Yang, Li Shang, Xuan Zeng:
GNN-Cap: Chip-Scale Interconnect Capacitance Extraction Using Graph Neural Network. 1206-1217 - Suhyeong Choi, Jinwook Jung, Andrew B. Kahng, Minsoo Kim, Chul-Hong Park, Bodhisatta Pramanik, Dooseok Yoon:
PROBE3.0: A Systematic Framework for Design-Technology Pathfinding With Improved Design Enablement. 1218-1231 - Ismail Bustany, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang:
K-SpecPart: Supervised Embedding Algorithms and Cut Overlay for Improved Hypergraph Partitioning. 1232-1245 - Xinmiao Zhang, Cheng Liu, Jiacheng Ni, Yuanqing Cheng, Lei Zhang, Huawei Li, Xiaowei Li:
PDG: A Prefetcher for Dynamic Graph Updating. 1246-1259 - Hayoung Lee, Sooryeong Lee, Sungho Kang:
A New Fail Address Memory Architecture for Cost-Effective ATE. 1260-1273 - Zahra Ramezani, Alexandre Donzé, Martin Fabian, Knut Åkesson:
On Input Generators for Cyber-Physical Systems Falsification. 1274-1287 - Hongfei Wang, Ziqiang Zhang, Hongcan Xiong, Dongmian Zou, Yu Chen, Hai Jin:
GRAND: A Graph Neural Network Framework for Improved Diagnosis. 1288-1301 - Irith Pomeranz:
Test Insertion for Dynamic Test Compaction. 1302-1306 - Jasmin Kaur, Alvaro Cintas Canto, Mehran Mozaffari Kermani, Reza Azarderakhsh:
Hardware Constructions for Error Detection in WG-29 Stream Cipher Benchmarked on FPGA. 1307-1311 - Binhao Bao, Qianhui Li, Wu Guan, Qi Wang, Liping Liang, Xin Qiu:
Adaptive Granularity Progressive LDPC Decoding for NAND Flash Memory. 1312-1316
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