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"Design of Reliable SoCs With BIST Hardware and Machine Learning."
Mehdi Sadi et al. (2017)
- Mehdi Sadi
, Gustavo K. Contreras, Jifeng Chen, LeRoy Winemberg, Mark M. Tehranipoor:
Design of Reliable SoCs With BIST Hardware and Machine Learning. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3237-3250 (2017)
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