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ORCIDISCAS 2017: Baltimore, MD, USA
- IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. IEEE 2017, ISBN 978-1-4673-6853-7
- Jeffrey Abbott, Tianyang Ye, Ling Qin, Marsela Jorgolli, Rona Gertner, Donhee Ham, Hongkun Park
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CMOS-nano-bio interface array for cardiac and neuro technology. 1 - Jonas Handwerker, Marlon Perez-Rodas, Maurits Ortmanns, Klaus Scheffler, Jens Anders:
Towards CMOS-based in-vivo NMR spectroscopy and microscopy. 1-4 - Mohammed Al-Rawhani, Boon Chong Cheah, Christos Giagkoulovits, Abdul Shakoor, Bence Nagy, James Beeley, David R. S. Cumming:
Wide-range optical CMOS-based diagnostics. 1-4 - Urs Frey, Marie Engelene J. Obien, Jan Mueller, Andreas Hierlemann:
Technology trends and commercialization of high-density microelectrode arrays for advanced in-vitro electrophysiology. 1 - Lorenz K. Müller, Manu V. Nair, Giacomo Indiveri:
Randomized unregulated step descent for limited precision synaptic elements. 1-4 - Charlotte Frenkel, Giacomo Indiveri, Jean-Didier Legat, David Bol:
A fully-synthesized 20-gate digital spike-based synapse with embedded online learning. 1-4 - Geoffrey W. Burr, Pritish Narayanan, Robert M. Shelby, Stefano Ambrogio, Hsinyu Tsai, Scott L. Lewis, Kohji Hosokawa:
Neuromorphic devices and architectures for next-generation cognitive computing. 1-4 - Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
RM3 based logic synthesis (Special session paper). 1-4 - Ari Paasio:
Local memory and logic arrangement for ultra-low power array processors. 1-4 - Raga Lasya Munagala, U. K. Vijay:
A novel 3-tap adaptive feed forward equalizer for high speed wireline receivers. 1-4 - Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang:
A 40 Gb/s 74.9 mW PAM4 receiver with novel clock and data recovery. 1-4 - Hugo Daniel Hernández, Dionisio Carvalho, Bruno Sanches, Lucas C. Severo, Wilhelmus A. M. Van Noije:
Current mode 1.2-Gbps SLVS transceiver for readout front-end ASIC. 1-4 - Michele Dei, Jordi Sacristán, Eloi Marigó, Mohanraj Soundara, Lluís Terés, Francisco Serra-Graells:
A 10-bit linearity current-controlled ring oscillator with rolling regulation for smart sensing. 1-4 - Meng Zhao, Zhongjian Chen, Zhaofeng Huang, Guangyi Chen, Wengao Lu, Yacong Zhang:
A low-noise fully-differential open-loop interface for high-G capacitive micro-accelerometers with 112.2 dB dynamic range. 1-4 - Wai Lee:
3D machine vision in IoT for factory and building automation (Invited). 1 - Prashant Dubey, Kritika Aditya, Ankur Srivastava, Amit Khanuja, Jamil Kawa, Thu Nguyen:
A 0.42V high bandwidth synthesizable parallel access smart memory fabric for computer vision. 1-4 - Rashedul Hasan, Shahed K. Mohammed, Alimul Haque Khan, Khan A. Wahid:
A color frame reproduction technique for IoT-based video surveillance application. 1-4 - Shih-Ting Lin, Yuan-Hsin Liao, Yu Tsao, Shao-Yi Chien:
Object-based on-line video summarization for internet of video things. 1-4 - Satyajit Das, Davide Rossi, Kevin J. M. Martin, Philippe Coussy, Luca Benini:
A 142MOPS/mW integrated programmable array accelerator for smart visual processing. 1-4 - Chandrajit Pal, Dwaipayan Biswas, Koushik Maharatna, Amlan Chakrabarti:
Architecture for complex network measures of brain connectivity. 1-4 - Amirhossein Esmaili Dastjerdi, Mohammad Kachuee, Mahdi Shabany:
Non-invasive blood pressure estimation using phonocardiogram. 1-4 - Oscar Barajas, Amir Tofighi Zavareh, Sebastian Hoyos:
Towards an on-chip signal processing solution for the online calibration of SS-OCT systems. 1-4 - Dongyun Lin, Zhiping Lin, Ramraj Velmurugan, Raimund J. Ober:
Automatic endosomal structure detection and localization in fluorescence microscopic images. 1-4 - Dongyun Lin, Zhiping Lin, Lei Sun, Kar-Ann Toh, Jiuwen Cao:
LLC encoded BoW features and softmax regression for microscopic image classification. 1-4 - Yongzhen Chen, Jingjing Wang, Hang Hu, Fan Ye, Junyan Ren:
A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier. 1-4 - Sen Tao, Naveen Verma, Ryan M. Corey, Andrew C. Singer:
A 10-b statistical ADC employing pipelining and sub-ranging in 32nm CMOS. 1-4 - Alexandre Mas, Eric Andre, Caroline Lelandais-Perrault, Filipe Vinci dos Santos, Philippe Bénabès:
Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology. 1-4 - Adrian Leuciuc:
Sampling time calibration method for multi-channel interleaved ADCs. 1-4 - Saqib Mohamad, Chao Wu, Jie Yuan, Amine Bermak:
A power minimized 74 fJ/conversion-step 88.6 dB SNR incremental ΣΔ ADC with an asynchronous SAR quantizer. 1-4 - Faizan Ul Haq, Mikko Englund, Kari Stadius, Marko Kosunen, Jussi Ryynänen, Kimmo Koli, Kim B. Ostman:
A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching. 1-4 - Ching-Da Wu, Jian-Yu Hsieh, Chun-Han Wu, Yang-Sheng Cheng, Chun-Chang Wu, Shey-Shi Lu:
An 1.1 V 0.1-1.6 GHz tunable-bandwidth elliptic filter with 6 dB linearity improvement by precise zero location control in 40 nm CMOS technology for 5G applications. 1-4 - Ryo Shirai, Jin Kono, Tetsuya Hirose, Masanori Hashimoto:
Near-field dual-use antenna for magnetic-field based communication and electrical-field based distance sensing in mm3-class sensor node. 1-4 - Oscar Castañeda, Tom Goldstein, Christoph Studer:
FPGA design of low-complexity joint channel estimation and data detection for large SIMO wireless systems. 1-4 - Jinbo Li, Qun Jane Gu:
A low-noise cartesian error feedback architecture. 1-4 - Md Farhadur Reza, Dan Zhao, Magdy A. Bayoumi:
Dark silicon-power-thermal aware runtime mapping and configuration in heterogeneous many-core NoC. 1-4 - Setareh Behroozi, Iraklis Anagnostopoulos:
Application resource management for exploitation of non-volatile memory in many-core systems. 1-4 - Luciano L. Caimi, Vinicius Fochi, Eduardo Wächter, Daniel Munhoz, Fernando Gehm Moraes:
Activation of secure zones in many-core systems with dynamic rerouting. 1-4 - Marcelo Ruaro, Fernando Gehm Moraes:
Demystifying the cost of task migration in distributed memory many-core systems. 1-4 - Rongdi Sun, Peilin Liu, Jun Wang, Zunquan Zhou:
A low latency feature extraction accelerator with reduced internal memory. 1-4 - Pavel Arnaudov, Tokunbo Ogunfunmi:
A CAM enabled fast video motion estimation based on locality sensitive signatures. 1-4 - Falei Luo, Shanshe Wang, Siwei Ma, Nan Zhang, Yun Zhou, Wen Gao:
Fast intra coding unit size decision for HEVC with GPU based keypoint detection. 1-4 - Tsz-Kwan Lee, Yui-Lam Chan, Wan-Chi Siu:
Depth-projected determination for adaptive search range in motion estimation for HEVC. 1-4 - Jian-Bin Zhou, Dajiang Zhou, Li Guo, Takeshi Yoshimura, Satoshi Goto:
Measurement-domain intra prediction framework for compressively sensed images. 1-4 - Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita:
A low-cost approximate 32-point transform architecture. 1-4 - Lucia Seminara, Marta Franceschi, Luigi Pinna, Ali Ibrahim, Maurizio Valle, Strahinja Dosen, Dario Farina:
Electronic skin and electrocutaneous stimulation to restore the sense of touch in hand prosthetics. 1-4 - Hua Fan, Hadi Heidari, Franco Maloberti, Dagang Li, Daqian Hu, Yuanjun Cen:
High resolution and linearity enhanced SAR ADC for wearable sensing systems. 1-4 - Pinar Basak Basyurt, Edoardo Bonizzoni, Franco Maloberti, Devrim Yilmaz Aksin:
A low-power low-noise CMOS voltage reference with improved PSR for wearable sensor systems. 1-4 - Tiffany Moy, Warren Rieutort-Louis, Liechao Huang, Sigurd Wagner, James C. Sturm, Naveen Verma:
Information-processing-driven interfaces in hybrid large-area electronics systems. 1-4 - W. Kenneth Jenkins, Michael A. Soderstrand:
A historical overview of Dr. Sanjit Mitra's academic, research and professional activities. 1-4 - Jayanta Mukhopadhyay:
Filtering and enhancement of color images in the block DCT domain. 1-4 - Phillip A. Regalia:
On secure communications without eavesdropper channel state. 1-4 - Yujia Wang, Truong Nguyen:
Photonic allpass filter: A versatile building block for all-optical signal processing. 1-4 - Bruno U. Pedroni, Sadique Sheik, Gert Cauwenberghs:
Pipelined parallel contrastive divergence for continuous generative model learning. 1-4 - Shouyi Yin, Dajiang Liu, Lifeng Sun, Leibo Liu, Shaojun Wei:
DFGNet: Mapping dataflow graph onto CGRA by a deep learning approach. 1-4 - Chang Shu, Hongsheng Liu, Fanruo Meng:
Optimizing deep neural network structure for face recognition. 1-4 - Alfredo Canziani, Eugenio Culurciello, Adam Paszke:
Evaluation of neural network architectures for embedded systems. 1-4 - Danielle Griffith, Per Torstein Røine, Torjus Kallerud, Brian Goodlin, Zachary Hughes, Ernest Ting-Ta Yen:
A ±10ppm -40 to 125°C BAW-based frequency reference system for crystal-less wireless sensor nodes. 1-4 - David E. Bellasi, Philipp Schönle, Qiuting Huang, Luca Benini:
A wide tuning-range ADFLL for mW-SoCs with dithering-enhanced accuracy in 65 nm CMOS. 1-4 - Tuan Minh Vo, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A novel segmentation scheme for DTC-based ΔΣ fractional-N PLL. 1-4 - Seung-Hun Shin, Pil-Ho Lee, Jin-Woo Park, Yu-Jeong Hwang, Young-Chan Jang:
0.5 kHz-32 MHz digital fractional-N frequency synthesizer with burst-frequency switch. 1-4 - Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 0.9V-VDD sub-nW resistor-less duty-cycled CMOS voltage reference in 65nm for IoT. 1-4 - Ruocheng Wang, Wengao Lu, Yuze Niu, Zhaokai Liu, Meng Zhao, Yacong Zhang, Zhongjian Chen:
A2.1-ppm/°C current-mode CMOS bandgap reference with piecewise curvature compensation. 1-4 - David Cordova, Arthur Campos de Oliveira, Pedro Toledo, Hamilton Klimach, Sergio Bampi, Eric E. Fabris:
A sub-1 V, nanopower, ZTC based zero-VT temperature-compensated current reference. 1-4 - Alex Dilello, Steven Andryzcik, Brandon M. Kelly, Brandon Rumberg, David W. Graham:
Temperature compensation of floating-gate transistors in field-programmable analog arrays. 1-4 - Uldric A. Antao, John Choma Ming Hsieh, Theodore W. Berger:
A 9-nW on-chip constant subthreshold CMOS transconductance bias with fine-tuning. 1-4 - David G. Stork, Thomas Vogelsang, James Tringali, Patrick R. Gill, Mark Kellam, Evan Erickson:
Reducing electrical power dissipation in computational imaging systems through special-purpose optics. 1-4 - Dean Scribner, Thomas Petty, Peter Mui:
Neuromorphic readout integrated circuits and related spike-based image processing. 1-4 - Charbel G. Rizk, Francisco Tejada, John Hughes, David Barbehenn, Philippe O. Pouliquen, Andreas G. Andreou:
Characterization of RTN noise in the analog front-end of digital pixel imagers. 1-4 - Min Liu, Tobi Delbrück:
Block-matching optical flow for dynamic vision sensors: Algorithm and FPGA implementation. 1-4 - Anup Mohan, Kent Gauen, Yung-Hsiang Lu, Wei Wayne Li, Xuemin Chen:
Internet of video things in 2030: A world with many cameras. 1-4 - Shao-Wen Yang, Omesh Tickoo, Yen-Kuang Chen:
A framework for visual fog computing. 1-4 - Ioannis Galanis, Daniel Olsen, Iraklis Anagnostopoulos:
A multi-agent based system for run-time distributed resource management. 1-4 - Yueh-Ying Lee, Pin-Hung Kuo, Chia-Han Lee, Yen-Kuang Chen, Shao-Yi Chien:
Distributed video codec with spatiotemporal side information. 1-4 - Pascal Alexander Hager, Christoph Risser, Peter-Karl Weber, Luca Benini:
LightProbe: A 64-channel programmable ultrasound transducer head with an integrated front-end and a 26.4 Gb/s optical link. 1-4 - Yu-Jin Lin, Shuenn-Yuh Lee:
A microstimulator with parameter adjustment for bladder dysfunction. 1-4 - Hossein Zamani, Hamid Bahrami, Paul A. Garris, Pedram Mohseni:
On the use of compressive sensing (CS) for brain dopamine recording with fast-scan cyclic voltammetry (FSCV). 1-4 - Evrim Acar, Yuri Levin-Schwartz, Vince D. Calhoun, Tülay Adali:
Tensor-based fusion of EEG and FMRI to understand neurological changes in schizophrenia. 1-4 - Xinyuan Ge, Tsz Ngai Lin, Jie Yuan:
A power-area-efficient impedance sensor design for 10 × 10 microelectrode array sensing. 1-4 - Chung-Wei Hsu, Li-Jen Chang, Chun-Po Huang, Soon-Jyh Chang:
A 12-bit 40-MS/s calibration-free SAR ADC. 1-4 - Quentin Sauve, Damien Favre, Gabriel Morin-Laporte, Mohammad Taherzadeh-Sani, Nicolas Constantin, Frederic Nabki:
A calibration-free 13-bit 0.9 V differential SAR-ADC with hybrid DAC and dithering. 1-4 - Armia Salib, Barry Cardiff, Mark F. Flanagan:
A low-complexity correlation-based time skew estimation technique for time-interleaved SAR ADCs. 1-4 - Kai-Ting Shr, Chieh-Yu Chen, Jin-Wei Jhang, Yuan-Hao Huang:
Power-aware space-time-trellis-coded MIMO detector with SNR estimation and state-purging. 1-4 - Shahriar Shahabuddin, Markku J. Juntti, Christoph Studer:
ADMM-based infinity norm detection for large MU-MIMO: Algorithm and VLSI architecture. 1-4 - Rakesh Gangarajaiah, Hemanth Prabhu, Ove Edfors, Liang Liu:
A Cholesky decomposition based massive MIMO uplink detector with adaptive interpolation. 1-4 - Chun-Hun Wu, Chin-Yi Liu, Pei-Yun Tsai:
Design of an SVD engine for 8×8 MIMO precoding systems. 1-4 - Shusen Jing, Junmei Yang, Zhongfeng Wang, Xiaohu You, Chuan Zhang:
Algorithm and architecture for joint detection and decoding for MIMO with LDPC codes. 1-4 - Sandhya Koteshwara, Amitabh Das, Keshab K. Parhi:
FPGA implementation and comparison of AES-GCM and Deoxys authenticated encryption schemes. 1-4 - Vinay Vashishtha, Manoj Vangala, Parv Sharma, Lawrence T. Clark:
Robust 7-nm SRAM design on a predictive PDK. 1-4 - Muluken Hailesellasie, Syed Rafay Hasan:
A fast FPGA-based deep convolutional neural network using pseudo parallel memories. 1-4 - Narasinga Rao Miniskar, Raj Narayana Gadde, Young-chul Rams Cho, Sukjin Kim:
Fast cycle-accurate compile based simulator for reconfigurable processor. 1-4 - Sandhya Koteshwara, Chris H. Kim, Keshab K. Parhi:
Hierarchical functional obfuscation of integratec circuits using a mode-based approach. 1-4 - Caoyang Jiang, Saeid Nooshabadi:
H.265/HEVC encoder optimization with parallel-efficient algorithm and QP-based early termination. 1-4 - Li Hu, Jiawei Gu, Guanghui He, Weifeng He:
A hardware-friendly hierarchical HEVC motion estimation algorithm for UHD applications. 1-4 - Vili Viitamäki, Panu Sjovall, Jarno Vanne, Timo D. Hämäläinen:
High-level synthesized 2-D IDCT/IDST implementation for HEVC codecs on FPGA. 1-4 - Qing Zhang, Lu Yu:
A higher order transform domain filter exploiting non-local spatial correlation for video coding. 1-4 - Moaaz Ahmed, Farid Boussaïd, Amine Bermak:
An ultra low-power capacitively-coupled chopper instrumentation amplifier for wheatstone-bridge readout circuits. 1-4 - Moo Sung Chae, Tom Wilson, Eric Naviasky:
Multi-standard low-power DDR I/O circuit design in 7nm CMOS process. 1-4 - Sebastian Nessler, Maximilian Marx, Yiannos Manoli:
A self-test on wafer level for a MEM gyroscope readout based on ΔΣ modulation. 1-4 - Yuming Zhuang, Degang Chen:
Accurate spectral testing of the signals with amplitude drift. 1-4 - Sihwan Kim, Sahil Shah, Jennifer Hasler:
Floating-gate FPAA calibration for analog system design and built-in self test. 1-4 - Henrique S. Malvar:
Tidbits on tunable analog filters and image demosaicing. 1-4 - Antonio Petraglia, Mariane R. Petraglia, Manoel C. A. Perez:
Second-order analog filter sections with independently tunable center frequency and bandwidth. 1-4 - Alessandro Neri, Federica Battisti, Federico Colangelo, Marco Carli:
Unsupervised video orchestration based on aesthetic features. 1-4 - Jacques Szczupak, Leontina Pinto, Gabriel Torres:
Signal processing and climate understanding. 1-4 - Anamitra Makur:
Tunable FIR digital filters using FIR approximation of spectral transformation. 1-4 - Bryan P. Dawson, Jamie K. Infantolino, Manuel M. Vindiola, John V. Monaco:
Tightly integrated deep learning and symbolic programming on a single neuromorphic chip. 1-4 - Amr Suleiman, Yu-Hsin Chen, Joel S. Emer, Vivienne Sze:
Towards closing the energy gap between HOG and CNN features for embedded vision (Invited paper). 1-4 - Adwaya Kulkarni, Tahmid Abtahi, Colin Shea, Amey M. Kulkarni, Tinoosh Mohsenin:
PACENet: Energy efficient acceleration for convolutional network on embedded platform. 1-4 - Bita Darvish Rouhani, Azalia Mirhoseini, Farinaz Koushanfar:
TinyDL: Just-in-time deep learning solution for constrained embedded systems. 1-4 - Yufei Ma, Minkyu Kim, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo:
End-to-end scalable FPGA accelerator for deep residual networks. 1-4 - Gabriel Gagnon-Turcotte, Leonard L. Gagnon, Guillaume Bilodeau, Benoit Gosselin:
Wireless brain computer interfaces enabling synchronized optogenetics and electrophysiology. 1-4 - Ali Jafari, Sunil Gandhi, Sri Harsha Konuru, W. David Hairston, Tim Oates, Tinoosh Mohsenin:
An EEG artifact identification embedded system using ICA and multi-instance learning. 1-4 - Michael W. Nonte, Joseph K. Conroy, Peter Gadfort, William D. Hairston:
Online adaptive data acquisition enabling ultra-low power real-world EEG. 1-4 - Siddharth Kohli, Alexander J. Casson:
Towards signal processing assisted hardware for continuous in-band electrode impedance monitoring (Invited paper). 1-4 - Hiroki Asano, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa:
An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications. 1-4 - Jianfu Lin, Hanjun Jiang, Baoyong Chi:
A 5-bit phase-interpolator-based fractional-N frequency divider for digital phase-locked loops. 1-4