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ORCIDSwarup Bhunia
Person information
- affiliation: University of Florida, Gainesville, Department of Electrical and Computer Engineering
- affiliation: Case Western Reserve University, Cleveland, Department of Electrical Engineering and Computer Science
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2020 – today
- 2025
[j143]Junjun Huan
, Vida Pashaei, Steve J. A. Majerus, Swarup Bhunia, Soumyajit Mandal:
A Wearable Dual-Mode Probe for Image-Guided Closed-Loop Ultrasound Neuromodulation. IEEE Trans. Biomed. Circuits Syst. 19(2): 357-373 (2025)- [j142]Peyman Dehghanzadeh, Ovishake Sen, Baibhab Chatterjee, Swarup Bhunia:
LUNA-CiM: A Programmable Compute-in-Memory Fabric for Neural Network Acceleration. IEEE Trans. Computers 74(4): 1348-1361 (2025) - [j141]Peyman Dehghanzadeh, Soumyajit Mandal, Swarup Bhunia:
MBM PUF: A Multi-Bit Memory-Based Physical Unclonable Function. IEEE Trans. Circuits Syst. I Regul. Pap. 72(5): 2114-2127 (2025) - [j140]Tanzim Mahfuz, Swarup Bhunia, Prabuddha Chakraborty:
X-DFS: Explainable Artificial Intelligence Guided Design-for-Security Solution Space Exploration. IEEE Trans. Inf. Forensics Secur. 20: 753-766 (2025) - [i27]Aritra Dasgupta, Sudipta Paria, Christopher Sozio, Andrew Lukefahr, Swarup Bhunia:
Library-Attack: Reverse Engineering Approach for Evaluating Hardware IP Protection. CoRR abs/2501.12292 (2025) - [i26]Tanzim Mahfuz, Pravin Gaikwad, Tasneem Suha, Swarup Bhunia, Prabuddha Chakraborty:
SALTY: Explainable Artificial Intelligence Guided Structural Analysis for Hardware Trojan Detection. CoRR abs/2502.14116 (2025) - [i25]Habibur Rahaman, Atri Chatterjee, Swarup Bhunia:
Runtime Detection of Adversarial Attacks in AI Accelerators Using Performance Counters. CoRR abs/2503.07568 (2025) - [i24]Aritra Dasgupta, Sudipta Paria, Swarup Bhunia:
HIPR: Hardware IP Protection through Low-Overhead Fine-Grain Redaction. IACR Cryptol. ePrint Arch. 2025: 553 (2025) - 2024
- [j139]Junjun Huan, Shubhra Deb Paul, Soumyajit Mandal, Swarup Bhunia:
PRISTINE: An Emulation Platform for PCB-Level Hardware Trojans. IEEE Access 12: 49291-49305 (2024) - [j138]Kelsey L. Horace-Herron, Naren Vikram Raj Masna, Swarup Bhunia, Soumyajit Mandal, Sandip Ray:
Nuclear Quadrupole Resonance for Substance Detection. IEEE Access 12: 111709-111722 (2024) - [j137]Reiner N. Dizon-Paradis, Rohan Reddy Kalavakonda, Prabuddha Chakraborty, Swarup Bhunia:
Pasteables: A Flexible and Smart "Stick-and-Peel" Wearable Platform for Fitness and Athletics. IEEE Consumer Electron. Mag. 13(6): 17-27 (2024) - [j136]Prabuddha Chakraborty, Jonathan Cruz, Rasheed Almawzan, Tanzim Mahfuz, Swarup Bhunia:
Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking. IEEE Des. Test 41(2): 7-14 (2024) - [j135]Shivam Bhasin, Anupam Chattopadhyay, Tim Güneysu, Swarup Bhunia:
Special Issue on Postquantum Cryptography for Internet of Things. IEEE Des. Test 41(5): 5-6 (2024) - [j134]Anupam Chattopadhyay, Shivam Bhasin, Tim Güneysu, Swarup Bhunia:
Quantum-Safe Internet of Things. IEEE Des. Test 41(5): 36-45 (2024) - [j133]Sudipta Paria, Aritra Dasgupta, Swarup Bhunia:
SPELL: An End-to-End Tool Flow for LLM-Guided Secure SoC Design for Embedded Systems. IEEE Embed. Syst. Lett. 16(4): 365-368 (2024) - [j132]Prabuddha Chakraborty, Swarup Bhunia:
A Self-Aware Digital Memory Framework Powered by Artificial Intelligence. IEEE Trans. Artif. Intell. 5(7): 3579-3594 (2024) - [j131]Rajat Sadhukhan, Sayandeep Saha, Sudipta Paria, Swarup Bhunia, Debdeep Mukhopadhyay:
VALIANT: An EDA Flow for Side-Channel Leakage Evaluation and Tailored Protection. IEEE Trans. Computers 73(2): 436-450 (2024) - [j130]Shubhra Deb Paul, Aritra Dasgupta, Swarup Bhunia:
FDPUF: Frequency-Domain PUF for Robust Authentication of Edge Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 3479-3490 (2024) - [j129]Md. Moshiur Rahman, Jim Geist, Daniel Xing, Yuntao Liu, Ankur Srivastava, Travis Meade, Yier Jin, Swarup Bhunia:
Security Evaluation of State Space Obfuscation of Hardware IP through a Red Team-Blue Team Practice. ACM Trans. Design Autom. Electr. Syst. 29(3): 50:1-50:18 (2024) - [j128]Md. Moshiur Rahman, Swarup Bhunia:
Practical Implementation of Robust State-Space Obfuscation for Hardware IP Protection. IEEE Trans. Very Large Scale Integr. Syst. 32(2): 333-346 (2024) - [j127]Christopher Vega, Patanjali SLPSK, Swarup Bhunia:
IOLock: An Input/Output Locking Scheme for Protection Against Reverse Engineering Attacks. IEEE Trans. Very Large Scale Integr. Syst. 32(2): 347-360 (2024) - [c200]Sudipta Paria, Pravin Gaikwad, Aritra Dasgupta, Swarup Bhunia:
LATENT: Leveraging Automated Test Pattern Generation for Hardware Trojan Detection. ATS 2024: 1-6 - [c199]Habibur Rahaman, Atri Chatterjee, Swarup Bhunia:
SAMURAI: A Framework for Safeguarding Against Malicious Usage and Resilience of AI. ATS 2024: 1-6 - [c198]Habibur Rahaman, Atri Chatterjee, Swarup Bhunia:
Secure AI Systems: Emerging Threats and Defense Mechanisms. ATS 2024: 1-6 - [c197]Deepanshu Trivedi, Junjun Huan, Arjuna Madanayake, Swarup Bhunia, Soumyajit Mandal:
Compressed Plane-Wave Compounding for Efficient Imaging on Portable Ultrasound Devices. BioCAS 2024: 1-5 - [c196]Sudipta Paria, Aritra Dasgupta, Swarup Bhunia:
Navigating SoC Security Landscape on LLM-Guided Paths. ACM Great Lakes Symposium on VLSI 2024: 252-257 - [c195]Rasheed Almawzan, Atri Chatterjee, Aritra Dasgupta, Swarup Bhunia:
LISA: A Multi-Layered Iterative Framework for Hardening Obfuscation with Modular Unit Transformations. ACM Great Lakes Symposium on VLSI 2024: 588-591 - [c194]Sudipta Paria, Aritra Dasgupta, Swarup Bhunia:
DiSPEL: A Framework for SoC Security Policy Synthesis and Distributed Enforcement. HOST 2024: 271-281 - [c193]Kshitij Raj, Aritra Bhattacharyay, Swarup Bhunia, Sandip Ray:
Trimming The Fat: A Minimum-Security Architecture for Protecting SoC Designs Against Supply Chain Threats. ISQED 2024: 1 - [c192]Prabuddha Chakraborty, Swarup Bhunia:
An Intelligent Memory Framework for Resource Constrained IoT Systems. ISVLSI 2024: 296-299 - [c191]Aritra Dasgupta, Sudipta Paria, Prabuddha Chakraborty, Swarup Bhunia:
Splitting the Secrets: A Cooperative Trust Model for System-on-Chip Designs with Untrusted IPs. ISVLSI 2024: 325-330 - [c190]Rasheed Almawzan, Sudipta Paria, Aritra Dasgupta, Kostas Amberiadis, Swarup Bhunia:
IP Security in Structured ASIC: Challenges and Prospects. ISVLSI 2024: 397-402 - [c189]Reiner N. Dizon-Paradis, Aritra Dasgupta, Rohan Reddy Kalavakonda, Swarup Bhunia:
Pasteables: A Flexible, Stick-and-Peel Smart Sensing Platform for Edge Applications. ISVLSI 2024: 539-543 - [i23]Rohan Reddy Kalavakonda, Junjun Huan, Peyman Dehghanzadeh, Archit Jaiswal, Soumyajit Mandal, Swarup Bhunia:
Fusion Intelligence: Confluence of Natural and Artificial Intelligence for Enhanced Problem-Solving Efficiency. CoRR abs/2405.09763 (2024) - [i22]Ovishake Sen, Chukwufumnanya Ogbogu, Peyman Dehghanzadeh, Janardhan Rao Doppa, Swarup Bhunia, Partha Pratim Pande, Baibhab Chatterjee:
Scalable and Programmable Look-Up Table based Neural Acceleration (LUT-NA) for Extreme Energy Efficiency. CoRR abs/2406.05282 (2024) - [i21]Tanzim Mahfuz, Swarup Bhunia, Prabuddha Chakraborty:
X-DFS: Explainable Artificial Intelligence Guided Design-for-Security Solution Space Exploration. CoRR abs/2411.07308 (2024) - 2023
- [j126]Junjun Huan, Peyman Dehghanzadeh, Soumyajit Mandal, Swarup Bhunia:
Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis. IEEE Access 11: 80588-80599 (2023) - [j125]Peyman Dehghanzadeh, Junjun Huan, Rohan Reddy Kalavakonda, Soumyajit Mandal, Swarup Bhunia:
On-Chip Batteries as Distributed Energy Sources in Heterogeneous 2.5D/3D Integrated Circuits. IEEE Access 11: 89896-89906 (2023) - [j124]Prabuddha Chakraborty, Reiner N. Dizon-Paradis, Swarup Bhunia:
SAVIOR: A Sustainable Network of Vehicles with Near-Perpetual Mobility. IEEE Internet Things Mag. 6(2): 108-114 (2023) - [j123]Pravin Gaikwad, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
Hardware IP Assurance against Trojan Attacks with Machine Learning and Post-processing. ACM J. Emerg. Technol. Comput. Syst. 19(3): 25:1-25:23 (2023) - [j122]Shubhra Deb Paul, Swarup Bhunia:
CurIAs: Current-Based IC Authentication by Exploiting Supply Current Variations. IEEE Trans. Computers 72(2): 466-479 (2023) - [j121]Patanjali SLPSK, Abhishek Anil Nair, Chester Rebeiro, Swarup Bhunia:
SIGNED: A Challenge-Response Scheme for Electronic Hardware Watermarking. IEEE Trans. Computers 72(6): 1763-1777 (2023) - [j120]Patanjali SLPSK, Sandip Ray, Swarup Bhunia:
TREEHOUSE: A Secure Asset Management Infrastructure for Protecting 3DIC Designs. IEEE Trans. Computers 72(8): 2306-2320 (2023) - [j119]Jonathan Cruz, Christopher Posada, Naren Vikram Raj Masna, Prabuddha Chakraborty, Pravin Gaikwad, Swarup Bhunia:
A Framework for Automated Exploration of Trojan Attack Space in FPGA Netlists. IEEE Trans. Computers 72(10): 2740-2751 (2023) - [j118]Aritra Bhattacharyay, Shuo Yang, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
An Automated Framework for Board-Level Trojan Benchmarking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 397-410 (2023) - [j117]Jonathan Cruz, Patanjali SLPSK, Pravin Gaikwad, Swarup Bhunia:
TVF: A Metric for Quantifying Vulnerability Against Hardware Trojan Attacks. IEEE Trans. Very Large Scale Integr. Syst. 31(7): 969-979 (2023) - [c188]Krishnendu Guha, Amit Ranjan Trivedi, Swarup Bhunia:
Energy Efficient Memory-based Inference of LSTM by Exploiting FPGA Overlay. IJCNN 2023: 1-7 - [c187]Prabuddha Chakraborty, Tasneem Suha, Swarup Bhunia:
Hardware Specification Aware Timing Side Channel Security Analysis. SOCC 2023: 1-6 - [c186]Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi:
Unifying Intrinsically-Operated Physically Unclonable Function and Random Number Generation in Analog Circuits: A Case Study on Successive Approximation ADC. VLSID 2023: 75-80 - [c185]Jackson Fugate, Greg Stitt, Naren Vikram Raj Masna, Aritra Dasgupta, Swarup Bhunia, Nij Dorairaj, David Kehlet:
An Exploration of ATPG Methods for Redacted IP and Reconfigurable Hardware. VTS 2023: 1-7 - [e3]Jana Doppa, Swarup Bhunia:
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2023, Hamburg, Germany, September 17-22, 2023. ACM/IEEE 2023, ISBN 979-8-4007-0290-7 [contents] - [i20]Davide Giacomini, Maeesha Binte Hashem, Jeremiah Suarez, Swarup Bhunia, Amit Ranjan Trivedi:
Towards Model-Size Agnostic, Compute-Free, Memorization-based Inference of Deep Learning. CoRR abs/2307.07631 (2023) - [i19]Sudipta Paria, Swarup Bhunia:
DiSPEL: Distributed Security Policy Enforcement for Bus-based SoC. CoRR abs/2308.02792 (2023) - [i18]Sudipta Paria, Aritra Dasgupta, Swarup Bhunia:
DIVAS: An LLM-based End-to-End Framework for SoC Security Analysis and Policy-based Protection. CoRR abs/2308.06932 (2023) - [i17]Peyman Dehghanzadeh, Baibhab Chatterjee, Swarup Bhunia:
LUNA-CIM: Lookup Table based Programmable Neural Processing in Memory. CoRR abs/2311.10581 (2023) - 2022
- [j116]Junjun Huan, Nicholas Olexa, Brett Hochman, Swarup Bhunia, Rashmi Jha, Soumyajit Mandal:
Intrinsically Secure Non-Volatile Memory Using ReRAM Devices. IEEE Access 10: 104577-104588 (2022) - [j115]Prabuddha Chakraborty, Jonathan Cruz, Christopher Posada, Sandip Ray, Swarup Bhunia:
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption. IEEE Embed. Syst. Lett. 14(2): 71-74 (2022) - [j114]Prabuddha Chakraborty, Reiner N. Dizon-Paradis, Swarup Bhunia:
ARTS: A Framework for AI-Rooted IoT System Design Automation. IEEE Embed. Syst. Lett. 14(3): 151-154 (2022) - [j113]Shubhra Deb Paul, Fengchao Zhang, Patanjali SLPSK, Amit Ranjan Trivedi, Swarup Bhunia:
RIHANN: Remote IoT Hardware Authentication With Intrinsic Identifiers. IEEE Internet Things J. 9(24): 24615-24627 (2022) - [j112]Prabuddha Chakraborty, Swarup Bhunia:
BINGO: brain-inspired learning memory. Neural Comput. Appl. 34(4): 3223-3247 (2022) - [j111]Abdulrahman Alaql, Saranyu Chattopadhyay, Prabuddha Chakraborty, Tamzidul Hoque, Swarup Bhunia:
LeGO: A Learning-Guided Obfuscation Framework for Hardware IP Protection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 854-867 (2022) - [j110]Shuo Yang, Tamzidul Hoque, Prabuddha Chakraborty, Swarup Bhunia:
Golden-Free Hardware Trojan Detection Using Self-Referencing. IEEE Trans. Very Large Scale Integr. Syst. 30(3): 325-338 (2022) - [j109]Atul Prasad Deb Nath, Kshitij Raj, Swarup Bhunia, Sandip Ray:
SoCCom: Automated Synthesis of System-on-Chip Architectures. IEEE Trans. Very Large Scale Integr. Syst. 30(4): 449-462 (2022) - [j108]Mahmudul Hasan, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
Trojan Resilient Computing in COTS Processors Under Zero Trust. IEEE Trans. Very Large Scale Integr. Syst. 30(10): 1412-1424 (2022) - [c184]Ahish Shylendra, Priyesh Shukla, Swarup Bhunia, Amit Ranjan Trivedi:
Analog-Domain Time-Series Moment Extraction for Low Power Predictive Maintenance Analytics. AICAS 2022: 9-12 - [c183]Jonathan Cruz, Pravin Gaikwad, Swarup Bhunia:
Analysis of Hardware Trojan Resilience Enabled through Logic Locking. AsianHOST 2022: 1-6 - [c182]Jonathan Cruz, Pravin Gaikwad, Abhishek Anil Nair, Prabuddha Chakraborty, Swarup Bhunia:
A Machine Learning Based Automatic Hardware Trojan Attack Space Exploration and Benchmarking Framework. AsianHOST 2022: 1-6 - [c181]A. V. Lakshmy, Chester Rebeiro, Swarup Bhunia:
FORTIFY: Analytical Pre-Silicon Side-Channel Characterization of Digital Designs. ASP-DAC 2022: 660-665 - [c180]Aritra Bhattacharyay, Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia:
VIPR-PCB: a machine learning based golden-free PCB assurance framework. DAC 2022: 793-798 - [c179]Swarup Bhunia, Amitabh Das, Saverio Fazzari, Vivian Kammler, David Kehlet, Jeyavijayan Rajendran, Ankur Srivastava:
Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool. ICCAD 2022: 25:1-25:8 - [c178]Prabuddha Chakraborty, Swarup Bhunia:
AI-Driven Assurance of Hardware IP against Reverse Engineering Attacks. ITC 2022: 627-636 - [c177]Reiner N. Dizon-Paradis, Oliver Ferrigno, Ishamor Reid, Swarup Bhunia:
Light Pollution Monitoring Using A Modular IoT Sensor Platform. SmartIoT 2022: 28-35 - [c176]Abdulrahman Alaql, Aritra Dasgupta, Md. Moshiur Rahman, Swarup Bhunia:
SEVA: Structural Analysis based Security Evaluation of Sequential Locking. VLSID 2022: 126-131 - [p2]Pranesh Santikellur, Rajat Subhra Chakraborty, Swarup Bhunia:
Hardware IP Protection Using Register Transfer Level Locking and Obfuscation of Control and Data Flow. Behavioral Synthesis for Hardware Security 2022: 57-69 - [i16]Jonathan Cruz, Pravin Gaikwad, Abhishek Nair, Prabuddha Chakraborty, Swarup Bhunia:
Automatic Hardware Trojan Insertion using Machine Learning. CoRR abs/2204.08580 (2022) - 2021
- [j107]Rohan Reddy Kalavakonda, Naren Vikram Raj Masna, Anamika Bhuniaroy, Soumyajit Mandal, Swarup Bhunia:
A Smart Mask for Active Defense Against Coronaviruses and Other Airborne Pathogens. IEEE Consumer Electron. Mag. 10(2): 72-79 (2021) - [j106]Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia:
MAGIC: Machine-Learning-Guided Image Compression for Vision Applications in Internet of Things. IEEE Internet Things J. 8(9): 7303-7315 (2021) - [j105]Shubhra Deb Paul, Swarup Bhunia:
SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure. ACM J. Emerg. Technol. Comput. Syst. 17(3): 44:1-44:28 (2021) - [j104]Wei Hu, Chip-Hong Chang, Anirban Sengupta, Swarup Bhunia, Ryan Kastner, Hai Li:
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(6): 1010-1038 (2021) - [j103]Abdulrahman Alaql, Swarup Bhunia:
SARO: Scalable Attack-Resistant Logic Locking. IEEE Trans. Inf. Forensics Secur. 16: 3724-3739 (2021) - [j102]Prabuddha Chakraborty, Jonathan Cruz, Abdulrahman Alaql, Swarup Bhunia:
SAIL: Analyzing Structural Artifacts of Logic Locking Using Machine Learning. IEEE Trans. Inf. Forensics Secur. 16: 3828-3842 (2021) - [j101]Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
FaultDroid: An Algorithmic Approach for Fault-Induced Information Leakage Analysis. ACM Trans. Design Autom. Electr. Syst. 26(1): 2:1-2:27 (2021) - [j100]Fengchao Zhang, Shubhra Deb Paul, Patanjali SLPSK, Amit Ranjan Trivedi, Swarup Bhunia:
On Database-Free Authentication of Microelectronic Components. IEEE Trans. Very Large Scale Integr. Syst. 29(1): 149-161 (2021) - [j99]Abdulrahman Alaql, Md. Moshiur Rahman, Swarup Bhunia:
SCOPE: Synthesis-Based Constant Propagation Attack on Logic Locking. IEEE Trans. Very Large Scale Integr. Syst. 29(8): 1529-1542 (2021) - [c175]Kshitij Raj, Arrush Hegde, Atul Prasad Deb Nath, Swarup Bhunia, Sandip Ray:
SSEL: An Extensible Specification Language for SoC Security. AsianHOST 2021: 1-6 - [c174]Sandip Ray, Atul Prasad Deb Nath, Kshitij Raj, Swarup Bhunia:
CASTLE: Architecting Assured System-on-Chip Firmware Integrity. DATE 2021: 1781-1786 - [c173]Sandip Ray, Atul Prasad Deb Nath, Kshitij Raj, Swarup Bhunia:
The Curious Case of Trusted IC Provisioning in Untrusted Testing Facilities. ACM Great Lakes Symposium on VLSI 2021: 207-212 - [c172]Shuo Yang, Prabuddha Chakraborty, Patanjali SLPSK, Swarup Bhunia:
Trusted Electronic Systems with Untrusted COTS. ISQED 2021: 198-203 - [c171]Abdulrahman Alaql, Xinmu Wang, Md. Moshiur Rahman, Swarup Bhunia:
SOMA: Security Evaluation of Obfuscation Methods via Attack Sequencing. ISQED 2021: 381-386 - [c170]Naren Vikram Raj Masna, Rohan Reddy Kalavakonda, Reiner Dizon, Swarup Bhunia:
Smart and Connected Mask for Protection beyond the Pandemic : (Invited Paper). MWSCAS 2021: 676-679 - [i15]Prabuddha Chakraborty, Swarup Bhunia:
Neural Storage: A New Paradigm of Elastic Memory. CoRR abs/2101.02729 (2021) - [i14]Pravin Gaikwad, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
Third-Party Hardware IP Assurance against Trojans through Supervised Learning and Post-processing. CoRR abs/2111.14956 (2021) - [i13]Mahmudul Hasan, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
Software Variants for Hardware Trojan Detection and Resilience in COTS Processors. CoRR abs/2112.00304 (2021) - 2020
- [j98]Tamzidul Hoque, Patanjali SLPSK, Swarup Bhunia:
Trust Issues in Microelectronics: The Concerns and the Countermeasures. IEEE Consumer Electron. Mag. 9(6): 72-83 (2020) - [j97]Tamzidul Hoque, Rajat Subhra Chakraborty, Swarup Bhunia:
Hardware Obfuscation and Logic Locking: A Tutorial Introduction. IEEE Des. Test 37(3): 59-77 (2020) - [j96]Hai Helen Li, Wei Zhang, Swarup Bhunia, Wujie Wen:
Introduction to the Special Issue on New Trends in Nanoelectronic Device, Circuit, and Architecture Design, Part 1. ACM J. Emerg. Technol. Comput. Syst. 16(3): 24:1-24:3 (2020) - [j95]Wei Zhang, Hai Helen Li, Wujie Wen, Swarup Bhunia:
Guest Editorial: ACM JETC Special Issue on New Trends in Nanolectronic Device, Circuit, and Architecture Design: Part 2. ACM J. Emerg. Technol. Comput. Syst. 16(4): 35:1-35:3 (2020) - [j94]Xinmu Wang, Tamzidul Hoque, Abhishek Basak, Robert Karam, Wei Hu, Maoyuan Qin, Dejun Mu, Swarup Bhunia:
Hardware Trojan Attack in Embedded Memory. ACM J. Emerg. Technol. Comput. Syst. 17(1): 1-28 (2020) - [j93]Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4): 752-765 (2020) - [j92]Keerthi K., Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
FEDS: Comprehensive Fault Attack Exploitability Detection for Software Implementations of Block Ciphers. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(2): 272-299 (2020) - [j91]Atul Prasad Deb Nath, Srivalli Boddupalli, Swarup Bhunia, Sandip Ray:
Resilient System-on-Chip Designs With NoC Fabrics. IEEE Trans. Inf. Forensics Secur. 15: 2808-2823 (2020) - [j90]Tamzidul Hoque, Kai Yang, Robert Karam, Shahin Tajik, Domenic Forte, Mark M. Tehranipoor, Swarup Bhunia:
Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks. ACM Trans. Design Autom. Electr. Syst. 25(1): 4:1-4:32 (2020) - [j89]Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, Swarup Bhunia, Amit Ranjan Trivedi:
Low Power Unsupervised Anomaly Detection by Nonparametric Modeling of Sensor Statistics. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1833-1843 (2020) - [c169]Milind Srivastava, Patanjali SLPSK, Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
SOLOMON: An Automated Framework for Detecting Fault Attack Vulnerabilities in Hardware. DATE 2020: 310-313 - [c168]Tamzidul Hoque, Patanjali SLPSK, Swarup Bhunia:
Trust Issues in COTS: The Challenges and Emerging Solution. ACM Great Lakes Symposium on VLSI 2020: 211-216 - [c167]Ahish Shylendra, Priyesh Shukla, Swarup Bhunia, Amit Ranjan Trivedi:
Fault Attack Detection in AES by Monitoring Power Side-Channel Statistics. ISQED 2020: 219-224 - [c166]Prabuddha Chakraborty, Robert Parker, Tamzidul Hoque, Jonathan Cruz, Swarup Bhunia:
P2C2: Peer-to-Peer Car Charging. VTC Spring 2020: 1-5 - [i12]Ahish Shylendra, Priyesh Shukla, Saibal Mukhopadhyay, Swarup Bhunia, Amit Ranjan Trivedi:
Low Power Unsupervised Anomaly Detection by Non-Parametric Modeling of Sensor Statistics. CoRR abs/2003.10088 (2020) - [i11]Tamzidul Hoque, Shuo Yang, Aritra Bhattacharyay, Jonathan Cruz, Swarup Bhunia:
An Automated Framework for Board-level Trojan Benchmarking. CoRR abs/2003.12632 (2020) - [i10]Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks:
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR abs/2006.06806 (2020) - [i9]Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia:
Leveraging Domain Knowledge using Machine Learning for Image Compression in Internet-of-Things. CoRR abs/2009.06742 (2020) - [i8]Abhishek Nair, Patanjali SLPSK, Chester Rebeiro, Swarup Bhunia:
SIGNED: A Challenge-Response Based Interrogation Scheme for Simultaneous Watermarking and Trojan Detection. CoRR abs/2010.05209 (2020) - [i7]Abdulrahman Alaql, Swarup Bhunia:
Scalable Attack-Resistant Obfuscation of Logic Circuits. CoRR abs/2010.15329 (2020) - [i6]Christopher Vega, Patanjali SLPSK, Shubhra Deb Paul, Swarup Bhunia:
MeLPUF: Memory in Logic PUF. CoRR abs/2012.03162 (2020)
2010 – 2019
- 2019
- [j88]Naren Vikram Raj Masna, Cheng Chen, Soumyajit Mandal, Swarup Bhunia:
Robust Authentication of Consumables With Extrinsic Tags and Chemical Fingerprinting. IEEE Access 7: 14396-14409 (2019) - [j87]Naren Vikram Raj Masna, Shubhra Deb Paul, Cheng Chen, Soumyajit Mandal, Swarup Bhunia:
Eat, but Verify: Low-Cost Portable Devices for Food Safety Analysis. IEEE Consumer Electron. Mag. 8(1): 12-18 (2019) - [j86]Sumaiya Shomaji, Parisa Dehghanzadeh, Alex Roman, Domenic Forte, Swarup Bhunia, Soumyajit Mandal:
Early Detection of Cardiovascular Diseases Using Wearable Ultrasound Device. IEEE Consumer Electron. Mag. 8(6): 12-21 (2019) - [j85]Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi:
An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors. IEEE Trans. Very Large Scale Integr. Syst. 27(6): 1253-1261 (2019) - [j84]Prabhat Mishra, Debdeep Mukhopadhyay, Swarup Bhunia:
Guest Editorial: Special Section on Autonomous Intelligence for Security and Privacy Analytics. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2703-2705 (2019) - [c165]Abdulrahman Alaql, Domenic Forte, Swarup Bhunia:
Sweep to the Secret: A Constant Propagation Attack on Logic Locking. AsianHOST 2019: 1-6 - [c164]Swarup Bhunia:
New Frontiers in Hardware Security in the IoT Regime. CICC 2019: 1-55 - [c163]Jonathan Cruz, Prabhat Mishra, Swarup Bhunia:
The Metric Matters: The Art of Measuring Trust in Electronics. DAC 2019: 222 - [c162]Swarup Bhunia:
Innovations in IoT for a Safe, Secure, and Sustainable Future. ACM Great Lakes Symposium on VLSI 2019: 7 - [c161]Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia:
SURF: Joint Structural Functional Attack on Logic Locking. HOST 2019: 181-190 - [c160]Jungmin Park, Seongjoon Cho, Taejin Lim, Swarup Bhunia, Mark M. Tehranipoor:
SCR-QRNG: Side-Channel Resistant Design using Quantum Random Number Generator. ICCAD 2019: 1-8 - [c159]Shuo Yang, Abdulrahman Alaql, Tamzidul Hoque, Swarup Bhunia:
Runtime Integrity Verification in Cyber-physical Systems using Side-Channel Fingerprint. ICCE 2019: 1-6 - [c158]Domenic Forte, Swarup Bhunia, Ramesh Karri, Jim Plusquellic, Mark M. Tehranipoor:
IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future. ITC 2019: 1-4 - [c157]Abdulrahman Alaql, Tamzidul Hoque, Domenic Forte, Swarup Bhunia:
Quality Obfuscation for Error-Tolerant and Adaptive Hardware IP Protection. VTS 2019: 1-6 - [c156]Hassan Salmani, Tamzidul Hoque, Swarup Bhunia, Muhammad Yasin, Jeyavijayan (JV) Rajendran, Naghmeh Karimi:
Special Session: Countering IP Security threats in Supply chain. VTS 2019: 1-9 - [p1]Atul Prasad Deb Nath, Tamzidul Hoque, Sandip Ray, Swarup Bhunia:
An Adaptable System-on-Chip Security Architecture for Internet of Things Applications. Security and Fault Tolerance in Internet of Things 2019: 61-85 - 2018
- [j83]Sarah Amir, Bicky Shakya, Xiaolin Xu, Yier Jin, Swarup Bhunia, Mark M. Tehranipoor, Domenic Forte:
Development and Evaluation of Hardware Obfuscation Benchmarks. J. Hardw. Syst. Secur. 2(2): 142-161 (2018) - [j82]Sandip Ray, Eric Peeters, Mark M. Tehranipoor, Swarup Bhunia:
System-on-Chip Platform Security Assurance: Architecture and Validation. Proc. IEEE 106(1): 21-37 (2018) - [j81]Yuanwen Huang, Swarup Bhunia, Prabhat Mishra:
Scalable Test Generation for Trojan Detection Using Side Channel Analysis. IEEE Trans. Inf. Forensics Secur. 13(11): 2746-2760 (2018) - [j80]Kun Yang, Hao-Ting Shen, Domenic Forte, Swarup Bhunia, Mark M. Tehranipoor:
Hardware-Enabled Pharmaceutical Supply Chain Security. ACM Trans. Design Autom. Electr. Syst. 23(2): 23:1-23:26 (2018) - [c155]Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia:
SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation. AsianHOST 2018: 56-61 - [c154]Atul Prasad Deb Nath, Sandip Ray, Abhishek Basak, Swarup Bhunia:
System-on-chip security architecture and CAD framework for hardware patch. ASP-DAC 2018: 733-738 - [c153]Jonathan Cruz, Yuanwen Huang, Prabhat Mishra, Swarup Bhunia:
An automated configurable Trojan insertion framework for dynamic trust benchmarks. DATE 2018: 1598-1603 - [c152]Ioannis Savidis, Swarup Bhunia, Gang Qu, Matthew J. Casto, Jeremy Muldavin:
Securing the Systems of the Future - Techniques for a Shifting Attack Space. ACM Great Lakes Symposium on VLSI 2018: 517 - [c151]Kai Yang, Jungmin Park, Mark M. Tehranipoor, Swarup Bhunia:
Hardware virtualization for protection against power analysis attack. HOST 2018: 167-172 - [c150]Swarup Bhunia:
Internet of Things security: Are we paranoid enough? ICCE 2018: 1 - [c149]Linus Torvalds, Niraj K. Jha, Gary Davis, Nasir D. Memon, Petronel Bigioi, Swarup Bhunia, Koji Nakao:
Keynotes. ICCE 2018: 1-4 - [c148]Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi:
Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances. ISLPED 2018: 44:1-44:6 - [c147]Kai Yang, Jungmin Park, Mark M. Tehranipoor, Swarup Bhunia:
Robust Timing Attack Countermeasure on Virtual Hardware. ISVLSI 2018: 148-153 - [c146]Atul Prasad Deb Nath, Swarup Bhunia, Sandip Ray:
ArtiFact: Architecture and CAD Flow for Efficient Formal Verification of SoC Security Policies. ISVLSI 2018: 411-416 - [c145]Tamzidul Hoque, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia:
Hardware IP Trust Validation: Learn (the Untrustworthy), and Verify. ITC 2018: 1-10 - [c144]Alex Roman, Parisa Dehghanzadeh, Vida Pashaei, Abhishek Basak, Swarup Bhunia, Soumyajit Mandal:
An Open-Source Test-Bench for Autonomous Ultrasound Imaging. MWSCAS 2018: 524-527 - [c143]Angela R. Newsome, Mehrdad Ramezani, Mayur Ghatge, Fengchao Zhang, Swarup Bhunia, Roozbeh Tabrizian:
Multi-Mode Micromechanical Resonant Tags for Traceability and Authentication Applications. NEMS 2018: 275-279 - [c142]Tamzidul Hoque, Xinmu Wang, Abhishek Basak, Robert Karam, Swarup Bhunia:
Hardware Trojan attacks in embedded memory. VTS 2018: 1-6 - [i5]Prabuddha Chakraborty, Jonathan Cruz, Swarup Bhunia:
SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation. CoRR abs/1809.10743 (2018) - 2017
- [j79]Dongyeob Shin, Jongsun Park, Jangwon Park, Somnath Paul, Swarup Bhunia:
Adaptive ECC for Tailored Protection of Nanoscale Memory. IEEE Des. Test 34(6): 84-93 (2017) - [j78]Greg Stitt, Robert Karam, Kai Yang, Swarup Bhunia:
A Uniquified Virtualization Approach to Hardware Security. IEEE Embed. Syst. Lett. 9(3): 53-56 (2017) - [j77]Tamzidul Hoque, Seetharam Narasimhan, Xinmu Wang, Sanchita Mal-Sarkar, Swarup Bhunia:
Golden-Free Hardware Trojan Detection with High Sensitivity Under Process Noise. J. Electron. Test. 33(1): 107-124 (2017) - [j76]Robert Karam, Somnath Paul, Ruchir Puri, Swarup Bhunia:
Memory-Centric Reconfigurable Accelerator for Classification and Machine Learning Applications. ACM J. Emerg. Technol. Comput. Syst. 13(3): 34:1-34:24 (2017) - [j75]Swarup Bhunia, Mark M. Tehranipoor:
Editorial for the Introductory Issue of the Journal of Hardware and Systems Security (HaSS). J. Hardw. Syst. Secur. 1(1): 1-2 (2017) - [j74]Bicky Shakya, Miao Tony He, Hassan Salmani, Domenic Forte, Swarup Bhunia, Mark M. Tehranipoor:
Benchmarking of Hardware Trojans and Maliciously Affected Circuits. J. Hardw. Syst. Secur. 1(1): 85-102 (2017) - [j73]Anthony Bahadir Lopez, Korosh Vatanparvar, Atul Prasad Deb Nath, Shuo Yang, Swarup Bhunia, Mohammad Abdullah Al Faruque:
A Security Perspective on Battery Systems of the Internet of Things. J. Hardw. Syst. Secur. 1(2): 188-199 (2017) - [j72]Kai Yang, Robert Karam, Swarup Bhunia:
Energy-Efficient Reconfigurable Hardware Accelerators for Data-Intensive Applications. J. Low Power Electron. 13(3): 382-394 (2017) - [j71]Robert Karam, Steve J. A. Majerus, Dennis Bourbeau, Margot S. Damaser, Swarup Bhunia:
Tunable and Lightweight On-Chip Event Detection for Implantable Bladder Pressure Monitoring Devices. IEEE Trans. Biomed. Circuits Syst. 11(6): 1303-1312 (2017) - [j70]Wenchao Qian, Pai-Yu Chen, Robert Karam, Ligang Gao, Swarup Bhunia, Shimeng Yu:
Energy-Efficient Adaptive Computing With Multifunctional Memory. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 191-195 (2017) - [j69]Ujjwal Guin, Swarup Bhunia, Domenic Forte, Mark M. Tehranipoor:
SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware. IEEE Trans. Dependable Secur. Comput. 14(3): 265-278 (2017) - [j68]Swarup Bhunia, An Chen, Ozgur Sinanoglu, Jason M. Fung:
Guest Editors Introduction: Security of Beyond CMOS Devices: Issues and Opportunities. IEEE Trans. Emerg. Top. Comput. 5(3): 302-303 (2017) - [j67]Abhishek Basak, Swarup Bhunia, Thomas E. Tkacik, Sandip Ray:
Security Assurance for System-on-Chip Designs With Untrusted IPs. IEEE Trans. Inf. Forensics Secur. 12(7): 1515-1528 (2017) - [j66]Wenchao Qian, Christopher Babecki, Robert Karam, Somnath Paul, Swarup Bhunia:
ENFIRE: A Spatio-Temporal Fine-Grained Reconfigurable Hardware. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 177-188 (2017) - [c141]Robert Karam, Tamzidul Hoque, Kevin R. B. Butler, Swarup Bhunia:
Mixed-granular architectural diversity for device security in the Internet of Things. AsianHOST 2017: 73-78 - [c140]Robert Karam, Tamzidul Hoque, Sandip Ray, Mark M. Tehranipoor, Swarup Bhunia:
MUTARCH: Architectural diversity for FPGA device and IP security. ASP-DAC 2017: 611-616 - [c139]Gustavo K. Contreras, Adib Nahiyan, Swarup Bhunia, Domenic Forte, Mark M. Tehranipoor:
Security vulnerability analysis of design-for-test exploits for asset protection in SoCs. ASP-DAC 2017: 617-622 - [c138]Fengchao Zhang, Naren Vikram Raj Masna, Swarup Bhunia, Cheng Chen, Soumyajit Mandal:
Authentication and traceability of food products through the supply chain using NQR spectroscopy. BioCAS 2017: 1-4 - [c137]Sarah Amir, Bicky Shakya, Domenic Forte, Mark M. Tehranipoor, Swarup Bhunia:
Comparative Analysis of Hardware Obfuscation for IP Protection. ACM Great Lakes Symposium on VLSI 2017: 363-368 - [c136]Kai Yang, Robert Karam, Swarup Bhunia:
Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing. MWSCAS 2017: 409-412 - [c135]Jungmin Park, Massimiliano Corba, Antonio E. de la Sema, Richard L. Vigeant, Mark M. Tehranipoor, Swarup Bhunia:
ATAVE: A framework for automatic timing attack vulnerability evaluation. MWSCAS 2017: 559-562 - [c134]Tonmoy Dhar, Swarup Bhunia, Amit Ranjan Trivedi:
A solitary protection measure against scan chain, fault injection, and power analysis attacks on AES. MWSCAS 2017: 575-578 - 2016
- [j65]Domenic Forte, Ron Perez, Yongdae Kim, Swarup Bhunia:
Supply-Chain Security for Cyberinfrastructure [Guest editors' introduction]. Computer 49(8): 12-16 (2016) - [j64]Robert Karam, Dennis Bourbeau, Steve J. A. Majerus, Iryna Makovey, Howard B. Goldman, Margot S. Damaser, Swarup Bhunia:
Real-Time Classification of Bladder Events for Effective Diagnosis and Treatment of Urinary Incontinence. IEEE Trans. Biomed. Eng. 63(4): 721-729 (2016) - [j63]Christopher Babecki, Wenchao Qian, Somnath Paul, Robert Karam, Swarup Bhunia:
An Embedded Memory-Centric Reconfigurable Hardware Accelerator for Security Applications. IEEE Trans. Computers 65(10): 3196-3202 (2016) - [j62]Yu Zheng, Shuo Yang, Swarup Bhunia:
SeMIA: Self-Similarity-Based IC Integrity Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(1): 37-48 (2016) - [j61]Abhishek Basak, Swarup Bhunia:
P-Val: Antifuse-Based Package-Level Defense Against Counterfeit ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1067-1078 (2016) - [j60]Cheng Chen, Fengchao Zhang, Jamie Barras, Kaspar Althoefer, Swarup Bhunia, Soumyajit Mandal:
Authentication of Medicines Using Nuclear Quadrupole Resonance Spectroscopy. IEEE ACM Trans. Comput. Biol. Bioinform. 13(3): 417-430 (2016) - [j59]Sandip Ray, Jongsun Park, Swarup Bhunia:
Wearables, Implants, and Internet of Things: The Technology Needs in the Evolving Landscape. IEEE Trans. Multi Scale Comput. Syst. 2(2): 123-128 (2016) - [j58]Sanchita Mal-Sarkar, Robert Karam, Seetharam Narasimhan, Anandaroop Ghosh, Aswin Raghav Krishna, Swarup Bhunia:
Design and Validation for FPGA Trust under Hardware Trojan Attacks. IEEE Trans. Multi Scale Comput. Syst. 2(3): 186-198 (2016) - [j57]Kan Xiao, Domenic Forte, Yier Jin, Ramesh Karri, Swarup Bhunia, Mark M. Tehranipoor:
Hardware Trojans: Lessons Learned after One Decade of Research. ACM Trans. Design Autom. Electr. Syst. 22(1): 6:1-6:23 (2016) - [j56]Yu Zheng, Fengchao Zhang, Swarup Bhunia:
DScanPUF: A Delay-Based Physical Unclonable Function Built Into Scan Chain. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1059-1070 (2016) - [j55]Robert Karam, Ruchir Puri, Swarup Bhunia:
Energy-Efficient Adaptive Hardware Accelerator for Text Mining Application Kernels. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3526-3537 (2016) - [c133]Andrew Hennessy, Yu Zheng, Swarup Bhunia:
JTAG-based robust PCB authentication for protection against counterfeiting attacks. ASP-DAC 2016: 56-61 - [c132]Robert Karam, Steve J. A. Majerus, Dennis Bourbeau, Margot S. Damaser, Swarup Bhunia:
Ultralow-power data compression for implantable bladder pressure monitor: Algorithm and hardware implementation. BioCAS 2016: 500-503 - [c131]Yuanwen Huang, Swarup Bhunia, Prabhat Mishra:
MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection. CCS 2016: 130-141 - [c130]Abhishek Basak, Swarup Bhunia, Sandip Ray:
Exploiting design-for-debug for flexible SoC security architecture. DAC 2016: 167:1-167:6 - [c129]Fengchao Zhang, Shuo Yang, Jim Plusquellic, Swarup Bhunia:
Current based PUF exploiting random variations in SRAM cells. DATE 2016: 277-280 - [c128]Robert Karam, Swarup Bhunia, Steve J. A. Majerus, Steven W. Brose, Margot S. Damaser, Dennis Bourbeau:
Real-time, autonomous bladder event classification and closed-loop control from single-channel pressure data. EMBC 2016: 5789-5792 - [c127]Wenchao Qian, Christopher Babecki, Robert Karam, Swarup Bhunia:
ENFIRE: An Energy-efficient Fine-grained Spatio-temporal Reconfigurable Computing Fabric (Abstact Only). FPGA 2016: 275 - [c126]Robert Karam, Rui Liu, Pai-Yu Chen, Shimeng Yu, Swarup Bhunia:
Security Primitive Design with Nanoscale Devices: A Case Study with Resistive RAM. ACM Great Lakes Symposium on VLSI 2016: 299-304 - [c125]Dylan Ismari, Jim Plusquellic, Charles Lamech, Swarup Bhunia, Fareena Saqib:
On detecting delay anomalies introduced by hardware trojans. ICCAD 2016: 44 - [c124]Sandip Ray, Tamzidul Hoque, Abhishek Basak, Swarup Bhunia:
The power play: Security-energy trade-offs in the IoT regime. ICCD 2016: 690-693 - [c123]Steven Paley, Tamzidul Hoque, Swarup Bhunia:
Active protection against PCB physical tampering. ISQED 2016: 356-361 - [c122]Robert Karam, Tamzidul Hoque, Sandip Ray, Mark M. Tehranipoor, Swarup Bhunia:
Technical demonstration session: Software toolflow for FPGA bitstream obfuscation. ReConFig 2016: 1-2 - [c121]Robert Karam, Tamzidul Hoque, Sandip Ray, Mark M. Tehranipoor, Swarup Bhunia:
Robust bitstream protection in FPGA-based systems through low-overhead obfuscation. ReConFig 2016: 1-8 - [c120]Sandip Ray, Swarup Bhunia, Yier Jin, Mark M. Tehranipoor:
Security validation in IoT space. VTS 2016: 1 - [e2]William H. Robinson, Swarup Bhunia, Ryan Kastner:
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016, McLean, VA, USA, May 3-5, 2016. IEEE Computer Society 2016, ISBN 978-1-4673-8826-9 [contents] - [i4]Lejla Batina, Swarup Bhunia, Patrick Schaumont, Jean-Pierre Seifert:
Foundations of Secure Scaling (Dagstuhl Seminar 16342). Dagstuhl Reports 6(8): 65-90 (2016) - 2015
- [j54]Swaroop Ghosh, Abhishek Basak, Swarup Bhunia:
How Secure Are Printed Circuit Boards Against Trojan Attacks? IEEE Des. Test 32(2): 7-16 (2015) - [j53]Saibal Mukhopadhyay, Swarup Bhunia, Hillery C. Hunter, Kaushik Roy:
Guest Editorial Computing in Emerging Technologies (Second Issue). IEEE J. Emerg. Sel. Topics Circuits Syst. 5(1): 1-4 (2015) - [j52]Kaushik Roy, Deliang Fan, Xuanyao Fong, Yusung Kim, Mrigank Sharad, Somnath Paul, Subho Chatterjee, Swarup Bhunia, Saibal Mukhopadhyay:
Exploring Spin Transfer Torque Devices for Unconventional Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(1): 5-16 (2015) - [j51]Robert Karam, Ruchir Puri, Swaroop Ghosh, Swarup Bhunia:
Emerging Trends in Design and Applications of Memory-Based Computing and Content-Addressable Memories. Proc. IEEE 103(8): 1311-1330 (2015) - [j50]Xinmu Wang, Yu Zheng, Abhishek Basak, Swarup Bhunia:
IIPS: Infrastructure IP for Secure SoC Design. IEEE Trans. Computers 64(8): 2226-2238 (2015) - [j49]Ramesh Karri, Farinaz Koushanfar, Ozgur Sinanoglu, Yiorgos Makris, Ken Mai, Ahmad-Reza Sadeghi, Swarup Bhunia:
Guest Editorial Special Section on Hardware Security and Trust. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 873-874 (2015) - [j48]Wen Yueh, Subho Chatterjee, Muneeb Zia, Swarup Bhunia, Saibal Mukhopadhyay:
A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric. IEEE Trans. Circuits Syst. II Express Briefs 62-II(6): 593-597 (2015) - [j47]Sandip Ray, Jongsun Park, Swarup Bhunia:
Guest Editors' Introduction: Wearables, Implants, and Internet of Things. IEEE Trans. Multi Scale Comput. Syst. 1(2): 60-61 (2015) - [j46]Yu Zheng, Xinmu Wang, Swarup Bhunia:
SACCI: Scan-Based Characterization Through Clock Phase Sweep for Counterfeit Chip Detection. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 831-841 (2015) - [j45]Somnath Paul, Aswin Raghav Krishna, Wenchao Qian, Robert Karam, Swarup Bhunia:
MAHA: An Energy-Efficient Malleable Hardware Accelerator for Data-Intensive Applications. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1005-1016 (2015) - [c119]Jae-Won Jang, Jongsun Park, Swaroop Ghosh, Swarup Bhunia:
Self-correcting STTRAM under magnetic field attacks. DAC 2015: 77:1-77:6 - [c118]Sandip Ray, Jin Yang, Abhishek Basak, Swarup Bhunia:
Correctness and security at odds: post-silicon validation of modern SoC designs. DAC 2015: 146:1-146:6 - [c117]Abhishek Basak, Swarup Bhunia, Sandip Ray:
A Flexible Architecture for Systematic Implementation of SoC Security Policies. ICCAD 2015: 536-543 - [c116]Abhishek Basak, Fengchao Zhang, Swarup Bhunia:
PiRA: IC authentication utilizing intrinsic variations in pin resistance. ITC 2015: 1-8 - [c115]Robert Karam, Kai Yang, Swarup Bhunia:
Energy-efficient reconfigurable computing using Spintronic memory. MWSCAS 2015: 1-4 - [c114]Prabhat Mishra, Swarup Bhunia, Srivaths Ravi:
Tutorial T2: Validation and Debug of Security and Trust Issues in Embedded Systems. VLSID 2015: 3-5 - [c113]Fengchao Zhang, Andrew Hennessy, Swarup Bhunia:
Robust counterfeit PCB detection exploiting intrinsic trace impedance variations. VTS 2015: 1-6 - 2014
- [j44]Saibal Mukhopadhyay, Swarup Bhunia, Hillery C. Hunter, Kaushik Roy:
Guest Editorial Computing in Emerging Technologies (First Issue). IEEE J. Emerg. Sel. Topics Circuits Syst. 4(4): 377-379 (2014) - [j43]Swarup Bhunia, Michael S. Hsiao, Mainak Banga, Seetharam Narasimhan:
Hardware Trojan Attacks: Threat Analysis and Countermeasures. Proc. IEEE 102(8): 1229-1247 (2014) - [j42]Abhishek Basak, Vaishnavi Nattar Ranganathan, Swarup Bhunia:
Implantable Ultrasonic Imaging Assembly for Automated Monitoring of Internal Organs. IEEE Trans. Biomed. Circuits Syst. 8(6): 881-890 (2014) - [j41]Jangwon Park, Jongsun Park, Swarup Bhunia:
VL-ECC: Variable Data-Length Error Correction Code for Embedded Memory in DSP Applications. IEEE Trans. Circuits Syst. II Express Briefs 61-II(2): 120-124 (2014) - [j40]Anandaroop Ghosh, Somnath Paul, Jongsun Park, Swarup Bhunia:
Improving Energy Efficiency in FPGA Through Judicious Mapping of Computation to Embedded Memory Blocks. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1314-1327 (2014) - [j39]Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia:
A Variation-Aware Preferential Design Approach for Memory-Based Reconfigurable Computing. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2449-2461 (2014) - [c112]Yu Zheng, Abhishek Basak, Swarup Bhunia:
CACI: Dynamic Current Analysis Towards Robust Recycled Chip Identification. DAC 2014: 88:1-88:6 - [c111]Swarup Bhunia, Vaishnavi Nattar Ranganathan, Tina He, Srihari Rajgopal, Rui Yang, Mehran Mehregany, Philip X.-L. Feng:
Toward ultralow-power computing at exteme with silicon carbide (SiC) nanoelectromechanical logic. DATE 2014: 1-6 - [c110]Somnath Paul, Robert Karam, Swarup Bhunia, Ruchir Puri:
Energy-efficient hardware acceleration through computing in the memory. DATE 2014: 1-6 - [c109]Wenchao Qian, Robert Karam, Swarup Bhunia:
Trade-off between energy and quality of service through dynamic operand truncation and fusion. ACM Great Lakes Symposium on VLSI 2014: 79-80 - [c108]Sanchita Mal-Sarkar, Aswin Raghav Krishna, Anandaroop Ghosh, Swarup Bhunia:
Hardware trojan attacks in FPGA devices: threat analysis and effective counter measures. ACM Great Lakes Symposium on VLSI 2014: 287-292 - [c107]Wenjie Che, Jim Plusquellic, Swarup Bhunia:
A non-volatile memory based physically unclonable function without helper data. ICCAD 2014: 148-153 - [c106]Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia:
Robust low-power reconfigurable computing with a variation-aware preferential design approach. ICICDT 2014: 1-6 - [c105]Vaishnavi Nattar Ranganathan, Srihari Rajgopal, Mehran Mehregany, Swarup Bhunia:
Analysis of practical scaling limits in nanoelectromechanical switches. NEMS 2014: 471-476 - [c104]Abhishek Basak, Yu Zheng, Swarup Bhunia:
Active defense against counterfeiting attacks through robust antifuse-based on-chip locks. VTS 2014: 1-6 - 2013
- [j38]Swarup Bhunia, Miron Abramovici, Dakshi Agrawal, Paul Bradley, Michael S. Hsiao, Jim Plusquellic, Mohammad Tehranipoor:
Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution. IEEE Des. Test 30(3): 6-17 (2013) - [j37]Seetharam Narasimhan, Dongdong Du, Rajat Subhra Chakraborty, Somnath Paul, Francis G. Wolff, Christos A. Papachristou, Kaushik Roy, Swarup Bhunia:
Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis. IEEE Trans. Computers 62(11): 2183-2195 (2013) - [c103]Yu Zheng, Aswin Raghav Krishna, Swarup Bhunia:
ScanPUF: Robust ultralow-overhead PUF using scan chain. ASP-DAC 2013: 626-631 - [c102]Yu Zheng, Maryamsadat Hashemian, Swarup Bhunia:
RESP: a robust physical unclonable function retrofitted into embedded SRAM array. DAC 2013: 60:1-60:9 - [c101]Xinmu Wang, Wen Yueh, Debapriya Basu Roy, Seetharam Narasimhan, Yu Zheng, Saibal Mukhopadhyay, Debdeep Mukhopadhyay, Swarup Bhunia:
Role of power grid in side channel attack and power-grid-aware secure design. DAC 2013: 78:1-78:9 - [c100]Abhishek Basak, Sanchita Mal-Sarkar, Swarup Bhunia:
Secure and Trusted SoC: Challenges and Emerging Solutions. MTV 2013: 29-34 - [c99]Abhishek Basak, Somnath Paul, Jangwon Park, Jongsun Park, Swarup Bhunia:
Reconfigurable ECC for adaptive protection of memory. MWSCAS 2013: 1085-1088 - [c98]Vaishnavi Nattar Ranganathan, Tina He, Srihari Rajgopal, Mehran Mehregany, Philip X.-L. Feng, Swarup Bhunia:
Nanomechanical non-volatile memory for computing at extreme. NANOARCH 2013: 44-45 - [c97]Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia, Branden Long, Yibo Li, Rashmi Jha:
Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory. NANOARCH 2013: 76-81 - [c96]Tina He, Rui Yang, Srihari Rajgopal, Swarup Bhunia, Mehran Mehregany, Philip X.-L. Feng:
Dual-gate silicon carbide (SiC) lateral nanoelectromechanical switches. NEMS 2013: 554-557 - [c95]Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia:
Dynamic Cache Tuning for Efficient Memory Based Computing in Multicore Architectures. VLSI Design 2013: 49-54 - [c94]Maryamsadat Hashemian, Swarup Bhunia:
Ultralow-Power and Robust Embedded Memory for Bioimplantable Microsystems. VLSI Design 2013: 66-71 - 2012
- [j36]Seetharam Narasimhan, Wen Yueh, Xinmu Wang, Saibal Mukhopadhyay, Swarup Bhunia:
Improving IC Security Against Trojan Attacks Through Integration of Security Monitors. IEEE Des. Test Comput. 29(5): 37-46 (2012) - [j35]Jangjoon Lee, Srikar Bhagavatula, Swarup Bhunia, Kaushik Roy, Byunghoo Jung:
Self-Healing Design in Deep Scaled CMOS Technologies. J. Circuits Syst. Comput. 21(6) (2012) - [j34]Swarup Bhunia, Darrin J. Young:
Introduction to Special Issue on Implantable Electronics. ACM J. Emerg. Technol. Comput. Syst. 8(2): 7:1-7:2 (2012) - [j33]Seetharam Narasimhan, Keerthi Kunaparaju, Swarup Bhunia:
Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(9): 1932-1941 (2012) - [c93]Xinmu Wang, Tatini Mal-Sarkar, Aswin Raghav Krishna, Seetharam Narasimhan, Swarup Bhunia:
Software exploitable hardware Trojans in embedded processor. DFT 2012: 55-58 - [c92]Abhishek Basak, Vaishnavi Nattar Ranganathan, Seetharam Narasimhan, Swarup Bhunia:
Implantable ultrasonic dual functional assembly for detection and treatment of anomalous growth. EMBC 2012: 170-173 - [c91]Kamran Rahmani, Prabhat Mishra, Swarup Bhunia:
Memory-based computing for performance and energy improvement in multicore architectures. ACM Great Lakes Symposium on VLSI 2012: 287-290 - [c90]Susmita Sur-Kolay, Swarup Bhunia:
Tutorial T4: Intellectual Property Protection and Security in System-on-Chip Design. VLSI Design 2012: 18-19 - [c89]Xinmu Wang, Seetharam Narasimhan, Aswin Raghav Krishna, Swarup Bhunia:
SCARE: Side-Channel Analysis Based Reverse Engineering for Post-Silicon Validation. VLSI Design 2012: 304-309 - [c88]Lei Wang, Somnath Paul, Swarup Bhunia:
Width-Aware Fine-Grained Dynamic Supply Gating: A Design Methodology for Low-Power Datapath and Memory. VLSI Design 2012: 340-345 - [c87]Anandaroop Ghosh, Somnath Paul, Swarup Bhunia:
Energy-Efficient Application Mapping in FPGA through Computation in Embedded Memory Blocks. VLSI Design 2012: 424-429 - [r1]Seetharam Narasimhan, Swarup Bhunia:
Ultralow-Power Implantable Electronics. Handbook of Energy-Aware and Green Computing 2012: 1097-1114 - 2011
- [j32]Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia:
Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(3): 369-380 (2011) - [j31]Rajat Subhra Chakraborty, Swarup Bhunia:
Security Against Hardware Trojan Attacks Using Key-Based Design Obfuscation. J. Electron. Test. 27(6): 767-785 (2011) - [j30]Seetharam Narasimhan, Hillel J. Chiel, Swarup Bhunia:
Ultra-Low-Power and Robust Digital-Signal-Processing Hardware for Implantable Neural Interface Microsystems. IEEE Trans. Biomed. Circuits Syst. 5(2): 169-178 (2011) - [j29]Somnath Paul, Fang Cai, Xinmiao Zhang, Swarup Bhunia:
Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache. IEEE Trans. Computers 60(1): 20-34 (2011) - [j28]Somnath Paul, Swarup Bhunia:
Dynamic Transfer of Computation to Processor Cache for Yield and Reliability Improvement. IEEE Trans. Very Large Scale Integr. Syst. 19(8): 1368-1379 (2011) - [c86]Aswin Raghav Krishna, Seetharam Narasimhan, Xinmu Wang, Swarup Bhunia:
MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array. CHES 2011: 407-420 - [c85]Xinmu Wang, Seetharam Narasimhan, Aswin Raghav Krishna, Francis G. Wolff, Srihari Rajgopal, Te-Hao Lee, Mehran Mehregany, Swarup Bhunia:
High-temperature (>500°C) reconfigurable computing using silicon carbide NEMS switches. DATE 2011: 1065-1070 - [c84]Subidh Ali, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay, Swarup Bhunia:
Multi-level attacks: An emerging security concern for cryptographic hardware. DATE 2011: 1176-1179 - [c83]Abhishek Basak, Seetharam Narasimhan, Swarup Bhunia:
Low-power implantable ultrasound imager for online monitoring of tumor growth. EMBC 2011: 2858-2861 - [c82]Somnath Paul, Swarup Bhunia:
Memory based computing: reshaping the fine-grained logic in a reconfigurable framework (abstract only). FPGA 2011: 283 - [c81]Seetharam Narasimhan, Xinmu Wang, Dongdong Du, Rajat Subhra Chakraborty, Swarup Bhunia:
TeSR: A robust Temporal Self-Referencing approach for Hardware Trojan detection. HOST 2011: 71-74 - [c80]Xinmu Wang, Seetharam Narasimhan, Aswin Raghav Krishna, Tatini Mal-Sarkar, Swarup Bhunia:
Sequential hardware Trojan: Side-channel aware design and placement. ICCD 2011: 297-300 - [c79]Rajat Subhra Chakraborty, Seetharam Narasimhan, Swarup Bhunia:
Embedded Software Security through Key-Based Control Flow Obfuscation. InfoSecHiComNet 2011: 30-44 - [c78]Xinmu Wang, Seetharam Narasimhan, Somnath Paul, Swarup Bhunia:
NEMTronics: Symbiotic integration of nanoelectronic and nanomechanical devices for energy-efficient adaptive computing. NANOARCH 2011: 210-217 - [c77]Keerthi Kunaparaju, Seetharam Narasimhan, Swarup Bhunia:
VaROT: Methodology for Variation-Tolerant DSP Hardware Design Using Post-Silicon Truncation of Operand Width. VLSI Design 2011: 310-315 - [e1]Swarup Bhunia, Saibal Mukhopadhyay:
Low-Power Variation-Tolerant Design in Nanometer Silicon. Springer 2011, ISBN 978-1-4419-7417-4 [contents] - 2010
- [j27]Swarup Bhunia, Rahul Rao:
Guest Editors' Introduction: Managing Uncertainty through Postfabrication Calibration and Repair. IEEE Des. Test Comput. 27(6): 4-5 (2010) - [j26]Swarup Bhunia:
A Special Issue on 23rd IEEE International Conference on VLSI Design, Bangalore, India, 3-7 January 2010. J. Low Power Electron. 6(3): 375 (2010) - [j25]Somnath Paul, Hamid Mahmoodi, Swarup Bhunia:
Low-overhead Fmax calibration at multiple operating points using delay-sensitivity-based path selection. ACM Trans. Design Autom. Electr. Syst. 15(2): 19:1-19:34 (2010) - [j24]Patrick Ndai, Nauman Rafique, Mithuna Thottethodi, Swaroop Ghosh, Swarup Bhunia, Kaushik Roy:
Trifecta: A Nonspeculative Scheme to Exploit Common, Data-Dependent Subcritical Paths. IEEE Trans. Very Large Scale Integr. Syst. 18(1): 53-65 (2010) - [c76]Seetharam Narasimhan, Somnath Paul, Rajat Subhra Chakraborty, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, Swarup Bhunia:
System level self-healing for parametric yield and reliability improvement under power bound. AHS 2010: 52-58 - [c75]Dongdong Du, Seetharam Narasimhan, Rajat Subhra Chakraborty, Swarup Bhunia:
Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection. CHES 2010: 173-187 - [c74]Seetharam Narasimhan, David R. McIntyre, Francis G. Wolff, Yu Zhou, Daniel J. Weyer, Swarup Bhunia:
A supply-demand model based scalable energy management system for improved energy utilization efficiency. Green Computing Conference 2010: 97-105 - [c73]Seetharam Narasimhan, Rajat Subhra Chakraborty, Dongdong Du, Somnath Paul, Francis G. Wolff, Christos A. Papachristou, Kaushik Roy, Swarup Bhunia:
Multiple-Parameter Side-Channel Analysis: A Non-invasive Hardware Trojan Detection Approach. HOST 2010: 13-18 - [c72]David R. McIntyre, Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia:
Trustworthy computing in a multi-core system using distributed scheduling. IOLTS 2010: 211-213 - [c71]Somnath Paul, Swarup Bhunia:
VAIL: variation-aware issue logic and performance binning for processor yield and profit improvement. ISLPED 2010: 37-42 - [c70]Rajat Subhra Chakraborty, Swarup Bhunia:
RTL Hardware IP Protection Using Key-Based Control and Data Flow Obfuscation. VLSI Design 2010: 405-410 - [c69]Swarup Bhunia, Anand Raghunathan:
Special session 11B: Hot topic hardware security: Design, test and verification issues. VTS 2010: 349 - [i3]Tatini Mal-Sarkar, Swarup Bhunia:
Collaborative Trust: A Novel Paradigm of Trusted Mobile Computing. CoRR abs/1010.2447 (2010)
2000 – 2009
- 2009
- [j23]Rajat Subhra Chakraborty, Somnath Paul, Yu Zhou, Swarup Bhunia:
Low-power hybrid complementary metaloxide- semiconductor-nano-electro-mechanical systems field programmable gate array: circuit level analysis and defect-aware mapping. IET Comput. Digit. Tech. 3(6): 609-624 (2009) - [j22]Rajat Subhra Chakraborty, Swarup Bhunia:
A study of asynchronous design methodology for robust CMOS-nano hybrid system design. ACM J. Emerg. Technol. Comput. Syst. 5(3): 12:1-12:22 (2009) - [j21]Rajat Subhra Chakraborty, Swarup Bhunia:
HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(10): 1493-1502 (2009) - [c68]Rajat Subhra Chakraborty, Francis G. Wolff, Somnath Paul, Christos A. Papachristou, Swarup Bhunia:
MERO: A Statistical Approach for Hardware Trojan Detection. CHES 2009: 396-410 - [c67]Rajat Subhra Chakraborty, Seetharam Narasimhan, Swarup Bhunia:
Hardware Trojan: Threats and emerging solutions. HLDVT 2009: 166-171 - [c66]Rajat Subhra Chakraborty, Swarup Bhunia:
Security Through Obscurity: An Approach for Protecting Register Transfer Level Hardware IP. HOST 2009: 96-99 - [c65]David R. McIntyre, Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia:
Dynamic Evaluation of Hardware Trust. HOST 2009: 108-111 - [c64]Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia:
A circuit-software co-design approach for improving EDP in reconfigurable frameworks. ICCAD 2009: 109-112 - [c63]Rajat Subhra Chakraborty, Swarup Bhunia:
Security against hardware Trojan through a novel application of design obfuscation. ICCAD 2009: 113-116 - [c62]Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia:
A variation-aware preferential design approach for memory based reconfigurable computing. ICCAD 2009: 180-183 - [c61]Somnath Paul, Swarup Bhunia:
Computing with nanoscale memory: Model and architecture. NANOARCH 2009: 1-6 - 2008
- [j20]Swarup Bhunia, Hamid Mahmoodi, Arijit Raychowdhury, Kaushik Roy:
Arbitrary Two-Pattern Delay Testing Using a Low-Overhead Supply Gating Technique. J. Electron. Test. 24(6): 577-590 (2008) - [j19]Patrick Ndai, Swarup Bhunia, Amit Agarwal, Kaushik Roy:
Within-Die Variation-Aware Scheduling in Superscalar Processors for Improved Throughput. IEEE Trans. Computers 57(7): 940-951 (2008) - [j18]Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy:
Profit Aware Circuit Design Under Process Variations Considering Speed Binning. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 806-815 (2008) - [c60]Somnath Paul, Swarup Bhunia:
MBARC: A scalable memory based reconfigurable computing framework for nanoscale devices. ASP-DAC 2008: 77-82 - [c59]Seetharam Narasimhan, Somnath Paul, Swarup Bhunia:
Collective computing based on swarm intelligence. DAC 2008: 349-350 - [c58]Somnath Paul, Swarup Bhunia:
Reconfigurable computing using content addressable memory for improved performance and resource usage. DAC 2008: 786-791 - [c57]Yu Zhou, Somnath Paul, Swarup Bhunia:
Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement. DATE 2008: 98-103 - [c56]Lawrence Leinweber, Swarup Bhunia:
Fine-Grained Supply Gating Through Hypergraph Partitioning and Shannon Decomposition for Active Power Reduction. DATE 2008: 373-378 - [c55]Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia, Rajat Subhra Chakraborty:
Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme. DATE 2008: 1362-1365 - [c54]Matthew Seetharam A. Holtz, Seetharam Narasimhan, Swarup Bhunia:
On-die CMOS voltage droop detection and dynamiccompensation. ACM Great Lakes Symposium on VLSI 2008: 35-40 - [c53]Rajat Subhra Chakraborty, Somnath Paul, Swarup Bhunia:
On-Demand Transparency for Improving Hardware Trojan Detectability. HOST 2008: 48-50 - [c52]Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia:
Hybrid CMOS-STTRAM non-volatile FPGA: design challenges and optimization approaches. ICCAD 2008: 589-592 - [c51]Rajat Subhra Chakraborty, Swarup Bhunia:
Hardware protection and authentication through netlist level obfuscation. ICCAD 2008: 674-677 - [c50]Swarup Bhunia, Kaushik Roy:
Low power design under parameter variations. ISLPED 2008: 137-138 - [c49]Rajat Subhra Chakraborty, Swarup Bhunia:
Micropipeline-Based Asynchronous Design Methodology for Robust System Design Using Nanoscale Crossbar. ISQED 2008: 697-701 - [c48]Yu Zhou, Somnath Paul, Swarup Bhunia:
Towards Uniform Temperature Distribution in SOI Circuits Using Carbon Nanotube Based Thermal Interconnect. ISQED 2008: 861-866 - [c47]Swarup Bhunia, Kaushik Roy:
Low power design under parameter variations. SoCC 2008: 389-390 - [c46]Rajat Subhra Chakraborty, Somnath Paul, Swarup Bhunia:
Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits. VLSI Design 2008: 441-446 - 2007
- [j17]Swaroop Ghosh, Swarup Bhunia, Kaushik Roy:
CRISTA: A New Paradigm for Low-Power, Variation-Tolerant, and Adaptive Circuit Synthesis Using Critical Path Isolation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 1947-1956 (2007) - [j16]Rajat Subhra Chakraborty, Seetharam Narasimhan, Swarup Bhunia:
Hybridization of CMOS With CNT-Based Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2480-2488 (2007) - [j15]Swaroop Ghosh, Swarup Bhunia, Kaushik Roy:
Low-Power and testable circuit synthesis using Shannon decomposition. ACM Trans. Design Autom. Electr. Syst. 12(4): 47 (2007) - [j14]Amit Agarwal, Kunhyuk Kang, Swarup Bhunia, James D. Gallagher, Kaushik Roy:
Device-Aware Yield-Centric Dual-Vt Design Under Parameter Variations in Nanoscale Technologies. IEEE Trans. Very Large Scale Integr. Syst. 15(6): 660-671 (2007) - [c45]Swarup Bhunia, Massood Tabib-Azar, Daniel G. Saab:
Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches. ASP-DAC 2007: 86-91 - [c44]Swaroop Ghosh, Swarup Bhunia, Kaushik Roy:
Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling. DATE 2007: 1532-1537 - [c43]Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid Mahmoodi, Swarup Bhunia:
Low-overhead design technique for calibration of maximum frequency at multiple operating points. ICCAD 2007: 401-404 - [c42]Somnath Paul, Swarup Bhunia:
Memory based computation using embedded cache for processor yield and reliability improvement. ICCD 2007: 341-346 - [c41]Somnath Paul, Rajat Subhra Chakraborty, Swarup Bhunia:
Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield. IOLTS 2007: 29-36 - [c40]Swaroop Ghosh, Patrick Ndai, Swarup Bhunia, Kaushik Roy:
Tolerance to Small Delay Defects by Adaptive Clock Stretching. IOLTS 2007: 244-252 - [c39]Yu Zhou, Shijo Thekkel, Swarup Bhunia:
Low power FPGA design using hybrid CMOS-NEMS approach. ISLPED 2007: 14-19 - [c38]Sivasubramaniam Krishnamurthy, Somnath Paul, Swarup Bhunia:
Adaptation to Temperature-Induced Delay Variations in Logic Circuits Using Low-Overhead Online Delay Calibration. ISQED 2007: 755-760 - [c37]Swarup Bhunia, Kaushik Roy:
Power dissipation, variations and nanoscale CMOS design: Test challenges and self-calibration/self-repair solutions. ITC 2007: 1-10 - [c36]Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy:
Process Variations and Process-Tolerant Design. VLSI Design 2007: 699-704 - [c35]Somnath Paul, Rajat Subhra Chakraborty, Swarup Bhunia:
VIm-Scan: A Low Overhead Scan Design Approach for Protection of Secret Key in Scan-Based Secure Chips. VTS 2007: 455-460 - [i2]Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy:
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies. CoRR abs/0710.4663 (2007) - [i1]Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits. CoRR abs/0710.4729 (2007) - 2006
- [j13]Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Modeling and analysis of loading effect on leakage of nanoscaled bulk-CMOS logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1486-1495 (2006) - [j12]Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy:
Delay Modeling and Statistical Design of Pipelined Circuit Under Process Variation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2427-2436 (2006) - [j11]Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy:
A Novel Delay Fault Testing Methodology Using Low-Overhead Built-In Delay Sensor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2934-2943 (2006) - [j10]Nilanjan Banerjee, Arijit Raychowdhury, Kaushik Roy, Swarup Bhunia, Hamid Mahmoodi:
Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 14(9): 1034-1039 (2006) - [c34]Ashish Goel, Swarup Bhunia, Hamid Mahmoodi-Meimand, Kaushik Roy:
Low-overhead design of soft-error-tolerant scan flip-flops with enhanced-scan capability. ASP-DAC 2006: 665-670 - [c33]Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy:
Speed binning aware design methodology to improve profit under parameter variations. ASP-DAC 2006: 712-717 - [c32]Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy:
Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies. DATE 2006: 856-861 - [c31]Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Meimand, Swarup Bhunia:
Low power synthesis of dynamic logic circuits using fine-grained clock gating. DATE 2006: 862-867 - [c30]Swaroop Ghosh, Swarup Bhunia, Kaushik Roy:
A new paradigm for low-power, variation-tolerant circuit synthesis using critical path isolation. ICCAD 2006: 619-624 - [c29]Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy:
Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor. IOLTS 2006: 31-36 - 2005
- [j9]Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy:
Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Supply Current. J. Electron. Test. 21(2): 147-159 (2005) - [j8]Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy:
Frequency Specification Testing of Analog Filters Using Wavelet Transform of Dynamic Supply Current. J. Electron. Test. 21(3): 243-255 (2005) - [j7]Swarup Bhunia, Animesh Datta, Nilanjan Banerjee, Kaushik Roy:
GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. IEEE Trans. Computers 54(6): 752-766 (2005) - [j6]Lih-Yih Chiou, Swarup Bhunia, Kaushik Roy:
Synthesis of application-specific highly efficient multi-mode cores for embedded systems. ACM Trans. Embed. Comput. Syst. 4(1): 168-188 (2005) - [j5]Swarup Bhunia, Hamid Mahmoodi-Meimand, Debjyoti Ghosh, Saibal Mukhopadhyay, Kaushik Roy:
Low-power scan design using first-level supply gating. IEEE Trans. Very Large Scale Integr. Syst. 13(3): 384-395 (2005) - [j4]Swarup Bhunia, Kaushik Roy:
A novel wavelet transform-based transient current analysis for fault detection and localization. IEEE Trans. Very Large Scale Integr. Syst. 13(4): 503-507 (2005) - [j3]Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy:
Computing with subthreshold leakage: device/circuit/architecture co-design for ultralow-power subthreshold operation. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1213-1224 (2005) - [j2]Qikai Chen, Hamid Mahmoodi-Meimand, Swarup Bhunia, Kaushik Roy:
Efficient testing of SRAM with optimized march sequences and a novel DFT technique for emerging failures due to process variations. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1286-1295 (2005) - [c28]Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy:
A Statistical Approach to Area-Constrained Yield Enhancement for Pipelined Circuits under Parameter Variations. Asian Test Symposium 2005: 170-175 - [c27]Swaroop Ghosh, Swarup Bhunia, Kaushik Roy:
Shannon Expansion Based Supply-Gated Logic for Improved Power and Testability. Asian Test Symposium 2005: 404-409 - [c26]Swarup Bhunia, Nilanjan Banerjee, Qikai Chen, Hamid Mahmoodi-Meimand, Kaushik Roy:
A novel synthesis approach for active leakage power reduction using dynamic supply gating. DAC 2005: 479-484 - [c25]Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits. DATE 2005: 224-229 - [c24]Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy:
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies. DATE 2005: 926-931 - [c23]Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Raychowdhury, Kaushik Roy:
A Novel Low-overhead Delay Testing Technique for Arbitrary Two-Pattern Test Application. DATE 2005: 1136-1141 - [c22]Arijit Raychowdhury, Swaroop Ghosh, Swarup Bhunia, Debjyoti Ghosh, Kaushik Roy:
A novel delay fault testing methodology using on-chip low-overhead delay measurement hardware at strategic probe points. ETS 2005: 108-113 - [c21]Nilanjan Banerjee, Arijit Raychowdhury, Swarup Bhunia, Hamid Mahmoodi-Meimand, Kaushik Roy:
Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis. ICCD 2005: 206-214 - [c20]Animesh Datta, Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Yield Prediction of High Performance Pipelined Circuit with Respect to Delay Failures in Sub-100nm Technology. IOLTS 2005: 275-280 - [c19]Amit Agarwal, Kunhyuk Kang, Swarup Bhunia, James D. Gallagher, Kaushik Roy:
Effectiveness of low power dual-Vt designs in nano-scale technologies under process parameter variations. ISLPED 2005: 14-19 - [c18]Animesh Datta, Swarup Bhunia, Nilanjan Banerjee, Kaushik Roy:
A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. ISQED 2005: 358-363 - [c17]Swarup Bhunia, Hamid Mahmoodi-Meimand, Debjyoti Ghosh, Kaushik Roy:
Power Reduction in Test-Per-Scan BIST with Supply Gating and Efficient Scan Partitioning. ISQED 2005: 453-458 - [c16]Qikai Chen, Hamid Mahmoodi-Meimand, Swarup Bhunia, Kaushik Roy:
Modeling and Testing of SRAM for New Failure Mechanisms Due to Process Variations in Nanoscale CMOS. VTS 2005: 292-297 - 2004
- [j1]Hai Li, Swarup Bhunia, Yiran Chen, Kaushik Roy, T. N. Vijaykumar:
DCG: deterministic clock-gating for low-power microprocessor design. IEEE Trans. Very Large Scale Integr. Syst. 12(3): 245-254 (2004) - [c15]Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy:
Trim Bit Setting of Analog Filters Using Wavelet-Based Supply Current Analysis. DATE 2004: 704-705 - [c14]Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Raychowdhury, Kaushik Roy:
First Level Hold: A Novel Low-Overhead Delay Fault Testing Technique. DFT 2004: 314-315 - [c13]Swarup Bhunia, Hamid Mahmoodi-Meimand, Saibal Mukhopadhyay, Debjyoti Ghosh, Kaushik Roy:
A Novel Low-Power Scan Design Technique Using Supply Gating. ICCD 2004: 60-65 - [c12]Debjyoti Ghosh, Swarup Bhunia, Kaushik Roy:
A Technique to Reduce Power and Test Application Time in BIST. IOLTS 2004: 182-183 - [c11]Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy:
Frequency Specification Testing of Analog Filters Using Wavelet Transform of Dynamic Supply Current. ISQED 2004: 389-394 - 2003
- [c10]Lih-Yih Chiou, Swarup Bhunia, Kaushik Roy:
Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications. DATE 2003: 10096-10103 - [c9]Debjyoti Ghosh, Swarup Bhunia, Kaushik Roy:
Multiple Scan Chain Design Technique for Power Reduction during Test Application in BIST. DFT 2003: 191-198 - [c8]Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy:
Deterministic Clock Gating for Microprocessor Power Reduction. HPCA 2003: 113-122 - 2002
- [c7]Swarup Bhunia, Hai Li, Kaushik Roy:
A High Performance IDDQ Testable Cache for Scaled CMOS Technologies. Asian Test Symposium 2002: 157- - [c6]Swarup Bhunia, Kaushik Roy, Jaume Segura:
A novel wavelet transform based transient current analysis for fault detection and localization. DAC 2002: 361-366 - [c5]Swarup Bhunia, Kaushik Roy:
Fault Detection and Diagnosis Using Wavelet Based Transient Current Analysis. DATE 2002: 1118 - [c4]Arijit Bishnu, Swarup Bhunia, C. A. Murthy, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya:
Content based image retrieval: related issues using Euler vector. ICIP (2) 2002: 585-588 - [c3]Swarup Bhunia, Kaushik Roy:
Dynamic Supply Current Testing of Analog Circuits Using Wavelet Transform. VTS 2002: 302-310 - 2000
- [c2]Swarup Bhunia, Subhashis Majumder, Ayan Sircar, Susmita Sur-Kolay, Bhargab B. Bhattacharya:
Topological Routing Amidst Polygonal Obstacles. VLSI Design 2000: 274-279
1990 – 1999
- 1999
- [c1]Swarup Bhunia, Soumya K. Ghosh, Pramod Kumar, Partha Pratim Das, Jayanta Mukherjee:
Design, Simulation and Synthesis of an ASIC for Fractal Image Compression. VLSI Design 1999: 544-547
Coauthor Index
Hamid Mahmoodi
aka: Hamid Mahmoodi-Meimand
aka: Hamid Mahmoodi-Meimand
[j53] [j52] [j44] [j37] [j35] [j24] [c73] [j20] [j19] [j18] [c50] [c47] [j17] [j15] [j14] [c44] [c40] [c37] [c36] [i2] [i1] [j13] [j12] [j11] [j10] [c34] [c33] [c32] [c31] [c30] [c29] [j9] [j8] [j7] [j6] [j5] [j4] [j3] [j2] [c28] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [j1] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c8] [c7] [c6] [c5] [c3]
Mark M. Tehranipoor
aka: Mohammad Tehranipoor
aka: Mohammad Tehranipoor
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