default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDAlex Orailoglu
Person information
- affiliation: University of California, San Diego, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j76]Alex Orailoglu, Marc Reichenbach, Matthias Jung:
Special Issue on SAMOS 2022. Int. J. Parallel Program. 52(1-2): 1-2 (2024)- [c205]Pushpak Raj Gautam, Alex Orailoglu:
Transcoders: A Better Alternative To Denoising Autoencoders. ETS 2024: 1-4 - 2023
- [j75]Elbruz Ozen
, Alex Orailoglu:
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation. IEEE Des. Test 40(2): 59-66 (2023) - [j74]Leon Li, Alex Orailoglu:
Redundancy Attack: Breaking Logic Locking Through Oracleless Rationality Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1044-1057 (2023) - [j73]Elbruz Ozen, Alex Orailoglu:
Unleashing the Potential of Sparse DNNs Through Synergistic Hardware-Sparsity Co-Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1147-1160 (2023) - [c204]Leon Li, Alex Orailoglu:
ClearLock: Deterring Hardware Reverse Engineering Attacks in a White-Box. ATS 2023: 1-6 - [c203]Leon Li, Alex Orailoglu:
Thwarting Reverse Engineering Attacks through Keyless Logic Obfuscation. VTS 2023: 1-6 - 2022
- [j72]Marc Reichenbach, Matthias Jung, Alex Orailoglu:
Guest Editorial: Special Issue on 2020 IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020). Int. J. Parallel Program. 50(2): 187-188 (2022) - [j71]Elbruz Ozen, Alex Orailoglu:
Architecting Decentralization and Customizability in DNN Accelerators for Hardware Defect Adaptation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3934-3945 (2022) - [c202]Leon Li, Alex Orailoglu:
JANUS-HD: Exploiting FSM Sequentiality and Synthesis Flexibility in Logic Obfuscation to Thwart SAT Attack While Offering Strong Corruption. DATE 2022: 1323-1328 - [e9]Alex Orailoglu, Matthias Jung, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 21st International Conference, SAMOS 2021, Virtual Event, July 4-8, 2021, Proceedings. Lecture Notes in Computer Science 13227, Springer 2022, ISBN 978-3-031-04579-0 [contents] - [e8]Alex Orailoglu, Marc Reichenbach, Matthias Jung:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings. Lecture Notes in Computer Science 13511, Springer 2022, ISBN 978-3-031-15073-9 [contents] - 2021
- [j70]Elbruz Ozen, Alex Orailoglu:
SNR: Squeezing Numerical Range Defuses Bit Error Vulnerability Surface in Deep Neural Networks. ACM Trans. Embed. Comput. Syst. 20(5s): 76:1-76:25 (2021) - [j69]Chris Nigh, Alex Orailoglu:
AdaTrust: Combinational Hardware Trojan Detection Through Adaptive Test Pattern Construction. IEEE Trans. Very Large Scale Integr. Syst. 29(3): 544-557 (2021) - [c201]Leon Li, Shuyi Ni, Alex Orailoglu:
JANUS: Boosting Logic Obfuscation Scope Through Reconfigurable FSM Synthesis. HOST 2021: 292-303 - [c200]Elbruz Ozen, Alex Orailoglu:
Evolving Complementary Sparsity Patterns for Hardware-Friendly Inference of Sparse DNNs. ICCAD 2021: 1-8 - 2020
- [j68]Elbruz Ozen, Alex Orailoglu:
Low-Cost Error Detection in Deep Neural Network Accelerators with Linear Algorithmic Checksums. J. Electron. Test. 36(6): 703-718 (2020) - [j67]Elbruz Ozen, Alex Orailoglu:
Boosting Bit-Error Resilience of DNN Accelerators Through Median Feature Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3250-3262 (2020) - [c199]Elbruz Ozen, Alex Orailoglu:
Concurrent Monitoring of Operational Health in Neural Networks Through Balanced Output Partitions. ASP-DAC 2020: 169-174 - [c198]Nickolai Verchok, Alex Orailoglu:
Hunting Sybils in Participatory Mobile Consensus-Based Networks. AsiaCCS 2020: 732-743 - [c197]Chris Nigh, Alex Orailoglu:
Test Pattern Superposition to Detect Hardware Trojans. DATE 2020: 25-30 - [c196]Chengmo Yang, Patrick Cronin, Agamyrat Agambayev, Sule Ozev, A. Enis Çetin, Alex Orailoglu:
A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor Calibration. ICCAD 2020: 8:1-8:9 - [c195]Elbruz Ozen, Alex Orailoglu:
Just Say Zero: Containing Critical Bit-Error Propagation in Deep Neural Networks With Anomalous Feature Suppression. ICCAD 2020: 75:1-75:9 - [c194]Elbruz Ozen, Alex Orailoglu:
Squeezing Correlated Neurons for Resource-Efficient Deep Neural Networks. ECML/PKDD (2) 2020: 52-68 - [c193]Chris Nigh, Alex Orailoglu:
Taming Combinational Trojan Detection Challenges with Self-Referencing Adaptive Test Patterns. VTS 2020: 1-6 - [e7]Alex Orailoglu, Matthias Jung, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 20th International Conference, SAMOS 2020, Samos, Greece, July 5-9, 2020, Proceedings. Lecture Notes in Computer Science 12471, Springer 2020, ISBN 978-3-030-60938-2 [contents] - [i2]Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks:
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR abs/2006.06806 (2020)
2010 – 2019
- 2019
- [j66]Diaa Badawi, Tuba Ayhan, Sule Ozev, Chengmo Yang, Alex Orailoglu, Ahmet Enis Çetin:
Detecting Gas Vapor Leaks Using Uncalibrated Sensors. IEEE Access 7: 155701-155710 (2019) - [c192]Elbruz Ozen, Alex Orailoglu:
The Return of Power Gating: Smart Leakage Energy Reductions in Modern Out-of-Order Processor Architectures. ARCS 2019: 253-266 - [c191]Elbruz Ozen, Alex Orailoglu:
Sanity-Check: Boosting the Reliability of Safety-Critical Deep Neural Network Applications. ATS 2019: 7-12 - [c190]Leon Li, Alex Orailoglu:
Piercing Logic Locking Keys through Redundancy Identification. DATE 2019: 540-545 - [c189]Diaa Badawi, Sule Ozev, Jennifer Blain Christen, Chengmo Yang, Alex Orailoglu, A. Enis Çetin:
Detecting Gas Vapor Leaks through Uncalibrated Sensor Based CPS. ICASSP 2019: 8296-8300 - [c188]Leon Li, Alex Orailoglu:
Shielding Logic Locking from Redundancy Attacks. VTS 2019: 1-6 - [i1]Diaa Badawi, Tuba Ayhan, Sule Ozev, Chengmo Yang, Alex Orailoglu, A. Enis Çetin:
Detecting Gas Vapor Leaks Using Uncalibrated Sensors. CoRR abs/1908.07619 (2019) - 2018
- [c187]Fakir Sharif Hossain, Michihiro Shintani, Michiko Inoue, Alex Orailoglu:
Variation-Aware Hardware Trojan Detection through Power Side-channel. ITC 2018: 1-10 - 2017
- [c186]Joshua Marxen, Alex Orailoglu:
Ensuring system security through proximity based authentication. ASP-DAC 2017: 330-335 - [c185]Fakir Sharif Hossain, Tomokazu Yoneda, Michihiro Shintani, Michiko Inoue, Alex Orailoglu:
Intra-Die-Variation-Aware Side Channel Analysis for Hardware Trojan Detection. ATS 2017: 52-57 - [c184]Fakir Sharif Hossain, Tomokazu Yoneda, Michiko Inoue, Alex Orailoglu:
Detecting hardware Trojans without a Golden IC through clock-tree defined circuit partitions. ETS 2017: 1-6 - 2016
- [j65]Baris Arslan, Alex Orailoglu:
Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(1): 141-154 (2016) - [j64]Baris Arslan, Alex Orailoglu:
Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(12): 2093-2103 (2016) - 2015
- [j63]Mengying Zhao, Alex Orailoglu, Chun Jason Xue:
Joint Profit and Process Variation Aware High Level Synthesis With Speed Binning. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1640-1650 (2015) - [c183]Garo Bournoutian, Alex Orailoglu:
Mobile Ecosystem Driven Dynamic Pipeline Adaptation for Low Power. ARCS 2015: 83-95 - [c182]Garo Bournoutian, Alex Orailoglu:
Mobile ecosystem driven application-specific low-power control microarchitecture. ICCD 2015: 720-727 - [e6]Alex Orailoglu, H. Fatih Ugurdag, Luís Miguel Silveira, Martin Margala, Ricardo Reis:
VLSI-SoC: At the Crossroads of Emerging Trends - 21st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2013, Istanbul, Turkey, October 6-9, 2013, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 461, Springer 2015, ISBN 978-3-319-23798-5 [contents] - 2014
- [j62]Keni Qiu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu:
Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems. ACM Trans. Embed. Comput. Syst. 13(5s): 156:1-156:24 (2014) - [j61]Mingjing Chen, Alex Orailoglu:
Examining Timing Path Robustness Under Wide-Bandwidth Power Supply Noise Through Multi-Functional-Cycle Delay Test. IEEE Trans. Very Large Scale Integr. Syst. 22(4): 734-746 (2014) - [c181]Garo Bournoutian, Alex Orailoglu:
On-device objective-C application optimization framework for high-performance mobile processors. DATE 2014: 1-6 - [c180]Chenchen Fu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu:
Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. ISLPED 2014: 75-80 - 2013
- [j60]Garo Bournoutian, Alex Orailoglu:
Application-aware adaptive cache architecture for power-sensitive mobile processors. ACM Trans. Embed. Comput. Syst. 13(3): 41:1-41:26 (2013) - [j59]Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li:
Register allocation for embedded systems to simultaneously reduce energy and temperature on registers. ACM Trans. Embed. Comput. Syst. 13(3): 50:1-50:26 (2013) - [c179]Baris Arslan, Alex Orailoglu:
Full exploitation of process variation space for continuous delivery of optimal delay test quality. ASP-DAC 2013: 552-557 - [c178]Mengying Zhao, Alex Orailoglu, Chun Jason Xue:
Profit maximization through process variation aware high level synthesis with speed binning. DATE 2013: 176-181 - [c177]Keni Qiu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu:
Branch Prediction directed Dynamic instruction Cache Locking for embedded systems. RTCSA 2013: 209-216 - [c176]Baris Arslan, Alex Orailoglu:
Tracing the best test mix through multi-variate quality tracking. VTS 2013: 1-6 - [c175]Raymond Paseman, Alex Orailoglu:
Towards a cost-effective hardware trojan detection methodology. VTS 2013: 1-3 - [e5]Martin Margala, Ricardo Augusto da Luz Reis, Alex Orailoglu, Luigi Carro, Luís Miguel Silveira, H. Fatih Ugurdag:
21st IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2013, Istanbul, Turkey, October 7-9, 2013. IEEE 2013, ISBN 978-1-4799-0522-5 [contents] - 2012
- [j58]Chengmo Yang, Alex Orailoglu:
Tackling Resource Variations Through Adaptive Multicore Execution Frameworks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(1): 132-145 (2012) - [j57]Mingjing Chen, Alex Orailoglu:
On Diagnosis of Timing Failures in Scan Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(7): 1102-1115 (2012) - [j56]Mingjing Chen, Alex Orailoglu:
Scan Power Reduction for Linear Test Compression Schemes Through Seed Selection. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2170-2183 (2012) - [c174]Garo Bournoutian, Alex Orailoglu:
Dynamic transient fault detection and recovery for embedded processor datapaths. CODES+ISSS 2012: 43-52 - [c173]Baris Arslan, Alex Orailoglu:
Delay test resource allocation and scheduling for multiple frequency domains. VTS 2012: 114-119 - [c172]Francisco J. Galarza-Medina, Jose Luis Garcia-Gervacio, Víctor H. Champac, Alex Orailoglu:
Small-delay defects detection under process variation using Inter-Path Correlation. VTS 2012: 127-132 - 2011
- [j55]Wenjing Rao, Chengmo Yang, Ramesh Karri, Alex Orailoglu:
Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge. Computer 44(2): 46-53 (2011) - [j54]Yuping Zhang, Chun Jason Xue, Chengmo Yang, Alex Orailoglu:
Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability. J. Parallel Distributed Comput. 71(10): 1400-1410 (2011) - [j53]Chengmo Yang, Alex Orailoglu:
Full Fault Resilience and Relaxed Synchronization Requirements at the Cache-Memory Interface. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 1996-2009 (2011) - [c171]Baris Arslan, Alex Orailoglu:
Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost. Asian Test Symposium 2011: 323-328 - [c170]Garo Bournoutian, Alex Orailoglu:
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors. CODES+ISSS 2011: 89-98 - [c169]Mingjing Chen, Alex Orailoglu:
Diagnosing scan clock delay faults through statistical timing pruning. DAC 2011: 423-428 - [c168]Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li:
Register allocation for simultaneous reduction of energy and peak temperature on registers. DATE 2011: 20-25 - [c167]Mingjing Chen, Alex Orailoglu:
Diagnosing scan chain timing faults through statistical feature analysis of scan images. DATE 2011: 185-190 - [c166]Chengmo Yang, Alex Orailoglu:
Frugal but flexible multicore topologies in support of resource variation-driven adaptivity. DATE 2011: 1255-1260 - [c165]Baris Arslan, Alex Orailoglu:
Adaptive test optimization through real time learning of test effectiveness. DATE 2011: 1430-1435 - 2010
- [j52]Chengmo Yang, Mingjing Chen, Alex Orailoglu:
Squashing code size in microcoded IPs while delivering high decompression speed. Des. Autom. Embed. Syst. 14(3): 265-284 (2010) - [j51]Garo Bournoutian, Alex Orailoglu:
Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions. Des. Autom. Embed. Syst. 14(3): 309-326 (2010) - [j50]Sunghoon Chun, Alex Orailoglu:
DiSC: A New Diagnosis Method for Multiple Scan Chain Failures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(12): 2051-2055 (2010) - [c164]Garo Bournoutian, Alex Orailoglu:
Dynamic, non-linear cache architecture for power-sensitive mobile processors. CODES+ISSS 2010: 187-194 - [c163]Kwangyoon Lee, Alex Orailoglu:
High durability in NAND flash memory through effective page reuse mechanisms. CODES+ISSS 2010: 205-212 - [c162]Mingjing Chen, Alex Orailoglu:
Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme. DATE 2010: 63-68 - [c161]Raid Ayoub, Alex Orailoglu:
Performance and energy efficient cache migrationapproach for thermal management in embedded systems. ACM Great Lakes Symposium on VLSI 2010: 365-368 - [c160]Baris Arslan, Alex Orailoglu:
Delay test quality maximization through process-aware selection of test set size. ICCD 2010: 390-395 - [c159]Chengmo Yang, Alex Orailoglu:
Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations. VLSI-SoC 2010: 396-401 - [c158]Chengmo Yang, Chun Jason Xue, Alex Orailoglu:
Fine-grained adaptive CMP cache sharing through access history exploitation. VLSI-SoC 2010: 420-425 - [c157]Mingjing Chen, Alex Orailoglu:
VDDmin test optimization for overscreening minimization through adaptive scan chain masking. VTS 2010: 313-318 - [e4]João Antonio Martino, Guido Araujo, Alex Orailoglu, Felipe Klein:
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2010, São Paulo, Brazil, September 6-9, 2010. ACM 2010, ISBN 978-1-4503-0152-7 [contents]
2000 – 2009
- 2009
- [j49]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Logic Mapping in Crossbar-Based Nanoarchitectures. IEEE Des. Test Comput. 26(1): 68-77 (2009) - [j48]Ozgur Sinanoglu, Mohammed Al-Mulla, Noora A. Shunaiber, Alex Orailoglu:
Scan Cell Positioning for Boosting the Compression of Fan-Out Networks. J. Comput. Sci. Technol. 24(5): 939-948 (2009) - [j47]Dong Xiang, Dianwei Hu, Qiang Xu, Alex Orailoglu:
Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(7): 1101-1105 (2009) - [j46]Alex Orailoglu, Laura Pozzi:
Guest Editorial Special Section on the IEEE Symposium on Application Specific Processors 2008. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(12): 1786-1787 (2009) - [c156]Raid Ayoub, Alex Orailoglu:
Filtering Global History: Power and Performance Efficient Branch Predictor. ASAP 2009: 203-206 - [c155]Garo Bournoutian, Alex Orailoglu:
Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions. CASES 2009: 117-126 - [c154]Chengmo Yang, Mingjing Chen, Alex Orailoglu:
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses. CODES+ISSS 2009: 249-256 - [c153]Chengmo Yang, Alex Orailoglu:
Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude. DATE 2009: 63-68 - [c152]Saturnino Garcia, Alex Orailoglu:
Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy. DATE 2009: 898-901 - [c151]Mingjing Chen, Alex Orailoglu:
Flip-Flop Hardening and Selection for Soft Error and Delay Fault Resilience. DFT 2009: 49-57 - [c150]Chengmo Yang, Alex Orailoglu:
Processor reliability enhancement through compiler-directed register file peak temperature reduction. DSN 2009: 468-477 - [c149]Mingjing Chen, Alex Orailoglu:
Deflecting crosstalk by routing reconsideration through refined signal correlation estimation. ACM Great Lakes Symposium on VLSI 2009: 369-374 - [c148]Mingjing Chen, Alex Orailoglu:
Scan power reduction in linear test data compression scheme. ICCAD 2009: 78-82 - 2008
- [j45]Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara:
Scheduling Power-Constrained Tests through the SoC Functional Bus. IEICE Trans. Inf. Syst. 91-D(3): 736-746 (2008) - [c147]Chengmo Yang, Alex Orailoglu:
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization. CASES 2008: 11-20 - [c146]Kwangyoon Lee, Alex Orailoglu:
Application specific non-volatile primary memory for embedded systems. CODES+ISSS 2008: 31-36 - [c145]Garo Bournoutian, Alex Orailoglu:
Miss reduction in embedded processors through dynamic, power-friendly cache design. DAC 2008: 304-309 - [c144]Wenjing Rao, Alex Orailoglu:
Towards fault tolerant parallel prefix adders in nanoelectronic systems. DATE 2008: 360-365 - [c143]Mingjing Chen, Alex Orailoglu:
Test cost minimization through adaptive test development. ICCD 2008: 234-239 - [c142]Saturnino Garcia, Alex Orailoglu:
Online test and fault-tolerance for nanoelectronic programmable logic arrays. NANOARCH 2008: 8-15 - [c141]Wenjing Rao, Alex Orailoglu, Keith Marzullo:
Locality aware redundancy allocation in nanoelectronic systems. NANOARCH 2008: 24-31 - [c140]Kwangyoon Lee, Alex Orailoglu:
Application Specific Low Latency Instruction Cache for NAND Flash Memory Based Embedded Systems. SASP 2008: 69-74 - 2007
- [j44]R. Iris Bahar, Dan W. Hammerstrom, Justin E. Harlow III, William H. Joyner Jr., Clifford Lau, Diana Marculescu, Alex Orailoglu, Massoud Pedram:
Architectures for Silicon Nanoelectronics and Beyond. Computer 40(1): 25-33 (2007) - [j43]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Towards Nanoelectronics Processor Architectures. J. Electron. Test. 23(2-3): 235-254 (2007) - [j42]Peter Petrov, Alex Orailoglu:
Dynamic Tag Reduction for Low-Power Caches in Embedded Systems with Virtual Memory. Int. J. Parallel Program. 35(2): 157-177 (2007) - [j41]Yiorgos Makris, Alex Orailoglu:
On the identification of modular test requirements for low cost hierarchical test path construction. Integr. 40(3): 315-325 (2007) - [j40]Clifford Lau, Alex Orailoglu, Kaushik Roy:
Guest Editorial. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2342-2344 (2007) - [c139]Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara:
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses. ASP-DAC 2007: 720-725 - [c138]Mingjing Chen, Alex Orailoglu:
Improving Circuit Robustness with Cost-Effective Soft-Error-Tolerant Sequential Elements. ATS 2007: 307-312 - [c137]Chengmo Yang, Alex Orailoglu:
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs. CASES 2007: 150-154 - [c136]