ISQED 2005: San Jose, California, USA

Tutorial I

Tutorial II

Session EP1- Panel

Plenary Session 1P

Session 1A: Tools and Flows for Quality Design

Session 1B: High Level Power/Noise Reduction Techniques

Session 1C: Leakage and Dynamic Power Issues

Session 1D: Poster Session

ISQED Luncheon Speech

Session 2A: Test Application and Cost Reduction

Session 2B: DFM and Physical Layout

Session 2C: Performance and Reliability Analysis for Yield Optimization

Session 3A: Functional Verification and Test Generation

Session 3B: Power Delivery and Distribution

Session 3C: Quality System Level Design and Synthesis

Session 4A: DFM for Circuit Design

Session 4B: Leakage and Reliability Management

Session 4C: Analog Test and BIST

Session EP2

Plenary Session 2P

Session 5A: Design Methods and Tools in DSM

Session 5B: Design Techniques for Leakage Reduction

Session 5C: Variability Issues in Nanoscale Circuits

Session 6A: Issues in Noise and Timing

Session 6B: Design Approaches for System in Package (SiP)

Session 6C: DSM Interconnect Issues

Session 7A: Advances in Floor Planning

Session 7B: Issues in On-Chip Communication and Analog/RF Designs

Session 7C: Robust Design under Parameter Variations

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