24. FPGA 2016: Monterey, CA, USA

Workshop on Overlay Architectures for FPGAs

Designers' Day Session 1: Hardware Features

Designers' Day Session 2: System Level Methodology

Technical Session 1: Neural Networks and OpenCL

Technical Session 2: Cooling and Clocking

Technical Session 3: Circuit Design, Graph Processing Applications

Technical Session 4: Applications and System-level Tools

Evening Panel

Technical Session 5: Architecture and Tools

Technical Session 6: System-level Tools

Technical Session 7: High-level Synthesis and Tools

Technical Session 8: Applications

Poster Session 1

Poster Session 2

Poster Session 3

maintained by Schloss Dagstuhl LZI at University of Trier