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ORCIDMary Jane Irwin
Person information
- affiliation: Penn State, University Park, USA
- award (2010): ACM Athena Lecturer
- award (2007): Anita Borg Institute Women of Vision Awards
- award (2005): ACM Distinguished Service Award
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2010 – 2019
- 2016
[j94]Mary Jane Irwin, Soha Hassoun:
Steven P. Levitan (1950-2016). IEEE Des. Test 33(3): 142-143 (2016)- [c263]Hsiang-Yun Cheng
, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie:
LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches. ISCA 2016: 103-114 - [c262]Meng-Fan Chang, Ching-Hao Chuang, Yen-Ning Chiang, Shyh-Shyuan Sheu, Chia-Chen Kuo, Hsiang-Yun Cheng, John Sampson, Mary Jane Irwin:
Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell. ISCAS 2016: 1142-1145 - [i3]Mark D. Hill, Sarita V. Adve, Luis Ceze, Mary Jane Irwin, David R. Kaeli, Margaret Martonosi, Josep Torrellas, Thomas F. Wenisch, David A. Wood, Katherine A. Yelick:
21st Century Computer Architecture. CoRR abs/1609.06756 (2016) - 2015
- [j93]Hsiang-Yun Cheng, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie:
EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors. ACM Trans. Archit. Code Optim. 12(2): 17:1-17:22 (2015) - [j92]Hsiang-Yun Cheng, Mary Jane Irwin, Yuan Xie:
Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference. ACM Trans. Design Autom. Electr. Syst. 21(1): 7:1-7:26 (2015) - [c261]Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin:
TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability. Conf. Computing Frontiers 2015: 16:1-16:8 - [c260]Hsiang-Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson, Mary Jane Irwin:
Core vs. uncore: the heart of darkness. DAC 2015: 121:1-121:6 - [c259]Mi Sun Park, Omesh Tickoo, Vijaykrishnan Narayanan, Mary Jane Irwin, Ravi Iyer:
Platform-aware dynamic configuration support for efficient text processing on heterogeneous system. DATE 2015: 1503-1508 - 2014
- [c258]Hsiang-Yun Cheng, Matthew Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie:
EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors. ISLPED 2014: 303-306 - 2013
- [j91]Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Design of energy-efficient circuits and systems using tunnel field effect transistors. IET Circuits Devices Syst. 7(5): 294-303 (2013) - [c257]Wei Ding, Jun Liu, Mahmut T. Kandemir, Mary Jane Irwin:
Reshaping cache misses to improve row-buffer locality in multicore systems. PACT 2013: 235-244 - 2012
- [c256]Akbar Sharifi, Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin:
Courteous cache sharing: being nice to others in capacity management. DAC 2012: 678-687 - [c255]Hui Zhao, Ohyoung Jang, Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Mary Jane Irwin:
A hybrid NoC design for cache coherence optimization for chip multiprocessors. DAC 2012: 834-842 - [c254]Mi Sun Park, Srinidhi Kestur, Jagdish Sabarad, Vijaykrishnan Narayanan, Mary Jane Irwin:
An FPGA-based accelerator for cortical object classification. DATE 2012: 691-696 - [c253]Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Ultra Low Power Circuit Design Using Tunnel FETs. ISVLSI 2012: 153-158 - [c252]Wei Wang, Tanima Dey, Ryan W. Moore, Mahmut Aktasoglu, Bruce R. Childers, Jack W. Davidson, Mary Jane Irwin, Mahmut T. Kandemir, Mary Lou Soffa:
REEact: a customizable virtual execution manager for multicore platforms. VEE 2012: 27-38 - 2011
- [j90]Guiling Wang, Mary Jane Irwin, Haoying Fu, Piotr Berman, Wensheng Zhang, Tom La Porta:
Optimizing sensor movement planning for energy efficiency. ACM Trans. Sens. Networks 7(4): 33:1-33:17 (2011) - [c251]Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie:
MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy. HPCA 2011: 231-242 - [c250]Hui Zhao, Mahmut T. Kandemir, Wei Ding, Mary Jane Irwin:
Exploring heterogeneous NoC design space. ICCAD 2011: 787-793 - [c249]Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin:
Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs. ISQED 2011: 495-501 - 2010
- [j89]Mary Jane Irwin:
Technology scaling redirects main memories: technical perspective. Commun. ACM 53(7): 98 (2010) - [j88]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
On-chip memory space partitioning for chip multiprocessors using polyhedral algebra. IET Comput. Digit. Tech. 4(6): 484-498 (2010) - [j87]Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin:
On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. 7(3): 240-254 (2010) - [j86]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Total Power Optimization for Combinational Logic Using Genetic Algorithms. J. Signal Process. Syst. 58(2): 145-160 (2010) - [c248]Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan, Vijaykrishnan Narayanan, Mary Jane Irwin, Ramakrishnan Krishnan:
Optimizing power and performance for reliable on-chip networks. ASP-DAC 2010: 431-436 - [c247]Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan:
Dynamic core partitioning for energy efficiency. IPDPS Workshops 2010: 1-8 - [c246]Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin:
T-NUCA - a novel approach to non-uniform access latency cache architectures for 3D CMPs. IPDPS Workshops 2010: 1-8 - [c245]Mary Jane Irwin:
Shared caches in multicores: the good, the bad, and the ugly. ISCA 2010: 234 - [c244]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Sri Hari Krishna Narayanan:
Compiler directed network-on-chip reliability enhancement for chip multiprocessors. LCTES 2010: 85-94 - [c243]Mahmut T. Kandemir, Taylan Yemliha, Sai Prashanth Muralidhara, Shekhar Srikantaiah, Mary Jane Irwin, Yuanrui Zhang:
Cache topology aware computation mapping for multicores. PLDI 2010: 74-85
2000 – 2009
- 2009
- [j85]Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin:
Adapting application execution in CMPs using helper threads. J. Parallel Distributed Comput. 69(9): 790-806 (2009) - [j84]Madhu Mutyam, Feng Wang, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin:
Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers 58(7): 865-877 (2009) - [j83]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
Using Data Compression for Increasing Memory System Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(6): 901-914 (2009) - [j82]Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu:
Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. IEEE Trans. Dependable Secur. Comput. 6(3): 202-216 (2009) - [j81]Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Compiler-assisted soft error detection under performance and energy constraints in embedded systems. ACM Trans. Embed. Comput. Syst. 8(4): 27:1-27:30 (2009) - [c242]Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin:
Arithmetic unit design using 180nm TSV-based 3D stacking technology. 3DIC 2009: 1-4 - [c241]Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan:
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. HiPEAC 2009: 231-247 - [c240]Aditya Yanamandra, Mary Jane Irwin, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Sri Hari Krishna Narayanan:
In-Network Caching for Chip Multiprocessors. HiPEAC 2009: 373-388 - [c239]Yuan Xie, Soumya Eachempati, Aditya Yanamandra, Vijaykrishnan Narayanan, Mary Jane Irwin:
Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network. NANOARCH 2009: 51-56 - [e8]Mary Lou Soffa, Mary Jane Irwin:
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009. ACM 2009, ISBN 978-1-60558-406-5 [contents] - 2008
- [j80]Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari:
Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Secur. Comput. 5(2): 115-127 (2008) - [j79]Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Design Space Exploration for 3-D Cache. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 444-455 (2008) - [c238]Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin:
Adaptive set pinning: managing shared caches in chip multiprocessors. ASPLOS 2008: 135-144 - [c237]Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin:
Analysis and solutions to issue queue process variation. DSN 2008: 11-21 - [c236]Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim:
A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398 - [c235]Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kandemir, Mustafa Karaköy, Mary Jane Irwin:
Integrated code and data placement in two-dimensional mesh based chip multiprocessors. ICCAD 2008: 583-588 - [c234]Sayaka Akioka, Feihui Li, Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin:
Ring data location prediction scheme for Non-Uniform Cache Architectures. ICCD 2008: 693-698 - [c233]Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin:
A helper thread based EDP reduction scheme for adapting application execution in CMPs. IPDPS 2008: 1-14 - [c232]Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin, Konrad Malkowski:
Managing power, performance and reliability trade-offs. IPDPS 2008: 1-5 - [c231]Aditya Yanamandra, Bryan Cover, Padma Raghavan, Mary Jane Irwin, Mahmut T. Kandemir:
Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. IPDPS 2008: 1-10 - [c230]Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu:
Hierarchical Soft Error Estimation Tool (HSEET). ISQED 2008: 680-683 - [c229]Mahmut T. Kandemir, Feihui Li, Mary Jane Irwin, Seung Woo Son:
A novel migration-based NUCA design for chip multiprocessors. SC 2008: 28 - [c228]Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin:
Implementation and evaluation of a migration-based NUCA design for chip multiprocessors. SIGMETRICS 2008: 449-450 - 2007
- [j78]Ronald F. Boisvert, Mary Jane Irwin, Holly E. Rushmeier:
Evolving the ACM journal distribution program. Commun. ACM 50(9): 19-20 (2007) - [j77]Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir:
Optimising power efficiency in trace cache fetch unit. IET Comput. Digit. Tech. 1(4): 334-348 (2007) - [j76]Feng Wang, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
On-chip bus thermal analysis and optimisation. IET Comput. Digit. Tech. 1(5): 590-599 (2007) - [j75]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems 31(5): 293-301 (2007) - [j74]Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. 49(1): 87-99 (2007) - [c227]Sayaka Akioka, Feihui Li, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin:
Ring Prediction for Non-Uniform Cache Architectures. PACT 2007: 401 - [c226]S. Conner, Sayaka Akioka, Mary Jane Irwin, Padma Raghavan:
Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets. IPDPS 2007: 1-8 - [c225]Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin:
Load Miss Prediction - Exploiting Power Performance Trade-offs. IPDPS 2007: 1-8 - [c224]Konrad Malkowski, Padma Raghavan, Mary Jane Irwin:
Memory Optimizations For Fast Power-Aware Sparse Computations. IPDPS 2007: 1-6 - [c223]Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin:
Phase-aware adaptive hardware selection for power-efficient scientific computations. ISLPED 2007: 403-406 - [c222]Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Variation Analysis of CAM Cells. ISQED 2007: 333-338 - [c221]Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Variation Impact on SER of Combinational Circuits. ISQED 2007: 911-916 - [c220]Andrew J. Ricketts, Madhu Mutyam, Narayanan Vijaykrishnan, Mary Jane Irwin:
Investigating Simple Low Latency Reliable Multiported Register Files. ISVLSI 2007: 375-382 - [c219]Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Architecting Microprocessor Components in 3D Design Space. VLSI Design 2007: 103-108 - [c218]Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin:
Impact of NBTI on FPGAs. VLSI Design 2007: 717-722 - [i2]Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems. CoRR abs/0710.4660 (2007) - [i1]Yuh-Fang Tsai, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network. CoRR abs/0710.4731 (2007) - 2006
- [j73]Ronald F. Boisvert, Mary Jane Irwin:
Plagiarism on the rise. Commun. ACM 49(6): 23-24 (2006) - [j72]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf:
An efficient architecture for motion estimation and compensation in the transform domain. IEEE Trans. Circuits Syst. Video Technol. 16(2): 191-201 (2006) - [j71]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin:
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. IEEE Trans. Circuits Syst. Video Technol. 16(5): 655-662 (2006) - [j70]Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embed. Comput. Syst. 5(1): 1-28 (2006) - [j69]Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam:
Reducing code size through address register assignment. ACM Trans. Embed. Comput. Syst. 5(1): 225-258 (2006) - [j68]Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli:
Block-based frequency scalable technique for efficient hierarchical coding. IEEE Trans. Signal Process. 54(7): 2559-2566 (2006) - [c217]Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Object duplication for improving reliability. ASP-DAC 2006: 140-145 - [c216]Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin:
Priority scheduling in digital microfluidics-based biochips. DATE 2006: 329-334 - [c215]Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary Jane Irwin, Ibrahim Kolcu:
Activity clustering for leakage management in SPMs. DATE 2006: 696-697 - [c214]Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
On-chip bus thermal analysis and optimization. DATE 2006: 850-855 - [c213]Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris:
Characterizing the Performance and Energy Attributes of Scientific Simulations. International Conference on Computational Science (1) 2006: 242-249 - [c212]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun:
Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. ICPADS (1) 2006: 383-390 - [c211]Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin:
Enhancing L2 organization for CMPs with a center cell. IPDPS 2006 - [c210]Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin:
On improving performance and energy profiles of sparse scientific applications. IPDPS 2006 - [c209]Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin:
Conjugate gradient sparse solvers: performance-power characteristics. IPDPS 2006 - [c208]Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED 2006: 98-104 - [c207]Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin:
A Parallel Architecture for Hardware Face Detection. ISVLSI 2006: 452-453 - [c206]Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Compiler-directed thermal management for VLIW functional units. LCTES 2006: 163-172 - [c205]Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin:
Reducing NoC energy consumption through compiler-directed channel voltage scaling. PLDI 2006: 193-203 - [c204]S. Conner, Greg M. Link, S. Tobita, Mary Jane Irwin, Padma Raghavan:
Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. SC 2006: 138 - [c203]Konrad Malkowski, Padma Raghavan, Mary Jane Irwin:
Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. SC 2006: 146 - [c202]R. Rajaraman, Jungsub Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design 2006: 499-502 - [e7]Mary Jane Irwin, Koen De Bosschere:
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006. ACM 2006, ISBN 1-59593-362-X [contents] - 2005
- [j67]Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin:
Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. Adv. Comput. 63: 36-92 (2005) - [j66]Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli:
Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. 22(5): 434-442 (2005) - [j65]Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin:
Symmetric encryption in reconfigurable and custom hardware. Int. J. Embed. Syst. 1(3/4): 205-217 (2005) - [j64]Mary Jane Irwin, Narayanan Vijaykrishnan:
Editorial. ACM J. Emerg. Technol. Comput. Syst. 1(1): 1-6 (2005) - [j63]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
An integer linear programming-based tool for wireless sensor networks. J. Parallel Distributed Comput. 65(3): 247-260 (2005) - [j62]Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das:
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. IEEE Trans. Computers 54(6): 660-671 (2005) - [j61]Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam:
Compiler-directed high-level energy estimation and optimization. ACM Trans. Embed. Comput. Syst. 4(4): 819-850 (2005) - [j60]Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Analyzing data reuse for cache reconfiguration. ACM Trans. Embed. Comput. Syst. 4(4): 851-876 (2005) - [j59]Mahmut T. Kandemir, Mary Jane Irwin, Guangyu Chen, Ibrahim Kolcu:
Compiler-guided leakage optimization for banked scratch-pad memories. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1136-1146 (2005) - [j58]Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Soft errors issues in low-power caches. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1157-1166 (2005) - [c201]Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Designing reliable circuit in the presence of soft errors. ASP-DAC 2005: 1 - [c200]G. Chen, Mahmut T. Kandemir, Mary Jane Irwin, Gokhan Memik:
Compiler-directed selective data protection against soft errors. ASP-DAC 2005: 713-716 - [c199]Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaköy:
Customized on-chip memories for embedded chip multiprocessors. ASP-DAC 2005: 743-748 - [c198]Feihui Li, Guangyu Chen, Mahmut T. Kandemir, Mary Jane Irwin:
Compiler-directed proactive power management for networks. CASES 2005: 137-146 - [c197]Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression. CODES+ISSS 2005: 87-92 - [c196]Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane Irwin:
Exploring technology alternatives for nano-scale FPGA interconnects. DAC 2005: 921-926 - [c195]Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network. DATE 2005: 230-231 - [c194]