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ORCIDPACT 2013: Edinburgh, UK
- Christian Fensch, Michael F. P. O'Boyle, André Seznec, François Bodin:
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, Edinburgh, United Kingdom, September 7-11, 2013. IEEE Computer Society 2013, ISBN 978-1-4799-1018-2 - Michael F. P. O'Boyle, Christian Fensch:
General chairs' welcome message. - André Seznec, François Bodin:
Message from the program chairs. - David J. Kuck:
Keynote talk: A comprehensive approach to HW/SW codesign. 1 - Calin Cascaval:
Keynote talk: Parallel programming for mobile computing. 3 - Per Stenström:
Keynote talk: Towards automatic resource management in parallel architectures. 5
Session 1A: Compilers
- Herbert Jordan, Simone Pellegrini, Peter Thoman, Klaus Kofler, Thomas Fahringer
:
INSPIRE: The insieme parallel intermediate representation. 7-17 - Vaivaswatha Nagaraj, R. Govindarajan:
Parallel flow-sensitive pointer analysis by graph-rewriting. 19-28 - Rajkishore Barik, Jisheng Zhao, Vivek Sarkar:
Interprocedural strength reduction of critical sections in explicitly-parallel programs. 29-40
Session 1B: Power & Energy
- Filippo Sironi, Martina Maggio, Riccardo Cattaneo, Giovanni F. Del Nero, Donatella Sciuto, Marco D. Santambrogio:
ThermOS: System support for dynamic thermal management of chip multi-processors. 41-50 - Hiroshi Sasaki, Satoshi Imamura, Koji Inoue:
Coordinated power-performance optimization in manycores. 51-61 - Arunachalam Annamalai, Rance Rodrigues, Israel Koren, Sandip Kundu:
An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs. 63-72
Session 2A: GPU & Energy
- Ankit Sethia, Ganesh S. Dasika, Mehrzad Samadi, Scott A. Mahlke:
APOGEE: Adaptive prefetching on GPUs for energy efficiency. 73-82 - José-María Arnau, Joan-Manuel Parcerisa, Polychronis Xekalakis:
Parallel frame rendering: Trading responsiveness for energy on a mobile GPU. 83-92 - Bin Wang, Bo Wu, Dong Li, Xipeng Shen, Weikuan Yu, Yizheng Jiao, Jeffrey S. Vetter:
Exploring hybrid memory for GPU energy efficiency through software-hardware co-design. 93-102
Session 2B: Memory System Management
- Tian Luo, Siyuan Ma, Rubao Lee, Xiaodong Zhang, Deng Liu, Li Zhou:
S-CAVE: Effective SSD caching to improve virtual machine storage performance. 103-112 - Miao Zhou, Yu Du, Bruce R. Childers, Rami G. Melhem, Daniel Mossé:
Writeback-aware bandwidth partitioning for multi-core systems with PCM. 113-122 - Josué Feliu, Julio Sahuquillo, Salvador Petit, José Duato:
L1-bandwidth aware thread allocation in multicore SMT processors. 123-132
Session 3: Best Papers
- Sandeep Navada, Niket K. Choudhary, Salil V. Wadhavkar, Eric Rotenberg:
A unified view of non-monotonic core selection and application steering in heterogeneous chip multiprocessors. 133-144 - Gwangsun Kim, John Kim, Jung Ho Ahn, Jaeha Kim:
Memory-centric system interconnect design with Hybrid Memory Cubes. 145-155 - Onur Kayiran, Adwait Jog, Mahmut T. Kandemir, Chita R. Das:
Neither more nor less: Optimizing thread-level parallelism for GPGPUs. 157-166 - Augusto Vega, Alper Buyuktosunoglu, Pradip Bose:
SMT-centric power-aware thread placement in chip multiprocessors. 167-176
Session 4A: Runtime & Scheduling
- Kenzo Van Craeynest, Shoaib Akram, Wim Heirman, Aamer Jaleel, Lieven Eeckhout:
Fairness-aware scheduling on single-ISA heterogeneous multi-cores. 177-187 - Changwoo Min, Young Ik Eom:
DANBI: Dynamic scheduling of irregular stream programs for many-core systems. 189-200 - Jiacheng Zhao, Xiaobing Feng, Huimin Cui, Youliang Yan, Jingling Xue, Wensen Yang:
An empirical model for predicting cross-core performance interference on multicore processors. 201-212
Session 4B: Caches & Memory Hierarchy (1)
- Nathan Beckmann, Daniel Sánchez:
Jigsaw: Scalable software-defined caches. 213-224 - Vineeth Mekkat, Anup Holey, Pen-Chung Yew, Antonia Zhai:
Managing shared last-level cache in a heterogeneous multicore processor. 225-234 - Wei Ding, Jun Liu, Mahmut T. Kandemir, Mary Jane Irwin:
Reshaping cache misses to improve row-buffer locality in multicore systems. 235-244
Session 5A: GPU
- Janghaeng Lee, Mehrzad Samadi, Yongjun Park, Scott A. Mahlke:
Transparent CPU-GPU collaboration for data-parallel kernels on heterogeneous systems. 245-255 - Wenhao Jia, Kelly A. Shaw, Margaret Martonosi:
Starchart: Hardware and software optimization using recursive partitioning regression trees. 257-267 - Feng Ji, Heshan Lin, Xiaosong Ma:
RSVM: A Region-based Software Virtual Memory for GPU. 269-278
Session 5B: Caches & Memory Hierarchy (2)
- Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio:
The case for a scalable coherence protocol for complex on-chip cache hierarchies in many-core systems. 279-288 - Praveen Yedlapalli, Jagadish Kotra, Emre Kultursay, Mahmut T. Kandemir, Chita R. Das, Anand Sivasubramaniam:
Meeting midway: Improving CMP performance with memory-side prefetching. 289-298 - Lei Fang, Peng Liu, Qi Hu, Michael C. Huang, Guofan Jiang:
Building expressive, area-efficient coherence directories. 299-308
Session 6A: Network, Debugging & Microarchitecture
- Jungju Oh, Alenka G. Zajic, Milos Prvulovic:
Traffic steering between a low-latency unswitched TL ring and a high-throughput switched on-chip interconnect. 309-318 - Yuan He, Hiroshi Sasaki, Shinobu Miwa, Hiroshi Nakamura:
McRouter: Multicast within a router for high performance network-on-chips. 319-329 - Justin Emile Gottschlich, Gilles Pokam, Cristiano Pereira, Youfeng Wu:
Concurrent predicates: A debugging technique for every parallel programmer. 331-340 - Venkatraman Govindaraju, Tony Nowatzki, Karthikeyan Sankaralingam:
Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG. 341-351
Session 6B: Compiler Optimization
- Majedul Haque Sujon, R. Clint Whaley, Qing Yi:
Vectorization past dependent branches through speculation. 353-362 - Youngjoon Jo, Michael Goldfarb, Milind Kulkarni:
Automatic vectorization of tree traversals. 363-374 - Roshan Dathathri, Chandan Reddy, Thejas Ramashekar, Uday Bondhugula:
Generating efficient data movement code for heterogeneous architectures with distributed-memory. 375-386 - Sangmin Seo, Jun Lee, Gangwon Jo, Jaejin Lee:
Automatic OpenCL work-group size selection for multicore CPUs. 387-397
Posters
- Biswabandan Panda, Shankar Balachandran:
TCPT - Thread criticality-driven prefetcher throttling. 399 - Arnamoy Bhattacharyya:
Do inputs matter? using data-dependence profiling to evaluate thread level speculation in BG/Q. 401 - Changwoo Min, Young Ik Eom:
Can lock-free and combining techniques co-exist? A novel approach on concurrent queue. 403 - Thomas Grass:
Task sampling: Computer architecture simulation in the many-core era. 405 - Joan J. Valls, Alberto Ros, Julio Sahuquillo, María Engracia Gómez:
PS-cache: An energy-efficient cache design for chip multiprocessors. 407 - Mikhail A. Gorelov, Lev Mukhanov:
Dynamic memory access monitoring based on tagged memory. 409 - Ali Mustafa Zaidi:
Exposing ILP in custom hardware with a dataflow compiler IR. 411
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