IEEE Transactions on Computers, Volume 36

Volume 36, Number 1, January 1987

• 
  Kang G. Shin, Parameswaran Ramanathan:
  Clock Synchronization of a Large Multiprocessor System in the Presence of Malicious Faults. 2-12
• 
  John H. Zurawski, J. B. Gosling:
  Design of a High-Speed Square Root Multiply and Divide Unit. 13-23
• 
  Edward A. Lee, David G. Messerschmitt:
  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing. 24-35
• 
  Richard J. Zaccone, Jesse L. Barlow:
  Eliminating the Normalization Problem in Digit On-Line Arithmetic. 36-46
• 
  G. Robert Redinbo:
  Fault-Tolerant Decoders for Cyclic Error-Correcting Codes. 47-63
• 
  Jik H. Chang, Oscar H. Ibarra, Michael A. Palis:
  Parallel Parsing on a One-Way Array of Finite-State Machines. 64-75
• 
  Mark A. Holliday, Mary K. Vernon:
  Exact Performance Estimates for Multiprocessor Memory and Bus Interference. 76-85
• 
  Eiji Fujiwara, Kohji Matsuoka:
  A Self-Checking Generalized Prediction Checker and Its Use for Built-In Testing. 86-93
• 
  John P. Robinson, Nirmal R. Saxena:
  A Unified View of Test Compression Methods. 94-99

Correspondence

• 
  Alan M. Schwartz, Michael C. Loui:
  Dictionary Machines on Cube-Class Networks. 100-105
• 
  Zhiyuan Li, Walid A. Abu-Sufah:
  On Reducing Data Synchronization in Multiprocessed Loops. 105-109
• 
  Lindsay Kleeman, Antonio Cantoni:
  On the Unavoidability of Metastable Behavior in Digital Systems. 109-112
• 
  Howard C. Card, P. Glenn Gulak, Robert D. McLeod, Werner Pries:
  (lambda, T) Complexity Measures for VLSI Computations in Constant Chip Area. 112-117
• 
  Dianne P. O'Leary:
  Systolic Arrays for Matrix Transpose and Other Reorderings. 117-122
• 
  Ian F. Akyildiz:
  Exact Product Form Solution for Queueing Networks with Blocking. 122-125

Volume 36, Number 2, February 1987

• 
  Kang G. Shin, Ming-Syan Chen:
  Performance Analysis of Distributed Routing Strategies Free of Ping-Pong-Type Looping. 129-137
• 
  Imrich Chlamtac, Ora Ganz:
  Performance Models of Asynchronous Multitrunk HYPERchannel Networks. 138-146
• 
  Hsieh S. Hou:
  The Fast Hartley Transform Algorithm. 147-156
• 
  Hung Chi Lai, Saburo Muroga:
  Logic Networks with a Minimum Number of NOR(NAND) Gates for Parity Functions of n Variables. 157-166
• 
  Patricia J. Eberlein:
  On the Schur Decomposition of a Matrix for Parallel Computation. 167-174
• 
  Lee D. Coraor, Paul T. Hulina, Orlando A. Morean:
  A General Model for Memory-Based Finite-State Machines. 175-184
• 
  Kostas N. Oikonomou:
  Abstractions of Finite-State Machines Optimal with Respect to Single Undetectable Output Faults. 185-200
• 
  Sudhakar M. Reddy, Dong Sam Ha:
  A New Approach to the Design of Testable PLA's. 201-211

Correspendence

• 
  Agnes Hui Chan:
  Using Decision Trees to Derive the Complement of a Binary Function with Multiple-Valued Inputs. 212-214
• 
  Mark G. Karpovsky:
  Multilevel Logical Networks. 215-226
• 
  Keijiro Nakamura:
  Inverter-Minimum Networks. 226-230
• 
  Roger W. Hockney:
  Algorithmic Phase Diagrams. 231-233
• 
  Harry A. G. Wijshoff, Jan van Leeuwen:
  On Linear Skewing Schemes and d-Ordered Vectors. 233-239
• 
  Yaser S. Abu-Mostafa:
  On the Time-Bandwidth Proof in VLSI Complexity. 239-240
• 
  Alan A. Bertossi, Maurizio A. Bonuccelli:
  A VLSI Implementation of the Simplex Algorithm. 241-247
• 
  Harold Fleisher, Morton Tavel, John Yeager:
  A Computer Algorithm for Minimizing Reed-Muller Canonical Forms. 247-250
• 
  Wenlong Zhang, Jack K. Wolf:
  Rate 1/2 and 2/3 Majority Logic Decodable Binary Burst Error-Correcting Codes. 250-252
• 
  Cary K. Chin, Edward J. McCluskey:
  Test Length for Pseudorandom Testing. 252-256

Volume 36, Number 3, March 1987

• 
  Gardiner S. Stiles, Dong-Lih Denq:
  A Quantitative Comparison of the Performance of Three Discrete Distributed Associative Memory Models. 257-263
• 
  Michael A. Schuette, John Paul Shen:
  Processor Control Flow Monitoring Using Signatured Instruction Streams. 264-276
• 
  Robert Brian Cutler, Saburo Muroga:
  Derivation of Minimal Sums for Completely Specified Functions. 277-292
• 
  David H. Bailey:
  Vector Computer Memory Bank Contention. 293-298
• 
  Louis G. Birta, Osman Abou-Rabia:
  Parallel Block Predictor-Corrector Methods for ode's. 299-311
• 
  David Hung-Chang Du, Lee-Chin Hsu Liu:
  Heuristic Algorithms for Single Row Routing. 312-320
• 
  Ying-Fung Wu, Peter Widmayer, Martine D. F. Schlag, C. K. Wong:
  Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles. 321-331
• 
  Kenneth D. Wagner, Cary K. Chin, Edward J. McCluskey:
  Pseudorandom Testing. 332-343
• 
  Israel Koren, Dhiraj K. Pradhan:
  Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems. 344-355

Correspondence

• 
  Yue-Sun Kuo:
  Generating Essential Primes for a Boolean Function with Multiple-Valued Inputs. 356-359
• 
  Albert G. Greenberg, Udi Manber:
  A Probabilistic Pipeline Algorithm for K Selection on the Tree Machine. 359-362
• 
  Björn Mossberg:
  Vectorization of the Calculation of a Moving Sum. 362-365
• 
  Pinaki Mazumder:
  Evaluation of On-Chip Static Interconnection Networks. 365-369
• 
  Robert P. Treuer, Vinod K. Agarwal, Hideo Fujiwara:
  A New Built-In Self-Test Design for PLA's with High Fault Coverage and Low Overhead. 369-373
• 
  Anton T. Dahbura, Krishan K. Sabnani, Linda L. King:
  The Comparison Approach to Multiprocessor Fault Diagnosis. 373-378
• 
  Che-Liang Yang, Gerald M. Masson:
  A New Measure for Hybrid Fault Diagnosability. 378-383
• 
  Frank K. Hwang:
  Comments on "Reliable Loop Topologies for Large Local Computer Networks". 383-384

Volume 36, Number 4, April 1987

• 
  Pen-Chung Yew, Nian-Feng Tzeng, Duncan H. Lawrie:
  Distributing Hot-Spot Addressing in Large-Scale Multiprocessors. 388-395
• 
  Ronald P. Bianchini Jr., John Paul Shen:
  Interprocessor Traffic Scheduling Algorithm for Multiple-Processor Networks. 396-409
• 
  Constantine D. Polychronopoulos, Utpal Banerjee:
  Processor Allocation for Horizontal and Vertical Parallelism and Related Speedup Bounds. 410-420
• 
  Zarka Cvetanovic:
  The Effects of Problem Partitioning, Allocation, and Granularity on the Performance of Multiple-Processor Systems. 421-432
• 
  Soo-Young Lee, J. K. Aggarwal:
  A Mapping Strategy for Parallel Processing. 433-442
• 
  Maurice Herlihy:
  Extending Multiversion Time-Stamping Protocols to Exploit Type Information. 443-448
• 
  Richard A. Volz, Trevor N. Mudge:
  Timing Issues in the Distributed Execution of Ada Programs. 449-459
• 
  Kshitij Doshi, Peter J. Varman:
  Optimal Graph Algorithms on a Fixed-Size Linear Array. 460-470
• 
  Thomas J. LeBlanc, John M. Mellor-Crummey:
  Debugging Parallel Programs with Instant Replay. 471-482
• 
  Ahmed E. Kamal:
  Star Local Area Networks: A Performance Study. 483-499
• 
  Dar-Tzen Peng, Kang G. Shin:
  Modeling of Concurrent Task Execution in a Distributed System for Real-Time Control. 500-516

Volume 36, Number 5, May 1987

• 
  Hemant Kanakia, Fouad A. Tobagi:
  On Distributed Computations with Limited Resources. 517-528
• 
  Ram Chillarege, Ravishankar K. Iyer:
  Measurement-Based Analysis of Error Latency. 529-537
• 
  Arun K. Somani, Vinod K. Agarwal, David Avis:
  A Generalized Theory for System Level Diagnosis. 538-546
• 
  William J. Dally, Charles L. Seitz:
  Deadlock-Free Message Routing in Multiprocessor Interconnection Networks. 547-553
• 
  Peter J. B. King, Isi Mitrani:
  Modeling a Slotted Ring Local Area Network. 554-561
• 
  Yaron I. Gold, William R. Franta:
  A Scheduling-Function-Based Distributed Access Protocol that Uses CDM to Relay Control Information in a Network with Hidden Nodes. 562-569
• 
  Marsha J. Berger, Shahid H. Bokhari:
  A Partitioning Strategy for Nonuniform Problems on Multiprocessors. 570-580
• 
  Alan Norton, Allan J. Silberger:
  Parallelization and Performance Analysis of the Cooley-Tukey FFT Algorithm for Shared-Memory Architectures. 581-591
• 
  Jacob Savir, William H. McAnney, Salvatore R. Vecchio:
  Fault Propagation Through Embedded Multiport Memories. 592-602
• 
  Sun-Yuan Kung, Sheng-Chun Lo, Paul S. Lewis:
  Optimal Systolic Design for the Transitive Closure and the Shortest Path Problems. 603-614

Correspondence

• 
  Lamine Melkemi, Maurice Tchuente:
  Complexity of Matrix Product on a Class of Orthogonally Connectid Systolic Arrays. 615-619
• 
  Abhijit Sengupta, Arunabha Sen, Subir Bandyopadhyay:
  On an Optimally Fault-Tolerant Multiprocessor Network Architecture. 619-623
• 
  Frantisek Kremla:
  General Criterion for Essential Nonfault Locatability of Logical Functions. 623-629
• 
  Stanislaw J. Piestrak:
  Design of Fast Self-Testing Checkers for a Class of Berger Codes. 629-634
• 
  Asish Mukhopadhyay:
  A Solution to the Polynomial Hensel Code Conversion Problem. 634-637
• 
  Chun-Fu Huang, Wen-Tsuen Chen:
  Fault-Tolerant Single-Stage Interconnection Networks. 637-640
• 
  Carla Neaderhouser Purdy, George B. Purdy:
  Integer Division in Linear Time with Bounded Fan-In. 640-644

Volume 36, Number 6, June 1987

• 
  Takanobu Baba, S. Bing Yao, Alan R. Hevner:
  Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis. 650-666
• 
  Wesley W. Chu, Lance M.-T. Lan:
  Task Allocation and Precedence Relations for Distributed Real-Time Systems. 667-679
• 
  Sudhakar Yalamanchili, Jake K. Aggarwal:
  A Characterization and Analysis of Parallel Processor Interconnection Networks. 680-691
• 
  Theodore K. Apostolopoulos, Efstathios D. Sykas, Emmanuel N. Protonotarios:
  Analysis of a New Retransmission Control Algorithm for Slotted CSMA/CD LAN's. 692-701
• 
  Miguel Angel Fiol, J. Luis A. Yebra, Ignacio Alegre, Mateo Valero:
  A Discrete Optimization Problem in Local Networks and Data Alignment. 702-713
• 
  Veljko M. Milutinovic, Noé Lopez-Benitez, Kai Hwang:
  A GaAs-Based Microprocessor Architecture for Real-Time Applications. 714-727
• 
  Imrich Chlamtac, Shlomit S. Pinter:
  Distributed Nodes Organization Algorithm for Channel Access in a Multihop Dynamic Radio Network. 728-737
• 
  Ambuj Goyal, Asser N. Tantawi:
  Evaluation of Performability for Degradable Computer Systems. 738-744
• 
  W. K. Luk, Paolo Sipala, C. K. Wong:
  Minimum-Area Wiring for Slicing Structures. 745-760

Correspondence

• 
  Yu-cheng Liu, Chi-Jiunn Jou:
  Effective Memory Bandwidth and Processor Blocking Probability in Multiple-Bus Systems. 761-764
• 
  Jay J. Thomas, Sydney R. Parker:
  Implementing Exact Calculations in Hardware. 764-768
• 
  Kyungsook Y. Lee:
  A New Benes Network Control Algorithm. 768-772

Volume 36, Number 7, July 1987

• 
  Bezalel Gavish:
  Optimization Models for Configuring Distributed Computer Systems. 773-793
• 
  André Seznec:
  A New Interconnection Network for SIMD Computers: The Sigma Network. 794-801
• 
  A. Yavuz Oruç, M. Yaman Oruç:
  Programming Cellular Permutation Networks Through Decomposition of Symmetric Groups. 802-809
• 
  Ted H. Szymanski, V. Carl Hamacher:
  On the Permutation Capability of Multistage Interconnection Networks. 810-822
• 
  Svetlana P. Kartashev, Steven I. Kartashev:
  Analysis and Synthesis of Dynamic Multicomputer Networks that Reconfigure into Rings, Trees, and Stars. 823-844
• 
  Daniel A. Reed, Loyce M. Adams, Merrell L. Patrick:
  Stencils and Problem Partitionings: Their Influence on the Performance of Multiple Processor Systems. 845-858
• 
  Philip G. Emma, Edward S. Davidson:
  Characterization of Branch and Data Dependencies in Programs for Evaluating Pipeline Performance. 859-875
• 
  Jung H. Kim, Winser E. Alexander:
  A Multiprocessor Architecture for Two-Dimensional Digital Filters. 876-884

Correspondence

• 
  Sheldon B. Akers Jr., Balakrishnan Krishnamurthy:
  On Group Graphs and Their Fault Tolerance. 885-888
• 
  Kunio Fukunaga, Shoichiro Yamada, Tamotsu Kasai:
  Asignment of Job Modules onto Array Processors. 888-891
• 
  Wu-Tung Cheng, Janak H. Patel:
  A Minimum Test Set for Multiple Fault Detection in Ripple Carry Adders. 891-895
• 
  Milos D. Ercegovac, Tomás Lang:
  On-the-Fly Conversion of Redundant into Conventional Representations. 895-897

Volume 36, Number 8, August 1987

• 
  Karsten Schwan, Prabha Gopinath, Win Bo:
  CHAOS-Kernel Support for Objects in the Real-Time Domain. 904-916
• 
  Michael F. Coulas, Glenn H. MacEwen, Genevieve Marquis:
  RNet: A Hard Real-Time Distributed Programming System. 917-932
• 
  Hermann Kopetz, Wilhelm Ochsenreiter:
  Clock Synchronization in Distributed Real-Time Systems. 933-940
• 
  Insup Lee, Susan B. Davidson:
  Adding Time to Synchronous Process Communications. 941-948
• 
  Wei Zhao, Krithi Ramamritham, John A. Stankovic:
  Preemptive Scheduling Under Time and Resource Constraints. 949-960
• 
  Farnam Jahanian, Aloysius K. Mok:
  A Graph-Theoretic Approach for Timing Analysis and its Implementation. 961-975
• 
  Yann-Hang Lee, Philip S. Yu, Balakrishna R. Iyer:
  Progressive Transaction Recovery in Distributed DB/DC Systems. 976-987

Correspondence

• 
  Richard A. Volz, Trevor N. Mudge:
  Instruction Level Timing Mechanisms for Accurate Real-Time Task Scheduling. 988-993
• 
  James F. Kurose, Renu Chipalkatti:
  Load Sharing in Soft Real-Time Distributed Computer Systems. 993-1000
• 
  Frederic L. Swern, Salvatore J. Bavuso, Anna L. Martensen, Paul S. Miner:
  The Effects of Latent Faults on Highly Reliable Computer Systems. 1000-1005

Volume 36, Number 9, September 1987

• 
  Dan Gordon:
  Efficient Embeddings of Binary Trees in VLSI Arrays. 1009-1018
• 
  Michael Granski, Israel Koren, Gabriel M. Silberman:
  The Effect of Operation Scheduling on the Performance of a Data Flow Computer. 1019-1029
• 
  C. Mani Krishna, Kang G. Shin, Inderpal S. Bhandari:
  Processor Tradeoffs in Distributed Real-Time Systems. 1030-1040
• 
  Victor O. K. Li:
  Performance Models of Timestamp-Ordering Concurrency Control Algorithms in Distributed Databases. 1041-1051
• 
  Menachem Berg, Israel Koren:
  On Switching Policies for Modular Redundancy Fault-Tolerant Computing Systems. 1052-1062
• 
  Alan Jay Smith:
  Line (Block) Size Choice for CPU Cache Memories. 1063-1075
• 
  Hidenori Umeno, Shunji Tanaka:
  New Methods for Realizing Plural Near-Native Performance Virtual Machines. 1076-1087
• 
  Eberhard Lange:
  Implementation and Test of the ACRITH Facility in a System/370. 1088-1096

Correspondence

• 
  Micaela Serra, Jon C. Muzio:
  Testing Programmable Logic Arrays by Sum of Syndromes. 1097-1101
• 
  Rami G. Melhem:
  A Study of Data Interlock in Computational Networks for Sparse Matrix Multiplication. 1101-1107
• 
  Mandyam M. Srinivasan:
  Successively Improving Bounds on Performance Measures for Single Class Product Form Queueing Networks. 1107-1212
• 
  Balakrishnan Krishnamurthy:
  Constructing Test Cases for Partitioning Heuristics. 1112-1114
• 
  Jan Gecsei, Eduard Cerny:
  Self-Adjusting Networks for VLSI Simulation. 1114-1120
• 
  Takashi Nanya, Toshiaki Kawamura:
  A Note on Strongly Fault-Secure Sequential Circuits. 1121-1123
• 
  Robert I. Damper, N. Burgess:
  MOS Test Pattern Generation Using Path Algebras. 1123-1128
• 
  Steven S. Liu, Q. C. Chow:
  Performance Analysis of a Multiprocessor-Based Packet Switch in Networks with Link-Level Sliding-Window Flow Control. 1128-1132
• 
  Seiichi Nishihara, Hiroji Nishino:
  Binary Search Revisited: Another Advantage of Fibonacci Search. 1132-1135

Volume 36, Number 10, October 1987

• 
  Adly T. Fam:
  Optimal Partitioning and Redundancy Removal in Computing Partial Sums. 1137-1143
• 
  Alain Guyot, Bertrand Hochet, Jean-Michel Muller:
  A Way to Build Efficient Carry-Skip Adders. 1144-1152
• 
  Clement T. Yu, Keh-Chang Guh, Weining Zhang, Marjorie Templeton, David Brill, Arbee L. P. Chen:
  Algorithms to Process Distributed Queries in Fast Local Networks. 1153-1164
• 
  Hirokazu Okano, Hideki Imai:
  A Construction Method of High-Speed Decoders Using ROMS's for Bose-Chaudhuri-Hocquenghem and Reed-Solomon Codes. 1165-1171
• 
  Matthew B. Lowrie, W. Kent Fuchs:
  Reconfigurable Tree Architectures Using Subtree Oriented Fault Tolerance. 1172-1182
•