CODES+ISSS 2005: Jersey City, NJ, USA

Tutorials

Keynote

"Systems in 2010"

Innovative synthesis methodologies and algorithms

Software controlled memory systems

Techniques for code generation, partitioning and analysis

Network-on-chip architectures

Memory compression for embedded systems

Voltage scaling and variability issues in system-level design

Panel

Application specific architectures

System-level power estimation and optimization

Accelerating applications through customized instruction sets

Security-oriented application specific architectures

BioChips and BioInformatics

High-level techniques for specific applications

Memory access and virtualization techniques for performance

On-chip communication and interface design

Algorithms and methodologies for new architectures

SW vs. HW acceleration techniques

Prototyping and validation techniques

Panel

maintained by Schloss Dagstuhl LZI, founded at University of Trier