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Manfred Glesner
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2010 – 2019
- 2017
- [c298]Ricardo Reis, Manfred Glesner:
VLSI-SoC: An Enduring Tradition. VLSI-SoC (Selected Papers) 2017: 240-255 - 2014
- [c297]François Philipp, Manfred Glesner:
High-level abstraction for teaching smart systems design with modular hardware. EWME 2014: 146-150 - 2013
- [j48]Luciano Ost
, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Möller, Leandro Soares Indrusiak
, Gilles Sassatelli, Pascal Benoit, Manfred Glesner, Michel Robert
, Fernando Moraes
:
Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. ACM Trans. Embed. Comput. Syst. 12(3): 75:1-75:22 (2013) - [j47]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip. IEEE Trans. Parallel Distributed Syst. 24(7): 1411-1421 (2013) - [c296]Ramkumar Ganesan, Jürgen Krumm, Sebastian Pankalla, Klaus Ludwig, Manfred Glesner:
Design of an organic electronic label on a flexible substrate for temperature sensing. ESSCIRC 2013: 423-426 - [c295]François Philipp, Manfred Glesner:
An event-based middleware for the remote management of runtime hardware reconfiguration. FPL 2013: 1-4 - [c294]Manfred Glesner, François Philipp:
Embedded systems design for smart system integration. ISVLSI 2013: 32-33 - 2012
- [j46]Élvio Carlos Dutra e Silva Júnior, Leandro Soares Indrusiak
, Weiler Alves Finamore, Manfred Glesner:
A Programmable Look-Up Table-Based Interpolator with Nonuniform Sampling Scheme. Int. J. Reconfigurable Comput. 2012: 647805:1-647805:14 (2012) - [j45]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method. Microprocess. Microsystems 36(6): 449-461 (2012) - [j44]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461. Microprocess. Microsystems 36(6): 527 (2012) - [c293]D. Erdenechimeg, Ts. Sugir, François Philipp, Manfred Glesner:
Implementation and outcomes of FPGA-based system design in Mongolian education. FPL 2012: 491-494 - [c292]François Philipp, Manfred Glesner:
(GECO)2: A graphical tool for the generation of configuration bitstreams for a smart sensor interface based on a Coarse-Grained Dynamically Reconfigurable Architecture. FPL 2012: 679-682 - [c291]Leandro Möller, Leandro Soares Indrusiak
, Luciano Ost
, Fernando Gehm Moraes
, Manfred Glesner:
Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs. ISSoC 2012: 1-4 - [c290]François Philipp, Conrad Klytta, Manfred Glesner, Élvio Dutra:
Hardware acceleration of combined cipher and forward error correction for low-power wireless applications. ReCoSoC 2012: 1-7 - 2011
- [j43]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip. Microprocess. Microsystems 35(3): 343-358 (2011) - [j42]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip. IEEE Trans. Parallel Distributed Syst. 22(4): 544-557 (2011) - [c289]Faizal Arya Samman
, François Philipp, Manfred Glesner:
Reconfigurable interconnect infrastructure for multi-FPGA-based adaptive multiprocessing systems. CHANGE@ASPLOS 2011: 1-8 - [c288]Surapong Pongyupinpanich, Manfred Glesner:
Pipelined Floating-Point Architecture for a Phase and Magnitude Detector Based on CORDIC. FPL 2011: 382-384 - [c287]François Philipp, Manfred Glesner:
Mechanisms and Architecture for the Dynamic Reconfiguration of an Advanced Wireless Sensor Node. FPL 2011: 396-398 - [c286]François Philipp, Manfred Glesner:
A Multi-level Reconfigurable Architecture for a Wireless Sensor Node Coprocessing Unit. IPDPS Workshops 2011: 334-337 - [c285]Ping Zhao, Manfred Glesner:
RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifier. ISCAS 2011: 2477-2480 - [c284]Thomas Hollstein
, Faizal Arya Samman
, Ashok Jaiswal, Haoyuan Ying, Manfred Glesner, Klaus Hofmann:
Invited paper: Design criteria for dependable System-on-Chip architectures. ReCoSoC 2011: 1-6 - [c283]Faizal Arya Samman
, Surapong Pongyupinpanich, Manfred Glesner:
Reconfigurable streaming processor core with interconnected floating-point arithmetic units for multicore adaptive signal processing systems. ReCoSoC 2011: 1-6 - [c282]François Philipp, Faizal Arya Samman
, Manfred Glesner:
Design of an autonomous platform for distributed sensing-actuating systems. International Symposium on Rapid System Prototyping 2011: 85-90 - [c281]Surapong Pongyupinpanich, Manfred Glesner:
On-chip efficient Round-Robin scheduler for high-speed interconnection. International Symposium on Rapid System Prototyping 2011: 199-202 - [c280]Luciano Ost
, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Soares Indrusiak
, Leandro Möller, Manfred Glesner, Gilles Sassatelli, Michel Robert, Fernando Moraes
:
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. SBCCI 2011: 185-190 - 2010
- [j41]Sanna Määttä, Leandro Möller, Leandro Soares Indrusiak
, Luciano Ost
, Manfred Glesner, Jari Nurmi
, Fernando Moraes
:
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms. Int. J. Embed. Real Time Commun. Syst. 1(1): 86-101 (2010) - [j40]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 18(7): 1067-1080 (2010) - [c279]Leandro Möller, Peter Fischer, Fernando Moraes
, Leandro Soares Indrusiak
, Manfred Glesner:
Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers. FPL 2010: 229-233 - [c278]Élvio Dutra, Manfred Glesner, Weiler Alves Finamore, Leandro Soares Indrusiak
:
Novel method of chaotic systems evaluation for implementations of encryption algorithms. ICT 2010: 89-96 - [c277]Sanna Määttä, Leandro Soares Indrusiak
, Luciano Ost
, Leandro Möller, Manfred Glesner, Fernando Gehm Moraes
, Jari Nurmi
:
A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II. SoC 2010: 68-71 - [c276]Leandro Möller, André Rodrigues, Fernando Moraes, Leandro Soares Indrusiak, Manfred Glesner:
Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors. ReCoSoC 2010: 7-11 - [p2]Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Dynamically Reconfigurable Systems for Wireless Sensor Networks. Dynamically Reconfigurable Systems 2010: 315-334
2000 – 2009
- 2009
- [j39]Peter Zipf, Gilles Sassatelli, Nurten Utlu, Nicolas Saint-Jean, Pascal Benoit, Manfred Glesner:
A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips. Int. J. Reconfigurable Comput. 2009: 453970:1-453970:14 (2009) - [j38]Kurt Franz Ackermann, Burghard Hoffmann, Leandro Soares Indrusiak
, Manfred Glesner:
Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms. Int. J. Reconfigurable Comput. 2009: 851613:1-851613:15 (2009) - [j37]Alberto García Ortiz
, Leandro Soares Indrusiak
, Tudor Murgan, Manfred Glesner:
Low-Power Coding for Networks-on-Chip with Virtual Channels. J. Low Power Electron. 5(1): 77-84 (2009) - [j36]Heiko Hinkelmann, Peter Zipf, Jia Li, Guifang Liu, Manfred Glesner:
On the design of reconfigurable multipliers for integer and Galois field multiplication. Microprocess. Microsystems 33(1): 2-12 (2009) - [j35]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management. VLSI Design 2009: 941701:1-941701:15 (2009) - [c275]Andre Guntoro
, Manfred Glesner:
A flexible floating-point wavelet transform and wavelet packet processor. DATE 2009: 1314-1319 - [c274]Markus Rullmann, Renate Merker, Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs. FPL 2009: 92-98 - [c273]Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes. FPL 2009: 359-366 - [c272]Haile Yu, Philip Heng Wai Leong
, Heiko Hinkelmann, Leandro Möller, Manfred Glesner, Peter Zipf:
Towards a unique FPGA-based identification circuit using process variations. FPL 2009: 397-402 - [c271]Thomas C. P. Chau, S. Man Ho Ho, Philip Heng Wai Leong
, Peter Zipf, Manfred Glesner:
Generation of Synthetic Floating-Point benchmark circuits. IPDPS 2009: 1-9 - [c270]Sanna Määttä, Leandro Soares Indrusiak
, Luciano Ost
, Leandro Möller, Manfred Glesner, Fernando Gehm Moraes
, Jari Nurmi
:
Characterising embedded applications using a UML profile. SoC 2009: 172-175 - [c269]Petru Bogdan Bacinschi, Manfred Glesner:
A Multistep Extrapolated S-Parameter Model for Arbitrary On-Chip Interconnect Structures. VLSI-SoC 2009: 156-180 - 2008
- [j34]Radu Dogaru, Manfred Glesner:
A fast and compact classifier based on sorting in an iteratively expanded input space. Int. J. Intell. Syst. 23(5): 607-618 (2008) - [c268]Andre Guntoro
, Manfred Glesner:
Low-latency VLSI architecture of a 3-input floating-point adder. APCCAS 2008: 180-183 - [c267]Andre Guntoro
, Massoud Momeni, Hans-Peter Keil, Manfred Glesner:
High-performance floating-point VLSI architecture of lifting-based forward and inverse wavelet transforms. APCCAS 2008: 457-460 - [c266]Hans-Peter Keil, Massoud Momeni, Andre Guntoro
, Alberto García Ortiz, Manfred Glesner:
A novel leakage-estimation method for input-vector control. APCCAS 2008: 570-573 - [c265]Massoud Momeni, Andre Guntoro
, Hans-Peter Keil, Manfred Glesner:
Impact of circuit nonidealities on the implementation of switched-capacitor resonators. APCCAS 2008: 1624-1627 - [c264]Andre Guntoro
, Manfred Glesner:
Novel approach on lifting-based DWT and IDWT processor with multi-context configuration to support different wavelet filters. ASAP 2008: 299-304 - [c263]Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner:
Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation. DATE 2008: 688-693 - [c262]Petru Bogdan Bacinschi, Tudor Murgan, Klaus Koch, Manfred Glesner:
An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs. DATE 2008: 698-703 - [c261]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Multicast Parallel Pipeline Router Architecture for Network-on-Chip. DATE 2008: 1396-1401 - [c260]Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jürgen Becker, Frank Hannig
, Dmitrij Kissler, Hritam Dutta, Jürgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Coarse-grained reconfiguration. FPL 2008: 349 - [c259]Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll:
Application-specific reconfigurable processors. FPL 2008: 350 - [c258]Andre Guntoro
, Manfred Glesner:
A lifting-based DWT and IDWT processor with multi-context configuration and normalization factor. FPL 2008: 479-482 - [c257]Andre Guntoro
, Manfred Glesner:
High-performance fpga-based floating-point adder with three inputs. FPL 2008: 627-630 - [c256]Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
A scalable reconfiguration mechanism for fast dynamic reconfiguration. FPT 2008: 145-152 - [c255]Peter Zipf, Heiko Hinkelmann, Hui Shao, Radu Dogaru, Manfred Glesner:
An area-efficient FPGA realisation of a codebook-based image compression method. FPT 2008: 349-352 - [c254]Enkhbold Ochirsuren, Leandro Soares Indrusiak
, Manfred Glesner:
An Actor-Oriented Group Mobility Model for Wireless Ad Hoc Sensor Networks. ICDCS Workshops 2008: 174-179 - [c253]Andre Guntoro
, Hans-Peter Keil, Manfred Glesner:
High-Speed Configurable VLSI Architecture of a General Purpose Lifting-Based Discrete Wavelet Processor. ICETE (Selected Papers) 2008: 318-330 - [c252]Enkhbold Ochirsuren, Heiko Hinkelmann, Leandro Soares Indrusiak
, Manfred Glesner:
TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor. DIPES 2008: 161-170 - [c251]Faizal Arya Samman
, Thomas Hollstein
, Manfred Glesner:
Flexible parallel pipeline network-on-chip based on dynamic packet identity management. IPDPS 2008: 1-8 - [c250]Sujan Pandey, Rolf Drechsler
, Tudor Murgan, Manfred Glesner:
Process variations aware robust on-chip bus architecture synthesis for MPSoCs. ISCAS 2008: 2989-2992 - [c249]Leandro Soares Indrusiak
, Luciano Ost
, Leandro Möller, Fernando Moraes
, Manfred Glesner:
Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. ISVLSI 2008: 491-494 - [c248]Alberto García Ortiz
, Leandro Soares Indrusiak
, Tudor Murgan, Manfred Glesner:
PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels. PATMOS 2008: 219-228 - [c247]Heiko Hinkelmann, Andreas Reinhardt, Manfred Glesner:
A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support. IEEE International Workshop on Rapid System Prototyping 2008: 82-88 - [c246]Christopher Spies, Peter Zipf, Manfred Glesner, Harald Klingbeil
:
Bandwidth Requirement Determination for a Digitally Controlled Cavity Synchronisation in a Heavy Ion Synchrotron Using Ptolemy II. IEEE International Workshop on Rapid System Prototyping 2008: 196-202 - [c245]Luciano Ost
, Fernando Gehm Moraes
, Leandro Möller, Leandro Soares Indrusiak
, Manfred Glesner, Sanna Määttä, Jari Nurmi
:
A simplified executable model to evaluate latency and throughput of networks-on-chip. SBCCI 2008: 170-175 - [c244]Kurt Franz Ackermann, Burghard Hoffmann, Leandro Soares Indrusiak
, Manfred Glesner:
Enabling self-reconfiguration on a video processing platform. SIES 2008: 19-26 - [c243]Sanna Määttä, Leandro Soares Indrusiak
, Luciano Ost
, Leandro Möller, Jari Nurmi
, Manfred Glesner, Fernando Moraes
:
Validation of executable application models mapped onto network-on-chip platforms. SIES 2008: 118-125 - [c242]Andre Guntoro, Hans-Peter Keil, Manfred Glesner:
Configurable VLSI Architecture of a General Purpose Lifting-based Wavelet Processor. SIGMAP 2008: 69-75 - [c241]Andre Guntoro
, Manfred Glesner:
A Flexible Floating-Point Wavelet Processor. SITIS 2008: 403-410 - [c240]Andre Guntoro
, Manfred Glesner:
A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters. VLSI-SoC (Selected Papers) 2008: 154-173 - [p1]Manfred Glesner, Tudor Murgan, Thomas Hollstein:
Hardware Based Rapid Prototyping. Wiley Encyclopedia of Computer Science and Engineering 2008 - 2007
- [j33]Thomas Hollstein
, Manfred Glesner:
Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms. Comput. Electr. Eng. 33(4): 310-319 (2007) - [j32]Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Thilo Pionteck
:
Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme). it Inf. Technol. 49(3): 174- (2007) - [j31]Alberto García Ortiz, Tudor Murgan, Manfred Glesner:
Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems. J. Low Power Electron. 3(2): 189-198 (2007) - [j30]Leandro Soares Indrusiak
, Manfred Glesner, Ricardo Reis:
On the Evolution of Remote Laboratories for Prototyping Digital Electronic Systems. IEEE Trans. Ind. Electron. 54(6): 3069-3077 (2007) - [j29]Sujan Pandey, Manfred Glesner:
Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic. IEEE Trans. Very Large Scale Integr. Syst. 15(10): 1111-1124 (2007) - [c239]Leandro Soares Indrusiak
, Andreas Thuy, Manfred Glesner:
Interactive presentation: Executable system-level specification models containing UML-based behavioral patterns. DATE 2007: 301-306 - [c238]Peter Zipf, Heiko Hinkelmann, Lei Deng, Manfred Glesner, Holger Blume
, Tobias G. Noll:
A Power Estimation Model for an FPGA-based Softcore Processor. FPL 2007: 171-176 - [c237]Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks. FPT 2007: 313-316 - [c236]Mihail Petrov, Manfred Glesner:
A Scalable Resampling Architecture. GLOBECOM 2007: 3102-3106 - [c235]Mihail Petrov, Manfred Glesner:
An Efficient Fractional-Rate Interpolation Architecture. GLOBECOM 2007: 4554-4558 - [c234]José Carlos S. Palma, Leandro Soares Indrusiak
, Fernando Gehm Moraes
, Ricardo Reis, Manfred Glesner:
Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes. ICECS 2007: 1007-1010 - [c233]José Carlos S. Palma, Leandro Soares Indrusiak
, Fernando Gehm Moraes
, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis:
Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304 - [c232]Peter Zipf, Yang Qiao, Manfred Glesner:
Ein Beitrag zur automatischen Erzeugung dynamisch rekonfigurierbarer Hardwarestrukturen. MBMV 2007: 253-262 - [c231]Tudor Murgan, Petru Bogdan Bacinschi, Sujan Pandey, Alberto García Ortiz, Manfred Glesner:
On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects. PATMOS 2007: 242-254 - [c230]Tudor Murgan, Andre Guntoro, Heiko Hinkelmann, Petru Bogdan Bacinschi, Manfred Glesner:
Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling. ReCoSoC 2007: 7-14 - [c229]Kurt Franz Ackermann, Leandro Soares Indrusiak, Manfred Glesner:
System Level Design of a Dynamically Self-Reconfigurable Image Processing System. ReCoSoC 2007: 47-54 - [c228]Peter Zipf, Heiko Hinkelmann, Felix Missel, Manfred Glesner:
A Customizable LEON2-Based VLIW Processor. ReCoSoC 2007: 55-60 - [c227]Heiko Hinkelmann, Tudor Murgan, Guifang Liu, Peter Zipf, Manfred Glesner:
On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication. ReCoSoC 2007: 185-191 - [c226]Leandro Soares Indrusiak
, Manfred Glesner:
Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models. SBCCI 2007: 330-335 - [e8]Gilles Sassatelli, Manfred Glesner, Christophe Bobda, Pascal Benoit:
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007. Univ. Montpellier II 2007, ISBN 2-9517461-3-X [contents] - 2006
- [c225]Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Design Concepts for a Dynamically ReconfigurableWireless Sensor Node. AHS 2006: 436-441 - [c224]Andre Guntoro
, Peter Zipf, Oliver Soffke, Harald Klingbeil, Martin Kumm, Manfred Glesner:
Implementation of Realtime and Highspeed Phase Detector on FPGA. ARC 2006: 1-11 - [c223]Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
A metric for the energy-efficiency of dynamically reconfigurable systems. ARCS Workshops 2006: 152-161 - [c222]Sujan Pandey, Manfred Glesner:
Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraint. DAC 2006: 663-668 - [c221]Oliver Soffke, Peter Zipf, Tudor Murgan, Manfred Glesner:
A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits. DATE 2006: 632-637 - [c220]Andreas Thuy, Leandro Soares Indrusiak, Manfred Glesner:
Applying Communication Patterns to Actor-Oriented Models. FDL 2006: 407-409 - [c219]Heiko Hinkelmann, Andreas Gunberg, Peter Zipf, Leandro Soares Indrusiak
, Manfred Glesner:
Multitasking Support for Dynamically Reconfig Urable Systems. FPL 2006: 1-6 - [c218]Sujan Pandey, Manfred Glesner:
Energy Efficient Statistical On-Chip Communication Bus Synthesis for a Reconfigurable Architecture. FPL 2006: 1-6 - [c217]Tudor Murgan, Massoud Momeni, Alberto García Ortiz, Manfred Glesner:
A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects. ICCAD 2006: 323-328 - [c216]Murthy Palla, Klaus Koch, Jens Bargfrede, Manfred Glesner, Walter Anheier:
Reduction of Crosstalk Pessimism using Tendency Graph Approach. ICCD 2006: 50-55 - [c215]Sujan Pandey, Manfred Glesner:
Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique. ISCAS 2006 - [c214]Romualdo Begale Prudencio, Leandro Soares Indrusiak
, Manfred Glesner:
An Efficient Hardware Implementation of a Self-Adaptable Equalizer for WCDMA Downlink UMTS Standard. ISVLSI 2006: 77-84 - [c213]José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak
, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes
:
Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427 - [c212]Leandro Soares Indrusiak, Manfred Glesner:
An Actor-Oriented Model-Based Design Flow for Systems-on-Chip. MBEES 2006: 65-74 - [c211]Peter Zipf, Volker Hampel, Manfred Glesner, Thilo Pionteck:
Eine Scheduling Heuristik zur Minimierung der Verlustleistung. MBMV 2006: 51-60 - [c210]Tudor Murgan, Petru Bogdan Bacinschi, Alberto García Ortiz, Manfred Glesner:
Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance. PATMOS 2006: 169-180 - [c209]