ICCD 2006: San Jose, CA, USA

Keynote Presentation

Microarchitecture Optimization

1.2 Timing Analysis

1.3 Advanced Circuits and Interconnections

2.1 Special Session on Nanotechnology - I

3.1 Technology-Aware Design

3.2 Multiprocessors and Systems-on-Chip

3.3 Robust and Low-Power Design Styles

Banquet - Keynote Speaker

Special Session on Interconnect

5.1 Hardware and Software Scheduling Techniques

5.2 Nanoscale Modeling + Synthesis

5.3 Power Issues in Test

Special Session on Hardware Equivalence

7.1 Functional Verification - Advances and Applications

7.2 Application Specific Processing Elements

7.3 Physical Design

8.1 Design Techniques and Methods

8.2 System On Chip Design

8.3 Power-Efficient Systems

9.1 Improving test quality

9.2 Architectural Synthesis

10.1 Design Practice

10.2 Architectural Support for Error Protection

11.1 Special Session on Nanotechnology - II

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