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2000 – 2009
- 2004
[j6]Mehdi Mahdavi, R. M. Edwards, Peter A. Ivey:
Performance analysis of integrated voice and multiple classes of data with a finite number of sessions. Eur. Trans. Telecommun. 15(2): 101-109 (2004)- [j5]S. Crossley, Nicholas Luke Seed
, Neil A. Thacker, Peter A. Ivey:
Improving accuracy, robustness and computational efficiency in 3D computer vision. Image Vis. Comput. 22(5): 399-412 (2004) - 2002
- [j4]A. C. Zawada, Nicholas Luke Seed, Peter A. Ivey:
Continuous and high coverage self-testing of dynamically re-configurable systems. Parallel Comput. 28(7-8): 1155-1178 (2002) - [c10]Mehdi Mahdavi, R. M. Edwards, Charalampos V. Ladas, Peter A. Ivey:
Analytic performance of a random access protocol with mixed services of voice and a finite number of data sessions in mobile cellular networks. MWCN 2002: 327-331 - 2001
- [c9]Mehdi Mahdavi, Robert M. Edwards, Peter A. Ivey:
QoS analysis in mobile cellular networks supporting voice and class of finite sessions. VTC Fall 2001: 2692-2697
1990 – 1999
- 1999
- [c8]Mihai Munteanu, Peter A. Ivey, Nicholas Luke Seed, Marios Psilogeorgopoulos, Neil Powell, Istvan Bogdan:
Single Ended Pass-Transistor Logic - A Comparison with CMOS and CPL. VLSI 1999: 206-218 - 1996
- [j3]Richard A. Lane, Neil A. Thacker, Nicholas Luke Seed, Peter A. Ivey:
A Generalized Computer Vision Chip. Real Time Imaging 2(4): 203-213 (1996) - [c7]Steven P. Larcombe, David J. Prendergast, Neil A. Thacker, Peter A. Ivey:
Using Genetic Algorithms to Automate System Implementation in a Novel Three-Dimensional Packaging Technolog. ICCD 1996: 274-279 - 1995
- [j2]Rob B. Yates, Neil A. Thacker, Stephen J. Evans, Simon N. Walker, Peter A. Ivey:
An array processor for general purpose digital image compression. IEEE J. Solid State Circuits 30(3): 244-250 (1995) - [j1]John Goodenough, Richard J. Meacham, Jonathan D. Morris, Nicholas Luke Seed, Peter A. Ivey:
A single chip video signal processing architecture for image processing, coding, and computer vision. IEEE Trans. Circuits Syst. Video Technol. 5(5): 436-445 (1995) - 1994
- [c6]Patrick Courtney, R. A. Yates, Peter A. Ivey:
Mapping Algorithms on to Platforms: An Approach to Algorithm and Hardware Co-Design. BMVC 1994: 1-10 - [c5]Richard A. Lane, Neil A. Thacker, Peter A. Ivey:
A Correlation Chip for Stereo Vision. BMVC 1994: 1-10 - [c4]Jason L. Kelly, Peter A. Ivey:
Defect Tolerant SRAM Based FPGAs. ICCD 1994: 479-482 - [c3]Rob A. Yates, Stephen J. Evans, Peter A. Ivey:
A 1.2 Billion Operations per Second Video Signal Processing Chip. ICIP (3) 1994: 596-600 - [c2]John Goodenough, Richard J. Meacham, Jonathan D. Morris, Nicholas Luke Seed, Peter A. Ivey:
A General Purpose, Single Chip Video Signal Processing (VSP) Architecture for Image Processing, Coding and Computer Vision. ICIP (3) 1994: 601-605 - [e1]Kakayuki Yanagawa, Peter A. Ivey:
VLSI 93, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Grenoble, France, 7-10 September, 1993. IFIP Transactions A-42, North-Holland 1994, ISBN 0-444-89911-1 [contents]
1980 – 1989
- 1988
- [c1]Manfred Glesner, M. Huch, Peter A. Ivey, T. Midwinter, Gabriele Saucier, Jacques Trilhe:
Entwurf eines systolischen Arrays in Wafer Scale Technik für die digitale Signalverarbeitung. GI Jahrestagung (2) 1988: 75-91
Coauthor Index
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