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Sungho Kang 0001
Person information
- affiliation: Yonsei University, Seoul, South Korea
Other persons with the same name
- Sungho Kang — disambiguation page
- Sungho Kang 0002
— Sungkyunkwan University, Department of Electrical and Computer Engineering, Seoul, South Korea
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2020 – today
- 2024
- [j81]Hayoung Lee
, Sooryeong Lee, Sungho Kang
:
A New Fail Address Memory Architecture for Cost-Effective ATE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1260-1273 (2024) - [j80]Hyeonchan Lim
, Tae-Hyun Kim
, Sungho Kang
:
Reconfigurable Multi-Bit Scan Flip-Flop for Cell-Aware Diagnosis. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 2024-2028 (2024) - [j79]Sangjun Lee
, Jongho Park
, Sungwhan Park, Hyemin Kim, Sungho Kang
:
A New Zero-Overhead Test Method for Low-Power AI Accelerators. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2649-2653 (2024) - [j78]Hayoung Lee
, Sooryeong Lee, Sungho Kang
:
RA-Aware Fail Data Collection Architecture for Cost Reduction. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1136-1149 (2024) - 2023
- [j77]Youngkwang Lee
, Donghyun Han
, Sooryeong Lee, Sungho Kang
:
Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 308-321 (2023) - [j76]Hayoung Lee
, Seung Ho Shin, Younwoo Yoo, Sungho Kang
:
TRUST: Through-Silicon via Repair Using Switch Matrix Topology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2377-2390 (2023) - [j75]Sunghoon Kim
, Seokjun Jang
, Sungho Kang
:
Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault Diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2717-2727 (2023) - [j74]Hayoung Lee
, Jihye Kim
, Jongho Park
, Sungho Kang
:
STRAIT: Self-Test and Self-Recovery for AI Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 3092-3104 (2023) - [j73]Yong Lee, Seokjun Jang
, Sungho Kang
:
Shift Left Quality Management System (QMS) Using a 3-D Matrix Scanning Method on System on a Chip. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1580-1584 (2023) - [j72]Youngkwang Lee
, Donghyun Han
, Sungho Kang
:
TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 578-590 (2023) - [c50]Younwoo Yoo, Hayoung Lee, Seung Ho Shin, Sungho Kang:
GPU-Based Redundancy Analysis using Partitioning Method for Memory Repair. ISOCC 2023: 1-2 - [c49]Sunghoon Kim, Donghyun Han, Seokjun Jang, Sungho Kang:
LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard Architecture. ISOCC 2023: 289-290 - [c48]Hayoung Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
Redundancy Analysis Simplification Scheme for High-Speed Memory Repair. ISOCC 2023: 339-340 - [c47]Hyemin Kim, Sangjun Lee, Jongho Park, Sungwhan Park, Sungho Kang:
A New Flip-flop Shared Architecture of Test Point Insertion for Scan Design. ISOCC 2023: 343-344 - 2022
- [j71]Youngkwang Lee, Young-Woo Lee
, Sungyoul Seo
, Sungho Kang
:
Reduced-Pin-Count BOST for Test-Cost Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 750-761 (2022) - [j70]Sangmin Park, Minho Cheong
, Donghyun Han
, Sungho Kang
:
Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1142-1153 (2022) - [j69]Hogyeong Kim
, Hayoung Lee
, Donghyun Han
, Sungho Kang
:
Multibank Optimized Redundancy Analysis Using Efficient Fault Collection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2739-2752 (2022) - [j68]Gyungbin Kim
, Minho Cheong
, Sungho Kang
:
SPAR: A New Test-Point Insertion Using Shared Points for Area Overhead Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4939-4951 (2022) - [j67]Hyeonchan Lim, Hyojoon Yun, Sungho Kang
:
A Hybrid Test Scheme for Automotive IC in Multisite Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5671-5680 (2022) - [j66]Hyeonchan Lim, Hyojoon Yun, Sungho Kang
:
Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4498-4502 (2022) - [j65]Hayoung Lee
, Younwoo Yoo, Seung Ho Shin, Sungho Kang
:
ECMO: ECC Architecture Reusing Content-Addressable Memories for Obtaining High Reliability in DRAM. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 781-793 (2022) - [c46]Seung Ho Shin, Hayoung Lee
, Sooryeong Lee, Younwoo Yoo, Sungho Kang:
An Improved Early Termination Methodology Using Convolutional Neural Network. ISOCC 2022: 21-22 - [c45]Sooryeong Lee, Hayoung Lee
, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
PROG: Per-Row Output Generator for BOST. ISOCC 2022: 23-24 - [c44]Hayoung Lee
, Sooryeong Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
FAME: Fault Address Memory Structure for Repair Time Reduction. ISOCC 2022: 31-32 - [c43]Jongho Park, Sangjun Lee, Inhwan Lee, Sungwhan Park, Sungho Kang:
Correlation Aware Random Pattern Generation for Test Time and Shift Power Reduction of Logic BIST. ISOCC 2022: 53-54 - [c42]Jihye Kim, Hayoung Lee
, Jongho Park, Sungho Kang:
ZOS: Zero Overhead Scan for Systolic Array-based AI accelerator. ISOCC 2022: 360-361 - 2021
- [j64]Jaewon Park, Jae Hoon Lee, Sang-Kil Park, Ki Chul Chun
, Kyomin Sohn
, Sungho Kang
:
An In-DRAM BIST for 16 Gb DDR4 DRAM in the 2nd 10-nm-Class DRAM Process. IEEE Access 9: 33487-33497 (2021) - [j63]Hayoung Lee
, Hyunggoy Oh, Sungho Kang
:
On-Chip Error Detection Reusing Built-In Self-Repair for Silicon Debug. IEEE Access 9: 56443-56456 (2021) - [j62]Donghyun Han
, Hayoung Lee
, Sungho Kang
:
Effective Spare Line Allocation Built-in Redundancy Analysis With Base Common Spare for Yield Improvement of 3D Memory. IEEE Access 9: 76716-76729 (2021) - [j61]Hyungil Woo
, Seokjun Jang, Sungho Kang
:
A Secure Scan Architecture Protecting Scan Test and Scan Dump Using Skew-Based Lock and Key. IEEE Access 9: 102161-102176 (2021) - [j60]Kwonhyoung Lee
, Sangjun Lee
, Jongho Park
, Inhwan Lee, Sungho Kang
:
A Low-Power BIST Scheme Using Weight-Aware Scan Grouping and Scheduling for Automotive ICs. IEEE Access 9: 116115-116132 (2021) - [j59]Seokjun Jang, Jihye Kim
, Sungho Kang
:
Reconfigurable Scan Architecture for High Diagnostic Resolution. IEEE Access 9: 120537-120550 (2021) - [j58]Donghyun Han
, Hayoung Lee
, Seungtaek Lee, Sungho Kang
:
ECC-Aware Fast and Reliable Pattern Matching Redundancy Analysis for Highly Reliable Memory. IEEE Access 9: 133274-133288 (2021) - [j57]Sangjun Lee, Kyunghwan Cho, Jihye Kim, Jongho Park, Inhwan Lee, Sungho Kang
:
Low-Power Scan Correlation-Aware Scan Cluster Reordering for Wireless Sensor Networks. Sensors 21(18): 6111 (2021) - [j56]Jungil Mok
, Hyeonchan Lim, Sungho Kang
:
Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1164-1177 (2021) - [c41]Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang:
A Circular-based TSV Repair Architecture. ISOCC 2021: 1-2 - [c40]Donghyun Han, Youngkwang Lee, Sooryeong Lee, Sungho Kang:
Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC. ISOCC 2021: 101-102 - [c39]Younwoo Yoo, Hayoung Lee
, Seung Ho Shin, Sungho Kang:
Post-bond Repair of Line Faults with Double-bit ECC for 3D Memory. ISOCC 2021: 427-428 - [c38]Seung Ho Shin, Hayoung Lee
, Younwoo Yoo, Sungho Kang:
An Effective Spare Allocation Methodology for 3D Memory Repair with BIRA. ISOCC 2021: 429-430 - [c37]Youngki Moon, Hyunho Yoo, Donghyun Han, Sungho Kang:
Area Efficient Built-In Redundancy Analysis using Pre-Solutions with Various Spare Structure. ISOCC 2021: 431-432 - 2020
- [j55]Jihye Kim
, Hayoung Lee
, Seokjun Jang, Sungho Kang
:
Fine-Grained Defect Diagnosis for CMOL FPGA Circuits. IEEE Access 8: 163140-163151 (2020) - [j54]Minho Cheong
, Ingeol Lee
, Sungho Kang
:
A 3-D Rotation-Based Through-Silicon via Redundancy Architecture for Clustering Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9): 1925-1934 (2020) - [j53]Young-Woo Lee
, Hyeonchan Lim, Youngkwang Lee, Sungho Kang
:
Robust Secure Shield Architecture for Detection and Protection Against Invasive Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 3023-3034 (2020) - [j52]Sangjun Lee
, Kyunghwan Cho, Sungki Choi, Sungho Kang
:
A New Logic Topology-Based Scan Chain Stitching for Test-Power Reduction. IEEE Trans. Circuits Syst. 67-II(12): 3432-3436 (2020) - [j51]Tae Hyun Kim
, Hayoung Lee
, Sungho Kang
:
GPU-Based Redundancy Analysis Using Concurrent Evaluation. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 805-817 (2020) - [c36]Hayoung Lee
, Donghyun Han
, Hogyeong Kim, Sungho Kang:
Redundancy Analysis Optimization with Clustered Known Solutions for High Speed Repair. ISOCC 2020: 51-52 - [c35]Jihye Kim, Hayoung Lee
, Seokjun Jang, Hogyeong Kim, Sungho Kang:
Memory-like Defect Diagnosis for CMOL FPGAs. ISOCC 2020: 139-140 - [c34]Hayoung Lee
, Keewon Cho, Sungho Kang, Wooheon Kang, Seungtaek Lee, Woosik Jeong:
Fail Memory Configuration Set for RA Estimation. ITC 2020: 1-9 - [c33]Hayoung Lee
, Donghyun Han
, Hogyeong Kim, Sungho Kang:
W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction. ITC-Asia 2020: 94-99
2010 – 2019
- 2019
- [j50]Jaewon Jang, Minho Cheong
, Sungho Kang
:
TSV Repair Architecture for Clustered Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 190-194 (2019) - [j49]Keewon Cho
, Young-Woo Lee, Sungyoul Seo
, Sungho Kang
:
An Efficient BIRA Utilizing Characteristics of Spare Pivot Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3): 551-561 (2019) - [j48]Ingeol Lee
, Minho Cheong
, Sungho Kang
:
Highly Reliable Redundant TSV Architecture for Clustered Faults. IEEE Trans. Reliab. 68(1): 237-247 (2019) - [j47]Jihye Kim
, Sangjun Lee
, Sungho Kang
:
Test-Friendly Data-Selectable Self-Gating (DSSG). IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1972-1976 (2019) - [j46]Hayoung Lee
, Donghyun Han
, Seungtaek Lee, Sungho Kang
:
Dynamic Built-In Redundancy Analysis for Memory Repair. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2365-2374 (2019) - [c32]Jihye Kim, Sangjun Lee, Minho Moon, Sungho Kang:
Transition-delay Test Methodology for Designs with Self-gating. ISOCC 2019: 93-94 - [c31]Young-Woo Lee, Youngkwang Lee, Minho Moon, Sungho Kang:
Tunable Compact Probing Detector with Fast Analysis Time Against Invasive Attacks. ISOCC 2019: 115-116 - [c30]Kyunghwan Cho, Jihye Kim, Hyunggoy Oh, Sangjun Lee, Sungho Kang:
A New Scan Chain Reordering Method for Low Power Consumption based on Care Bit Density. ISOCC 2019: 134-135 - [c29]Hayoung Lee
, Donghyun Han
, Seungtaek Lee, Sungho Kang:
Redundancy Analysis based on Fault Distribution for Memory with Complex Spares. ISOCC 2019: 235-236 - 2018
- [j45]Sungyoul Seo
, Keewon Cho
, Young-Woo Lee, Sungho Kang
:
A Statistic-Based Scan Chain Reordering for Energy-Quality Scalable Scan Test. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 391-403 (2018) - [j44]Inhyuk Choi
, Hyunggoy Oh, Young-Woo Lee, Sungho Kang
:
Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost. IEEE Trans. Computers 67(12): 1835-1839 (2018) - [j43]Jaeil Lim, Hyunggoy Oh, Heetae Kim, Sungho Kang
:
Thermal Aware Test Scheduling for NTV Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 906-910 (2018) - [j42]Hayoung Lee
, Kiwon Cho
, Donghyun Kim, Sungho Kang
:
Fault Group Pattern Matching With Efficient Early Termination for High-Speed Redundancy Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1473-1482 (2018) - [j41]Hayoung Lee
, Jooyoung Kim, Keewon Cho, Sungho Kang
:
Fast Built-In Redundancy Analysis Based on Sequential Spare Line Allocation. IEEE Trans. Reliab. 67(1): 264-273 (2018) - [j40]Donghyun Kim, Hayoung Lee
, Sungho Kang
:
An Area-Efficient BIRA With 1-D Spare Segments. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 206-210 (2018) - [c28]Hyunggoy Oh, Heetae Kim, Sangjun Lee, Sungho Kang:
Dynamic voltage Drop induced Path Delay Analysis for STV and NTV Circuits during At-speed Scan Test. ISOCC 2018: 7-8 - [c27]Heetae Kim, Hyunggoy Oh, Sangjun Lee, Sungho Kang:
Low Power Scan Chain Architecture Based on Circuit Topology. ISOCC 2018: 267-268 - [c26]Donghyun Han
, Hayoung Lee
, Seungtaek Lee, Minho Moon, Sungho Kang:
3D Memory Formed of Unrepairable Memory Dice and Spare Layer. TENCON 2018: 1362-1366 - 2017
- [j39]Hyunggoy Oh, Heetae Kim, Jaeil Lim, Sungho Kang:
Reconfigurable scan architecture for test power and data volume reduction. IEICE Electron. Express 14(13): 20170415 (2017) - [j38]Heetae Kim, Hyunggoy Oh, Jaeil Lim, Sungho Kang:
A novel X-filling method for capture power reduction. IEICE Electron. Express 14(23): 20171093 (2017) - [j37]Younsun Kim, Hyunggoy Oh, Sungho Kang:
Proof of Concept of Home IoT Connected Vehicles. Sensors 17(6): 1289 (2017) - [j36]Hyunggoy Oh, Taewoo Han, Inhyuk Choi, Sungho Kang
:
An On-Chip Error Detection Method to Reduce the Post-Silicon Debug Time. IEEE Trans. Computers 66(1): 38-44 (2017) - [j35]Hyunggoy Oh, Inhyuk Choi, Sungho Kang
:
DRAM-Based Error Detection Method to Reduce the Post-Silicon Debug Time for Multiple Identical Cores. IEEE Trans. Computers 66(9): 1504-1517 (2017) - [j34]Jaeseok Park, Hyunyul Lim, Sungho Kang
:
FRESH: A New Test Result Extraction Scheme for Fast TSV Tests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(2): 336-345 (2017) - [j33]Young-Woo Lee, Hyeonchan Lim, Sungho Kang
:
Grouping-Based TSV Test Architecture for Resistive Open and Bridge Defects in 3-D-ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1759-1763 (2017) - [j32]Jooyoung Kim, Woosung Lee, Keewon Cho, Sungho Kang
:
Hardware-Efficient Built-In Redundancy Analysis for Memory With Various Spares. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 844-856 (2017) - [j31]Jaewon Jang, Minho Cheong, Jin-Ho Ahn, Sung Kyu Lim
, Sungho Kang
:
Chain-Based Approach for Fast Through-Silicon-Via Coupling Delay Estimation. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1178-1182 (2017) - [c25]Donghyun Han
, Hayoung Lee
, Donghyun Kim, Sungho Kang:
A new repair scheme for TSV-based 3D memory using base die repair cells. ISOCC 2017: 11-12 - [c24]Hyunggoy Oh, Heetae Kim, Jaeil Lim, Sungho Kang:
A selective error data capture method using on-chip DRAM for silicon debug of multi-core design. ISOCC 2017: 121-122 - 2016
- [j30]Sungyoul Seo
, Yong Lee, Sungho Kang:
Tri-State Coding Using Reconfiguration of Twisted Ring Counter for Test Data Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 274-284 (2016) - [j29]Taewoo Han, Inhyuk Choi, Hyunggoy Oh, Sungho Kang:
Parallelized Network-on-Chip-Reused Test Access Mechanism for Multiple Identical Cores. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1219-1223 (2016) - [j28]Wooheon Kang, Changwook Lee, Hyunyul Lim, Sungho Kang
:
A New 3-D Fuse Architecture to Improve Yield of 3-D Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1763-1767 (2016) - [c23]Hyunggoy Oh, Inhyuk Choi, Sungho Kang:
A new online test and debug methodology for automotive camera image processing system. APCCAS 2016: 370-371 - [c22]Inhyuk Choi, Hyunggoy Oh, Sungho Kang:
Test access mechaism for stack test time reduction of 3-dimensional integrated circuit. APCCAS 2016: 522-525 - [c21]Keewon Cho, Jooyoung Kim, Hayoung Lee
, Sungho Kang:
Discussion of cost-effective redundancy architectures. ISOCC 2016: 97-98 - [c20]Heetae Kim, Inhyuk Choi, Jaeil Lim, Hyunggoy Oh, Sungho Kang:
Process variation-aware bridge fault analysis. ISOCC 2016: 147-148 - 2015
- [j27]Haksong Kim, Yong Lee, Sungho Kang:
A Novel Massively Parallel Testing Method Using Multi-Root for High Reliability. IEEE Trans. Reliab. 64(1): 486-496 (2015) - [c19]Sungyoul Seo, Yong Lee, Hyeonchan Lim, Joohwan Lee, Hongbom Yoo, Yojoung Kim, Sungho Kang:
Scan Chain Reordering-Aware X-Filling and Stitching for Scan Shift Power Reduction. ATS 2015: 1-6 - [c18]Sungyoul Seo, Yong Lee, Joohwan Lee, Sungho Kang:
A scan shifting method based on clock gating of multiple groups for low power scan testing. ISQED 2015: 162-166 - [c17]Hyunyul Lim, Wooheon Kang, Sungyoul Seo, Yong Lee, Sungho Kang:
Low power scan bypass technique with test data reduction. ISQED 2015: 173-176 - 2014
- [c16]Taewoo Han, Inhyuk Choi, Hyunggoy Oh, Sungho Kang:
A Scalable and Parallel Test Access Strategy for NoC-Based Multicore System. ATS 2014: 81-86 - 2011
- [j26]Hyunjin Kim, Sungho Kang:
Communication-aware task scheduling and voltage selection for total energy minimization in a multiprocessor system using Ant Colony Optimization. Inf. Sci. 181(18): 3995-4008 (2011) - [j25]Hong-Sik Kim, Joohong Lee, Hyunjin Kim, Sungho Kang, Woo-Chan Park:
A Lossless Color Image Compression Architecture Using a Parallel Golomb-Rice Hardware CODEC. IEEE Trans. Circuits Syst. Video Technol. 21(11): 1581-1587 (2011) - [j24]Hyunjin Kim, Hong-Sik Kim, Sungho Kang:
A Memory-Efficient Bit-Split Parallel String Matching Using Pattern Dividing for Intrusion Detection Systems. IEEE Trans. Parallel Distributed Syst. 22(11): 1904-1911 (2011) - 2010
- [j23]Hyunjin Kim, Sungho Kang:
A Pattern Group Partitioning for Parallel String Matching using a Pattern Grouping Metric. IEEE Commun. Lett. 14(9): 878-880 (2010) - [j22]Hyunjin Kim, Hyejeong Hong, Dongmyoung Baek, Jin-Ho Ahn, Sungho Kang:
A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection. IEICE Electron. Express 7(5): 377-382 (2010) - [j21]Hong-Sik Kim, Young H. Jung, Hyunjin Kim, Jin-Ho Ahn, Woo-Chan Park, Sungho Kang:
A high performance network-on-chip scheme using lossless data compression. IEICE Electron. Express 7(11): 791-796 (2010) - [j20]YongJoon Kim, Jaeseok Park, Sungho Kang:
A Selective Scan Chain Activation Technique for Minimizing Average and Peak Power Consumption. IEICE Trans. Inf. Syst. 93-D(1): 193-196 (2010) - [j19]YongJoon Kim, Jaeseok Park, Sungho Kang:
Selective Scan Slice Grouping Technique for Efficient Test Data Compression. IEICE Trans. Inf. Syst. 93-D(2): 380-383 (2010) - [j18]Hyunjin Kim, Hong-Sik Kim, Jung-Hee Lee, Jin-Ho Ahn, Sungho Kang:
A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection. IEICE Trans. Commun. 93-B(2): 396-398 (2010) - [j17]Hyuntae Park, Hyunjin Kim, Hong-Sik Kim, Sungho Kang:
A Fast IP Address Lookup Algorithm Based on Search Space Reduction. IEICE Trans. Commun. 93-B(4): 1009-1012 (2010) - [j16]Hyunjin Kim, Hyejeong Hong, Dongmyong Baek, Sungho Kang:
A Pattern Partitioning Algorithm for Memory-Efficient Parallel String Matching in Deep Packet Inspection. IEICE Trans. Commun. 93-B(6): 1612-1614 (2010) - [j15]Seongyong Ahn, Hyejeong Hong, Hyunjin Kim, Jin-Ho Ahn, Dongmyong Baek, Sungho Kang:
A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection. IEICE Trans. Commun. 93-B(9): 2440-2442 (2010)
2000 – 2009
- 2009
- [j14]Hyunjin Kim, Hyejeong Hong, Hong-Sik Kim, Sungho Kang:
A memory-efficient parallel string matching for intrusion detection systems. IEEE Commun. Lett. 13(12): 1004-1006 (2009) - [j13]YongJoon Kim, Jaeseok Park, Sungho Kang:
Selective scan slice repetition for simultaneous reduction of test power consumption and test data volume. IEICE Electron. Express 6(20): 1432-1437 (2009) - [j12]YongJoon Kim, Myung-Hoon Yang, Jaeseok Park, Eunsei Park, Sungho Kang:
Grouped Scan Slice Repetition Method for Reducing Test Data Volume and Test Application Time. IEICE Trans. Inf. Syst. 92-D(7): 1462-1465 (2009) - [c15]Younsun Kim, Hong-Sik Kim, R. Lee, Sungho Kang:
FPGA-based verification methodology of SoC-type CMOS image signal processor. SoCC 2009: 231-234 - [c14]Sunghoon Chun, YongJoon Kim, Taejin Kim, Sungho Kang:
A High-Level Signal Integrity Fault Model and Test Methodology for Long On-Chip Interconnections. VTS 2009: 152-157 - 2008
- [j11]Hong-Sik Kim, Sungho Kang, Michael S. Hsiao:
A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment. J. Electron. Test. 24(4): 365-378 (2008) - [j10]Myung-Hoon Yang, YongJoon Kim, Sunghoon Chun, Sungho Kang:
An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR. J. Electron. Test. 24(6): 591-595 (2008) - [j9]Hong-Sik Kim, Hyunjin Kim, Sungho Kang:
Ant colony based efficient triplet calculation methodology for arithmetic built-in self test. IEICE Electron. Express 5(20): 877-881 (2008) - [j8]Hyunjin Kim, Hyejeong Hong, Hong-Sik Kim, Jin-Ho Ahn, Sungho Kang:
Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2088-2092 (2008) - [c13]Sunghoon Chun, YongJoon Kim, Taejin Kim, Myung-Hoon Yang, Sungho Kang:
XPDF-ATPG: An Efficient Test Pattern Generation for Crosstalk-Induced Faults. ATS 2008: 83-88 - [c12]Taejin Kim, Sunghoon Chun, YongJoon Kim, Myung-Hoon Yang, Sungho Kang:
An Effective Hybrid Test Data Compression Method Using Scan Chain Compaction and Dictionary-Based Scheme. ATS 2008: 151-156 - [c11]Sunghoon Chun, Taejin Kim, YongJoon Kim, Sungho Kang:
An Efficient Scan Chain Diagnosis Method Using a New Symbolic Simulation. VTS 2008: 73-78 - 2007
- [j7]Sunghoon Chun, YongJoon Kim, Sungho Kang:
MDSI: Signal Integrity Interconnect Fault Modeling and Testing for SoCs. J. Electron. Test. 23(4): 357-362 (2007) - [c10]Sunghoon Chun, YongJoon Kim, Sungho Kang:
High-MDSI: A High-level Signal Integrity Fault Test Pattern Generation Method for Interconnects. ATS 2007: 115-120 - 2006
- [j6]Sunghoon Chun, Sangwook Kim, Hong-Sik Kim, Sungho Kang:
An Efficient Dictionary Organization for Maximum Diagnosis. J. Electron. Test. 22(1): 37-48 (2006) - [j5]Hong-Sik Kim, Sungho Kang:
Increasing encoding efficiency of LFSR reseeding-based test compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 913-917 (2006) - [j4]Sunghoon Chun, YongJoon Kim, Jung-Been Im, Sungho Kang:
MICRO: a new hybrid test data compression/decompression scheme. IEEE Trans. Very Large Scale Integr. Syst. 14(6): 649-654 (2006) - [c9]YongJoon Kim, Myung-Hoon Yang, Youngkyu Park, Daeyeal Lee, Sungho Kang:
An Effective Test Pattern Generation for Testing Signal Integrity. ATS 2006: 279-286 - [c8]Jin-Ho Ahn, Hyunjin Kim, Byung In Moon, Sungho Kang:
System on a Chip Implementation of Social Insect Behavior for Adaptive Network Routing. ICIC (2) 2006: 530-535 - 2005
- [c7]Youbean Kim, Myung-Hoon Yang, Yong Lee, Sungho Kang:
A New Low Power Test Pattern Generator using a Transition Monitoring Window based on BIST Architecture. Asian Test Symposium 2005: 230-235 - 2004
- [j3]Cheong Ghil Kim, Hong-Sik Kim, Sungho Kang, Shin-Dug Kim, Gunhee Han:
An Acceleration Processor for Data Intensive Scientific Computing. IEICE Trans. Inf. Syst. 87-D(7): 1766-1773 (2004) - [j2]YongJoon Kim, Hyun-Don Kim, Sungho Kang:
A new maximal diagnosis algorithm for interconnect test. IEEE Trans. Very Large Scale Integr. Syst. 12(5): 532-537 (2004) - 2003
- [j1]Hong-Sik Kim, YongJoon Kim, Sungho Kang:
Test-decompression mechanism using a variable-length multiple-polynomial LFSR. IEEE Trans. Very Large Scale Integr. Syst. 11(4): 687-690 (2003) - [c6]YongJoon Kim, DongSub Song, YongSeung Shin, Sunghoon Chun, Sungho Kang:
A New Maximal Diagnosis Algorithm for Bus-structured Systems. ITC 2003: 349-357 - 2002
- [c5]Hong-Sik Kim, Sungho Kang:
DPSC SRAM Transparent Test Algorithm. Asian Test Symposium 2002: 145-150 - 2001
- [c4]Hong-Sik Kim, Jin-kyue Lee, Sungho Kang:
A Heuristic for Multiple Weight Set Generation. ICCD 2001: 513-514 - [c3]Hong-Sik Kim, Jin-kyue Lee, Sungho Kang:
A new multiple weight set calculation algorithm. ITC 2001: 878-884
1990 – 1999
- 1999
- [c2]Jongchul Shin, Hyunjin Kim, Sungho Kang:
At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks. DATE 1999: 473- - [c1]Hyunjin Kim, Jongchul Shin, Sungho Kang:
An Efficient Interconnect Test Using BIST Module in a Boundary-Scan Environment. ICCD 1999: 328-329
Coauthor Index
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
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