default search action
Sri Parameswaran
Sridevan Parameswaran
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j50]Darshana Jayasinghe, Brian Udugama, Sri Parameswaran:
1LUTSensor: Detecting FPGA Voltage Fluctuations using LookUp Tables. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(1): 51-86 (2024) - [j49]Sajid Hussain, Hui Guo, Tuo Li, Sri Parameswaran:
MP-ORAM: A Novel ORAM Design for Multicore Processor Systems. IEEE Trans. Dependable Secur. Comput. 21(4): 3719-3733 (2024) - [c163]Brian Udugama, Darshana Jayasinghe, Sri Parameswaran:
Sensors for Remote Power Attacks: New Developments and Challenges. ASPDAC 2024: 333-340 - [c162]Jing Gong, Hassaan Saadat, Haris Javaid, Hasindu Gamaarachchi, David Taubman, Sri Parameswaran:
SEA: Sign-Separated Accumulation Scheme for Resource-Efficient DNN Accelerators. DATE 2024: 1-6 - [c161]Kisaru Liyanage, Hasindu Gamaarachchi, Hassaan Saadat, Tuo Li, Hiruna Samarakoon, Sri Parameswaran:
Accelerating Chaining in Genomic Analysis Using RISC- V Custom Instructions. DATE 2024: 1-6 - [c160]Mekala Bindu Bhargavi, Grandhala Sri Sai Harshith, Sri Parameswaran, Soumya J.:
Optimizing LU Decomposition with RISC-V Based Hardware Acceleration. ISVLSI 2024: 210-215 - [e4]Francesco Regazzoni, Bodhisatwa Mazumdar, Sri Parameswaran:
Security, Privacy, and Applied Cryptography Engineering - 13th International Conference, SPACE 2023, Roorkee, India, December 14-17, 2023, Proceedings. Lecture Notes in Computer Science 14412, Springer 2024, ISBN 978-3-031-51582-8 [contents] - 2023
- [j48]Kisaru Liyanage, Hasindu Gamaarachchi, Roshan G. Ragel, Sri Parameswaran:
Cross Layer Design Using HW/SW Co-Design and HLS to Accelerate Chaining in Genomic Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 2924-2937 (2023) - [j47]Jing Gong, Hassaan Saadat, Hasindu Gamaarachchi, Haris Javaid, Xiaobo Sharon Hu, Sri Parameswaran:
ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3505-3518 (2023) - [j46]Alberto Bosio, Lara Dolecek, Alexandra Kourfali, Sri Parameswaran, Alessandro Savino:
Special Issue: "Approximation at the Edge". ACM Trans. Embed. Comput. Syst. 22(4): 72:1-72:4 (2023) - [c159]Darshana Jayasinghe, Brian Udugama, Sri Parameswaran:
FPGA Based Countermeasures against Side Channel Attacks on Block Ciphers. ASP-DAC 2023: 365-371 - [c158]Hasindu Gamaarachchi, Kisaru Liyanage, Sri Parameswaran:
Invited: Algorithms and Architectures for Accelerating Long Read Sequence Analysis. DAC 2023: 1-4 - 2022
- [j45]Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran:
VITI: A Tiny Self-Calibrating Sensor for Power-Variation Measurement in FPGAs. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 657-678 (2022) - [j44]Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran:
A Power to Pulse Width Modulation Sensor for Remote Power Analysis Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(4): 589-613 (2022) - [c157]Tuo Li, Sri Parameswaran:
FaSe: fast selective flushing to mitigate contention-based cache timing attacks. DAC 2022: 541-546 - [c156]Hsu-Kang Dow, Tuo Li, Sri Parameswaran:
HWST128: complete memory safety accelerator on RISC-V with metadata compression. DAC 2022: 709-714 - [i9]Tuo Li, Sri Parameswaran:
Fast Selective Flushing to Mitigate Contention-based Cache Timing Attacks. CoRR abs/2204.05508 (2022) - [i8]Jing Gong, Hassaan Saadat, Hasindu Gamaarachchi, Haris Javaid, Xiaobo Sharon Hu, Sri Parameswaran:
ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference. CoRR abs/2209.04161 (2022) - [i7]Po Jui Shih, Hassaan Saadat, Sri Parameswaran, Hasindu Gamaarachchi:
Efficient Real-Time Selective Genome Sequencing on Resource-Constrained Devices. CoRR abs/2211.07340 (2022) - 2021
- [j43]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
UCloD: Small Clock Delays to Mitigate Remote Power Analysis Attacks. IEEE Access 9: 108411-108425 (2021) - [j42]Sajid Hussain, Hui Guo, Tuo Li, Hassaan Saadat, Sri Parameswaran:
COPS: A complete oblivious processing system. Microprocess. Microsystems 85: 104295 (2021) - [j41]Darshana Jayasinghe, Aleksandar Ignjatovic, Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran:
QuadSeal: Quadruple Balancing to Mitigate Power Analysis Attacks with Variability Effects and Electromagnetic Fault Injection Attacks. ACM Trans. Design Autom. Electr. Syst. 26(5): 33:1-33:36 (2021) - [c155]Georgios Zervakis, Hassaan Saadat, Hussam Amrouch, Andreas Gerstlauer, Sri Parameswaran, Jörg Henkel:
Approximate Computing for ML: State-of-the-art, Challenges and Visions. ASP-DAC 2021: 189-196 - [c154]Hsu-Kang Dow, Tuo Li, William Miles, Sri Parameswaran:
SHORE: Hardware/Software Method for Memory Safety Acceleration on RISC-V. DAC 2021: 289-294 - 2020
- [j40]Hasindu Gamaarachchi, Wai Chun Lam, Gihan Jayatilaka, Hiruna Samarakoon, Jared T. Simpson, Martin A. Smith, Sri Parameswaran:
GPU accelerated adaptive banded event alignment for rapid comparative nanopore signal analysis. BMC Bioinform. 21(1): 343 (2020) - [j39]Vikkitharan Gnanasambandapillai, Jorgen Peddersen, Roshan G. Ragel, Sri Parameswaran:
FINDER: Find Efficient Parallel Instructions for ASIPs to Improve Performance of Large Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3577-3588 (2020) - [j38]Arash Bayat, Nandan P. Deshpande, Marc R. Wilkins, Sri Parameswaran:
Fast Short Read De-Novo Assembly Using Overlap-Layout-Consensus Approach. IEEE ACM Trans. Comput. Biol. Bioinform. 17(1): 334-338 (2020) - [j37]Hasindu Gamaarachchi, Arash Bayat, Bruno Gaëta, Sri Parameswaran:
Cache Friendly Optimisation of de Bruijn Graph Based Local Re-Assembly in Variant Calling. IEEE ACM Trans. Comput. Biol. Bioinform. 17(4): 1125-1133 (2020) - [j36]Amin Malekpour, Roshan G. Ragel, Tuo Li, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran:
Hardware Trojan Mitigation in Pipelined MPSoCs. ACM Trans. Design Autom. Electr. Syst. 25(1): 6:1-6:27 (2020) - [c153]Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran:
WEID: Worst-case Error Improvement in Approximate Dividers. ASP-DAC 2020: 593-598 - [c152]Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran:
REALM: Reduced-Error Approximate Log-based Integer Multiplier. DATE 2020: 1366-1371 - [c151]Farah Abid, Darshana Jayasinghe, Sompasong Somsavaddy, Sri Parameswaran:
LFTSM: Lightweight and Fully Testable SEU Mitigation System for Xilinx Processor-Based SoCs. FPL 2020: 162-168 - [c150]Ann Franchesca Laguna, Hasindu Gamaarachchi, Xunzhao Yin, Michael T. Niemier, Sri Parameswaran, Xiaobo Sharon Hu:
Seed-and-Vote based In-Memory Accelerator for DNA Read Mapping. ICCAD 2020: 56:1-56:9 - [c149]Hassaan Saadat, Tuo Li, Haris Javaid, Sri Parameswaran:
A Sub-Range Error Characterization based Selection Methodology for Approximate Arithmetic Units. VLSID 2020: 84-89 - [i6]Tuo Li, Bradley Hopkins, Sri Parameswaran:
SIMF: Single-Instruction Multiple-Flush Mechanism for Processor Temporal Isolation. CoRR abs/2011.10249 (2020)
2010 – 2019
- 2019
- [j35]Arash Bayat, Bruno Gaëta, Aleksandar Ignjatovic, Sri Parameswaran:
Pairwise alignment of nucleotide sequences using maximal exact matches. BMC Bioinform. 20(1): 261:1-261:15 (2019) - [j34]Ram Prasad Mohanty, Hasindu Gamaarachchi, Andrew J. Lambert, Sri Parameswaran:
SWARAM: Portable Energy and Cost Efficient Embedded System for Genomic Processing. ACM Trans. Embed. Comput. Syst. 18(5s): 61:1-61:24 (2019) - [c148]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
RFTC: Runtime Frequency Tuning Countermeasure Using FPGA Dynamic Reconfiguration to Mitigate Power Analysis Attacks. DAC 2019: 139 - [c147]Hassaan Saadat, Haris Javaid, Sri Parameswaran:
Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias. DAC 2019: 161 - [c146]Amin Malekpour, Roshan G. Ragel, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran:
Hardware Trojan Detection and Recovery in MPSoCs via On-line Application Specific Testing. DDECS 2019: 1-6 - [c145]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks. ICCAD 2019: 1-7 - 2018
- [j33]Sri Parameswaran, R. Iris Bahar, David Z. Pan:
Conference Reports: Report on the 2017 International Conference on Computer-Aided Design (ICCAD). IEEE Des. Test 35(2): 101-102 (2018) - [j32]Hassaan Saadat, Haseeb Bokhari, Sri Parameswaran:
Minimally Biased Multipliers for Approximate Integer and Floating-Point Multiplication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2623-2635 (2018) - [c144]Vikkitharan Gnanasambandapillai, Arash Bayat, Sri Parameswaran:
MESGA: An MPSoC based embedded system solution for short read genome alignment. ASP-DAC 2018: 52-57 - [c143]Florencia Irena, Daniel Murphy, Sri Parameswaran:
CryptoBlaze: A partially homomorphic processor with multiple instructions and non-deterministic encryption support. ASP-DAC 2018: 702-708 - [c142]Mubashir Hussain, Amin Malekpour, Hui Guo, Sri Parameswaran:
EETD: An Energy Efficient Design for Runtime Hardware Trojan Detection in Untrusted Network-on-Chip. ISVLSI 2018: 345-350 - 2017
- [j31]Arash Bayat, Bruno Gaëta, Aleksandar Ignjatovic, Sri Parameswaran:
Improved VCF normalization for accurate VCF comparison. Bioinform. 33(7): 964-970 (2017) - [j30]Tao Liu, Hui Guo, Sri Parameswaran, Xiaobo Sharon Hu:
iCETD: An improved tag generation design for memory data authentication in embedded processor systems. Integr. 56: 96-104 (2017) - [j29]Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran:
Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors. IEEE Trans. Computers 66(4): 647-660 (2017) - [j28]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(2): 296-309 (2017) - [c141]Amin Malekpour, Roshan G. Ragel, Aleksandar Ignjatovic, Sri Parameswaran:
DoSGuard: Protecting pipelined MPSoCs against hardware Trojan based DoS attacks. ASAP 2017: 45-52 - [c140]Hassaan Saadat, Sri Parameswaran:
Hardware approximate computing: how, why, when and where? (special session). CASES 2017: 3:1-3:2 - [c139]Amin Malekpour, Roshan G. Ragel, Aleksandar Ignjatovic, Sri Parameswaran:
TrojanGuard: Simple and Effective Hardware Trojan Mitigation Techniques for Pipelined MPSoCs. DAC 2017: 19:1-19:6 - [c138]Sri Parameswaran:
Social Presence in Social Media: Persuasion, Design and Discourse. SIGMIS-CPR 2017: 205-206 - [c137]Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran:
NORA: Algorithmic Balancing without Pre-charge to Thwart Power Analysis Attacks. VLSID 2017: 167-172 - [p2]Haseeb Bokhari, Sri Parameswaran:
Network-on-Chip Design. Handbook of Hardware/Software Codesign 2017: 461-489 - [e3]Sri Parameswaran:
2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017, Irvine, CA, USA, November 13-16, 2017. IEEE 2017, ISBN 978-1-5386-3093-8 [contents] - 2016
- [j27]Tuo Li, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran:
Processor Design for Soft Errors: Challenges and State of the Art. ACM Comput. Surv. 49(3): 57:1-57:44 (2016) - [j26]Sri Parameswaran:
Editorial Introduction of New Editor-in-Chief and Associate Editors. IEEE Embed. Syst. Lett. 8(1): 1 (2016) - [j25]Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Sri Parameswaran:
Switchable cache: utilising dark silicon for application specific cache optimisations. IET Comput. Digit. Tech. 10(4): 157-164 (2016) - [c136]Tao Liu, Hui Guo, Sri Parameswaran, Xiaobo Sharon Hu:
Improving tag generation for memory data authentication in embedded processor systems. ASP-DAC 2016: 50-55 - [c135]Darshana Jayasinghe, Shivam Bhasin, Sri Parameswaran, Aleksandar Ignjatovic:
Does it sound as it claims: a detailed side-channel security analysis of QuadSeal countermeasure. Conf. Computing Frontiers 2016: 449-454 - [c134]Tuo Li, Jude Angelo Ambrose, Sri Parameswaran:
RECORD: Reducing register traffic for checkpointing in embedded processors. DATE 2016: 582-587 - [c133]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
The effect of amplitude resolution and mismatch on a digital-to-analog converter used for digital harmonic-cancelling sine-wave synthesis. ISCAS 2016: 2018-2021 - [c132]Nastaran Nemati, Mark C. Reed, Sri Parameswaran, Karl M. Fant:
Self-timed automatic test pattern generation for null convention logic. MWSCAS 2016: 1-4 - [i5]Hans Michael Gerndt, Michael Glaß, Sri Parameswaran, Barry L. Rountree:
Dark Silicon: From Embedded to HPC Systems (Dagstuhl Seminar 16052). Dagstuhl Reports 6(1): 224-244 (2016) - 2015
- [j24]Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Swarnalatha Radhakrishnan, Sri Parameswaran:
Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 1991-2003 (2015) - [c131]Josef Schneider, Jorgen Peddersen, Sri Parameswaran:
Speeding up single pass simulation of PLRUt caches. ASP-DAC 2015: 695-700 - [c130]Xi Zhang, Haris Javaid, Muhammad Shafique, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran:
ADAPT: An adaptive manycore methodology for software pipelined applications. ASP-DAC 2015: 701-706 - [c129]Darshana Jayasinghe, Aleksandar Ignjatovic, Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran:
QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks. CASES 2015: 21-30 - [c128]Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran:
SuperNet: multimode interconnect architecture for manycore chips. DAC 2015: 85:1-85:6 - [c127]Xi Zhang, Haris Javaid, Muhammad Shafique, Jorgen Peddersen, Jörg Henkel, Sri Parameswaran:
E-pipeline: elastic hardware/software pipelines on a many-core fabric. DATE 2015: 363-368 - [c126]Liang Tang, Jude Angelo Ambrose, Akash Kumar, Sri Parameswaran:
Dynamic reconfigurable puncturing for secure wireless communication. DATE 2015: 888-891 - [c125]Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran:
Malleable NoC: dark silicon inspired adaptable Network-on-Chip. DATE 2015: 1245-1248 - [c124]Jude Angelo Ambrose, Yusuke Yachide, Kapil Batra, Jorgen Peddersen, Sri Parameswaran:
Sequential C-code to distributed pipelined heterogeneous MPSoC synthesis for streaming applications. ICCD 2015: 216-223 - [c123]Su Myat Min Shwe, Kapil Batra, Yusuke Yachide, Jorgen Peddersen, Sri Parameswaran:
RAPITIMATE: Rapid performance estimation of pipelined processing systems containing shared memory. ICCD 2015: 635-642 - [c122]Jude Angelo Ambrose, Nick Higgins, Mrinal Chakravarthy, Shivam Gargg, Tuo Li, Daniel Murphy, Aleksandar Ignjatovic, Sri Parameswaran:
ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip. ISCAS 2015: 413-416 - [c121]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power. ISCAS 2015: 3052-3055 - [c120]Jude Angelo Ambrose, Roshan G. Ragel, Darshana Jayasinghe, Tuo Li, Sri Parameswaran:
Side channel attacks in embedded systems: A tale of hostilities and deterrence. ISQED 2015: 452-459 - [c119]Jörg Henkel, Haseeb Bokhari, Siddharth Garg, Muhammad Usman Karim Khan, Heba Khdr, Florian Kriebel, Ümit Y. Ogras, Sri Parameswaran, Muhammad Shafique:
Dark Silicon: From Computation to Communication. NOCS 2015: 23:1-23:8 - [c118]Jude Angelo Ambrose, Tuo Li, Daniel Murphy, Shivam Gargg, Nick Higgins, Sri Parameswaran:
ARGUS: A Framework for Rapid Design and Prototype of Heterogeneous Multicore Systems in FPGA. VLSID 2015: 29-34 - [i4]Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran:
DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy. CoRR abs/1506.03181 (2015) - [i3]Mohammad Shihabul Haque, Jorgen Peddersen, Sri Parameswaran:
CIPARSim: Cache Intersection Property Assisted Rapid Single-pass FIFO Cache Simulation Technique. CoRR abs/1506.03186 (2015) - [i2]Roshan G. Ragel, Jude Angelo Ambrose, Sri Parameswaran:
SecureD: A Secure Dual Core Embedded Processor. CoRR abs/1511.01946 (2015) - 2014
- [b2]Haris Javaid, Sri Parameswaran:
Pipelined Multiprocessor System-on-Chip for Multimedia. Springer 2014, ISBN 978-3-319-01112-7, pp. I-VIII, 1-169 - [j23]Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran:
Energy-Efficient Adaptive Pipelined MPSoCs for Multimedia Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(5): 663-676 (2014) - [j22]Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran:
Performance Estimation of Pipelined MultiProcessor System-on-Chips (MPSoCs). IEEE Trans. Parallel Distributed Syst. 25(8): 2159-2168 (2014) - [c117]Jude Angelo Ambrose, Jorgen Peddersen, Sri Parameswaran, Alvin Labios, Yusuke Yachide:
SDG2KPN: System Dependency Graph to function-level KPN generation of legacy code for MPSoCs. ASP-DAC 2014: 267-273 - [c116]Josef Schneider, Jorgen Peddersen, Sri Parameswaran:
A scorchingly fast FPGA-based Precise L1 LRU cache simulator. ASP-DAC 2014: 412-417 - [c115]Muhammad Shafique, Siddharth Garg, Tulika Mitra, Sri Parameswaran, Jörg Henkel:
Dark silicon as a challenge for hardware/software co-design. CODES+ISSS 2014: 13:1-13:10 - [c114]Haris Javaid, Yusuke Yachide, Su Myat Min Shwe, Haseeb Bokhari, Sri Parameswaran:
FALCON: A Framework for HierarchicAL Computation of Metrics for CompONent-Based Parameterized SoCs. DAC 2014: 33:1-33:6 - [c113]Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran:
darkNoC: Designing Energy-Efficient Network-on-Chip with Multi-Vt Cells for Dark Silicon. DAC 2014: 161:1-161:6 - [c112]Josef Schneider, Jorgen Peddersen, Sri Parameswaran:
MASH{fifo}: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache Analysis. DAC 2014: 200:1-200:6 - [c111]Hong Chinh Doan, Haris Javaid, Sri Parameswaran:
Flexible and scalable implementation of H.264/AVC encoder for multiple resolutions using ASIPs. DATE 2014: 1-6 - [c110]Isuru Nawinne, Josef Schneider, Haris Javaid, Sri Parameswaran:
Hardware-based fast exploration of cache hierarchies in application specific MPSoCs. DATE 2014: 1-6 - [c109]Sri Parameswaran:
Mapping programs for execution on pipelined MPSoCs. ESTIMedia 2014: 11 - [c108]Darshana Jayasinghe, Roshan G. Ragel, Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran:
Advanced modes in AES: Are they safe from power analysis based side channel attacks? ICCD 2014: 173-180 - [c107]Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
A simple digital architecture for a harmonic-cancelling sine-wave synthesizer. ISCAS 2014: 2113-2116 - [c106]Liang Tang, Jude Angelo Ambrose, Sri Parameswaran, Sha Zhu:
Reconfigurable Convolutional Codec for Physical Layer Communication Security Application. MILCOM 2014: 82-87 - [i1]Shahid Mehraj Shah, Sridevan Parameswaran, Vinod Sharma:
Previous Messages Provide the Key to Achieve Shannon Capacity in a Wiretap Channel. CoRR abs/1404.5945 (2014) - 2013
- [c105]Haris Javaid, Daniel Witono, Sri Parameswaran:
Multi-mode pipelined MPSoCs for streaming applications. ASP-DAC 2013: 231-236 - [c104]Su Myat Min, Haris Javaid, Sri Parameswaran:
RExCache: Rapid exploration of unified last-level cache. ASP-DAC 2013: 582-587 - [c103]Jörg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Jürgen Teich:
Run-time adaption for highly-complex multi-core systems. CODES+ISSS 2013: 13:1-13:8 - [c102]Su Myat Min, Haris Javaid, Sri Parameswaran:
XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs. DAC 2013: 22:1-22:10 - [c101]Tuo Li, Muhammad Shafique, Jude Angelo Ambrose, Semeen Rehman, Jörg Henkel, Sri Parameswaran:
RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors. DAC 2013: 62:1-62:7 - [c100]Liang Tang, Jude Angelo Ambrose, Sri Parameswaran:
Reconfigurable pipelined coprocessor for multi-mode communication transmission. DAC 2013: 134:1-134:8 - [c99]Tuo Li, Muhammad Shafique, Semeen Rehman, Swarnalatha Radhakrishnan, Roshan G. Ragel, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran:
CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors. DATE 2013: 707-712 - [c98]Josef Schneider, Sri Parameswaran:
An extremely compact JPEG encoder for adaptive embedded systems. DATE 2013: 1063-1064 - [c97]Haseeb Bokhari, Haris Javaid, Sri Parameswaran:
System-level optimization of on-chip communication using express links for throughput constrained MPSoCs. ESTIMedia 2013: 68-77 - [c96]Hussam Amrouch, Thomas Ebi, Josef Schneider, Sridevan Parameswaran, Jörg Henkel:
Analyzing the thermal hotspots in FPGA-based embedded systems. FPL 2013: 1-4 - [c95]Babak Saghaie, Roshan G. Ragel, Sri Parameswaran, Aleksandar Ignjatovic:
A novel intermittent fault Markov model for deep sub-micron processors. ACM Great Lakes Symposium on VLSI 2013: 13-18 - [c94]