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2020 – today
- 2020
[j36]Alok Prakash, Siqi Wang, Tulika Mitra:
Mobile Application Processors: Techniques for Software Power-Performance Optimization. IEEE Consumer Electron. Mag. 9(4): 67-76 (2020)- [j35]Petru Eles
, Tulika Mitra:
ESWEEK 2019 Conference Report. IEEE Des. Test 37(1): 100-101 (2020) - [j34]Siqi Wang, Anuj Pathania, Tulika Mitra:
Neural Network Inference on Mobile SoCs. IEEE Des. Test 37(5): 50-57 (2020) - [j33]Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra:
High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2254-2267 (2020) - [j32]Guanhua Wang, Sudipta Chattopadhyay, Arnab Kumar Biswas, Tulika Mitra, Abhik Roychoudhury:
KLEESpectre: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution. ACM Trans. Softw. Eng. Methodol. 29(3): 14:1-14:31 (2020) - [c122]Nishant Budhdev, Raj Joshi, Pravein Govindan Kannan, Mun Choon Chan, Tulika Mitra:
Slicing 5G fronthaul networks using programmable switches. CoNEXT 2020: 534-535 - [c121]Alexander Hoffman, Anuj Pathania, Philipp H. Kindt, Samarjit Chakraborty, Tulika Mitra:
BrezeFlow: Unified Debugger for Android CPU Power Governors and Schedulers on Edge Devices. DAC 2020: 1-6 - [c120]Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. DATE 2020: 1496-1501 - [c119]Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
Time-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing. ICASSP 2020: 1553-1557 - [c118]Nishant Budhdev, Mun Choon Chan, Tulika Mitra:
Poster: IsoRAN: Isolation and Scaling for 5G RAN via User-Level Data Plane Virtualization. Networking 2020: 634-636 - [c117]Niklas Ueter, Jian-Jia Chen, Georg von der Brüggen, Vanchinathan Venkataramani, Tulika Mitra:
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. RTCSA 2020: 1-10 - [e3]Tulika Mitra, Andreas Gerstlauer:
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2020, Singapore, September 20-25, 2020. IEEE 2020, ISBN 978-1-7281-9192-8 [contents] - [i8]Nishant Budhdev, Mun Choon Chan, Tulika Mitra:
IsoRAN: Isolation and Scaling for 5G RANvia User-Level Data Plane Virtualization. CoRR abs/2003.01841 (2020)
2010 – 2019
- 2019
- [j31]Siqi Wang, Gayathri Ananthanarayanan, Tulika Mitra:
OPTiC: Optimizing Collaborative CPU-GPU Computing on Mobile Devices With Thermal Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3): 393-406 (2019) - [j30]Vanchinathan Venkataramani, Mun Choon Chan, Tulika Mitra:
Scratchpad-Memory Management for Multi-Threaded Applications on Many-Core Architectures. ACM Trans. Embed. Comput. Syst. 18(1): 10:1-10:28 (2019) - [j29]Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra:
Synergy: An HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. ACM Trans. Embed. Comput. Syst. 18(2): 13:1-13:23 (2019) - [j28]Dhananjaya Wijerathne, Zhaoying Li, Manupa Karunarathne, Anuj Pathania, Tulika Mitra:
CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA. ACM Trans. Embed. Comput. Syst. 18(5s): 50:1-50:26 (2019) - [c116]Bo Wang, Manupa Karunarathne, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
HyCUBE: A 0.9V 26.4 MOPS/mW, 290 pJ/op, Power Efficient Accelerator for IoT Applications. A-SSCC 2019: 133-136 - [c115]Tulika Mitra:
Time-Predictable Computing by Design: Looking Back, Looking Forward. DAC 2019: 153 - [c114]Martin Rapp, Anuj Pathania, Tulika Mitra, Jörg Henkel:
Prediction-Based Task Migration on S-NUCA Many-Cores. DATE 2019: 1579-1582 - [c113]Manupa Karunaratne, Dhananjaya Wijerathne, Tulika Mitra, Li-Shiuan Peh:
4D-CGRA: Introducing Branch Dimension to Spatio-Temporal Application Mapping on CGRAs. ICCAD 2019: 1-8 - [c112]Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing. LCTES 2019: 82-96 - [c111]Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. SAMOS 2019: 127-141 - [i7]Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra:
High-Throughput CNN Inference on Embedded ARM big.LITTLE Multi-Core Processors. CoRR abs/1903.05898 (2019) - [i6]Siqi Wang, Anuj Pathania, Tulika Mitra:
Neural Network Inference on Mobile SoCs. CoRR abs/1908.11450 (2019) - [i5]Guanhua Wang, Sudipta Chattopadhyay, Arnab Kumar Biswas, Tulika Mitra, Abhik Roychoudhury:
KLEESPECTRE: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution. CoRR abs/1909.00647 (2019) - [i4]Niklas Ueter, Georg von der Brüggen, Jian-Jia Chen, Tulika Mitra, Vanchinathan Venkataramani:
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. CoRR abs/1909.09457 (2019) - 2018
- [j27]Tulika Mitra, Jürgen Teich, Lothar Thiele:
Guest Editors' Introduction: Special Issue on Time-Critical Systems Design. IEEE Des. Test 35(2): 5-7 (2018) - [j26]Tulika Mitra, Jürgen Teich, Lothar Thiele:
Time-Critical Systems Design: A Survey. IEEE Des. Test 35(2): 8-26 (2018) - [j25]Tulika Mitra, Jürgen Teich, Lothar Thiele:
Guest Editors' Introduction: Special Issue on Time-Critical Systems Design Part II. IEEE Des. Test 35(4): 5-6 (2018) - [j24]Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh:
LOCUS: Low-Power Customizable Many-Core Architecture for Wearables. ACM Trans. Embed. Comput. Syst. 17(1): 16:1-16:26 (2018) - [c110]Yun Liang, Shuo Wang, Tulika Mitra, Yajun Ha:
Analytical Two-Level Near Threshold Cache Exploration for Low Power Biomedical Applications. ACA 2018: 95-108 - [c109]Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
QoS-aware stochastic power management for many-cores. DAC 2018: 69:1-69:6 - [c108]Manupa Karunaratne, Cheng Tan, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
Dnestmap: mapping deeply-nested loops on ultra-low power CGRAs. DAC 2018: 129:1-129:6 - [c107]Nishant Budhdev, Mun Choon Chan, Tulika Mitra:
PR3: Power Efficient and Low Latency Baseband Processing for LTE Femtocells. INFOCOM 2018: 2357-2365 - [c106]Cheng Tan, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh:
Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables. ISCA 2018: 575-587 - [c105]Siqi Wang, Alok Prakash, Tulika Mitra:
Software Support for Heterogeneous Computing. ISVLSI 2018: 756-762 - [c104]Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Scalable Dynamic Task Scheduling on Adaptive Many-Core. MCSoC 2018: 168-175 - [e2]Tulika Mitra, Akash Kumar:
Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018, Torino, Italy, September 30 - October 05, 2018. ACM 2018, ISBN 978-1-5386-5564-1 [contents] - [i3]Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra:
Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. CoRR abs/1804.00706 (2018) - [i2]Guanhua Wang, Sudipta Chattopadhyay, Ivan Gotovchits, Tulika Mitra, Abhik Roychoudhury:
oo7: Low-overhead Defense against Spectre Attacks via Binary Analysis. CoRR abs/1807.05843 (2018) - 2017
- [j23]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Defragmentation of Tasks in Many-Core Architecture. ACM Trans. Archit. Code Optim. 14(1): 2:1-2:21 (2017) - [j22]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Optimal Greedy Algorithm for Many-Core Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 1054-1058 (2017) - [j21]Siqi Wang, Guanwen Zhong, Tulika Mitra:
CGPredict: Embedded GPU Performance Estimation from Single-Threaded Applications. ACM Trans. Embed. Comput. Syst. 16(5s): 146:1-146:22 (2017) - [j20]Yuan Yao, Wenzhi Chen, Tulika Mitra, Yang Xiang:
TC-Release++: An Efficient Timestamp-Based Coherence Protocol for Many-Core Architectures. IEEE Trans. Parallel Distributed Syst. 28(11): 3313-3327 (2017) - [c103]Manupa Karunaratne, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
HyCUBE: A CGRA with Reconfigurable Single-cycle Multi-hop Interconnect. DAC 2017: 45:1-45:6 - [c102]Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Scalable probabilistic power budgeting for many-cores. DATE 2017: 864-869 - [c101]Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang, Tulika Mitra, Smaïl Niar:
Design Space exploration of FPGA-based accelerators with multi-level parallelism. DATE 2017: 1141-1146 - [c100]Tulika Mitra:
Mobile heterogeneous computing: a software perspective. ESTImedia 2017: 1 - [c99]Mariem Makni, Smaïl Niar, Mouna Baklouti, Guanwen Zhong, Tulika Mitra, Mohamed Abid:
A Rapid Data Communication Exploration Tool for Hybrid CPU-FPGA Architectures. PDP 2017: 85-92 - [p3]Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya:
Introduction to Hardware/Software Codesign. Handbook of Hardware/Software Codesign 2017: 3-26 - [p2]Tulika Mitra:
Application-Specific Processors. Handbook of Hardware/Software Codesign 2017: 377-409 - 2016
- [j19]Guanwen Zhong, Smaïl Niar, Alok Prakash, Tulika Mitra:
Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices. IEEE Trans. Veh. Technol. 65(6): 4802-4812 (2016) - [c98]Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh:
LOCUS: low-power customizable many-core architecture for wearables. CASES 2016: 11:1-11:10 - [c97]Alok Prakash, Hussam Amrouch, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Improving mobile gaming performance through cooperative CPU-GPU thermal management. DAC 2016: 47:1-47:6 - [c96]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Distributed scheduling for many-cores using cooperative game theory. DAC 2016: 133:1-133:6 - [c95]Guanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smaïl Niar:
Lin-analyzer: a high-level performance analysis tool for FPGA-based accelerators. DAC 2016: 136:1-136:6 - [c94]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Distributed fair scheduling for many-cores. DATE 2016: 379-384 - [c93]Cristiana Bolchini, Matteo Carminati, Tulika Mitra, Thannirmalai Somu Muthukaruppan:
Combined on-line lifetime-energy optimization for asymmetric multicores. DFT 2016: 35-40 - [c92]Yuan Yao, Guanhua Wang, Zhiguo Ge, Tulika Mitra, Wenzhi Chen, Naxin Zhang:
Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures. ICS 2016: 19:1-19:13 - [c91]Konstantin Rubinov, Lucia Rosculete, Tulika Mitra, Abhik Roychoudhury:
Automated partitioning of android applications for trusted execution environments. ICSE 2016: 923-934 - [i1]Tulika Mitra, Jürgen Teich, Lothar Thiele:
Adaptive Isolation for Predictability and Security (Dagstuhl Seminar 16441). Dagstuhl Reports 6(10): 120-153 (2016) - 2015
- [j18]Tulika Mitra:
Heterogeneous Multi-core Architectures. IPSJ Trans. Syst. LSI Des. Methodol. 8: 51-62 (2015) - [j17]Yun Liang, Tulika Mitra, Lei Ju:
Instruction Cache Locking Using Temporal Reuse Profile. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1387-1400 (2015) - [c90]Cheng Tan, Thannirmalai Somu Muthukaruppan, Tulika Mitra, Lei Ju:
Approximation-aware scheduling on heterogeneous multi-core architectures. ASP-DAC 2015: 618-623 - [c89]Qing Jiao, Mian Lu, Huynh Phung Huynh, Tulika Mitra:
Improving GPGPU energy-efficiency through concurrent kernel execution and DVFS. CGO 2015: 1-11 - [c88]Anuj Pathania, Alexandru Eugen Irimiea, Alok Prakash, Tulika Mitra:
Power-Performance Modelling of Mobile Gaming Workloads on Heterogeneous MPSoCs. DAC 2015: 201:1-201:6 - [c87]Yuan Yao, Guanhua Wang, Zhiguo Ge, Tulika Mitra, Wenzhi Chen, Naxin Zhang:
SelectDirectory: a selective directory for cache coherence in many-core architectures. DATE 2015: 175-180 - [c86]Alok Prakash, Siqi Wang, Alexandru Eugen Irimiea, Tulika Mitra:
Energy-efficient execution of data-parallel applications on heterogeneous mobile platforms. ICCD 2015: 208-215 - 2014
- [j16]Mihai Pricopi, Tulika Mitra:
Task Scheduling on Adaptive Multi-Core. IEEE Trans. Computers 63(10): 2590-2603 (2014) - [j15]Liang Chen, Tulika Mitra:
Graph Minor Approach for Application Mapping on CGRAs. ACM Trans. Reconfigurable Technol. Syst. 7(3): 21:1-21:25 (2014) - [c85]Thannirmalai Somu Muthukaruppan, Anuj Pathania, Tulika Mitra:
Price theory based power management for heterogeneous multi-cores. ASPLOS 2014: 161-176 - [c84]Muhammad Shafique, Siddharth Garg, Tulika Mitra, Sri Parameswaran, Jörg Henkel:
Dark silicon as a challenge for hardware/software co-design. CODES+ISSS 2014: 13:1-13:10 - [c83]Anuj Pathania, Qing Jiao, Alok Prakash, Tulika Mitra:
Integrated CPU-GPU Power Management for 3D Mobile Games. DAC 2014: 40:1-40:6 - [c82]Huping Ding, Yun Liang, Tulika Mitra:
WCET-Centric dynamic instruction cache locking. DATE 2014: 1-6 - [c81]Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar:
Design space exploration of multiple loops on FPGAs using high level synthesis. ICCD 2014: 456-463 - [c80]Tulika Mitra:
Energy-efficient computing with heterogeneous multi-cores. ISIC 2014: 63-66 - [e1]Tulika Mitra, Jan Reineke:
2014 International Conference on Embedded Software, EMSOFT 2014, New Delhi, India, October 12-17, 2014. ACM 2014 [contents] - 2013
- [j14]Philip Brisk, Tulika Mitra:
Introduction to the special issue on application-specific processors. ACM Trans. Embed. Comput. Syst. 13(2): 15:1-15:3 (2013) - [j13]Yun Liang, Tulika Mitra:
An analytical approach for fast and accurate design space exploration of instruction caches. ACM Trans. Embed. Comput. Syst. 13(3): 43:1-43:29 (2013) - [c79]Huping Ding, Yun Liang, Tulika Mitra:
Shared cache aware task mapping for WCRT minimization. ASP-DAC 2013: 735-740 - [c78]Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin:
Power-performance modeling on asymmetric multi-cores. CASES 2013: 15:1-15:10 - [c77]Huping Ding, Yun Liang, Tulika Mitra:
Integrated instruction cache analysis and locking in multitasking real-time systems. DAC 2013: 147:1-147:10 - [c76]Thannirmalai Somu Muthukaruppan, Mihai Pricopi, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin:
Hierarchical power management for asymmetric multi-core in dark silicon era. DAC 2013: 174:1-174:9 - [c75]Liang Chen, Tulika Mitra:
Correction to "Graph Minor Approach for Application Mapping on CGRAs". FPT 2013: 510 - [c74]Liang Chen, Joseph Tarango, Tulika Mitra, Philip Brisk:
A just-in-time customizable processor. ICCAD 2013: 524-531 - [c73]Thannirmalai Somu Muthukaruppan, Haris Javaid, Tulika Mitra, Sri Parameswaran:
Energy-aware synthesis of application specific MPSoCs. ICCD 2013: 62-69 - [c72]Kaushik Triyambaka Mysur, Mihai Pricopi, Thomas Marconi, Tulika Mitra:
Implementation of core coalition on FPGAs. VLSI-SoC 2013: 198-203 - [c71]Thannirmalai Somu Muthukaruppan, Tulika Mitra:
Lifetime Reliability Aware Architectural Adaptation. VLSI Design 2013: 227-232 - 2012
- [j12]Yun Liang, Huping Ding, Tulika Mitra, Abhik Roychoudhury, Yan Li, Vivy Suhendra:
Timing analysis of concurrent programs running on shared cache multi-cores. Real Time Syst. 48(6): 638-680 (2012) - [j11]Mihai Pricopi, Tulika Mitra:
Bahurupi: A polymorphic heterogeneous multi-core architecture. ACM Trans. Archit. Code Optim. 8(4): 22:1-22:21 (2012) - [c70]Huping Ding, Yun Liang, Tulika Mitra:
WCET-centric partial instruction cache locking. DAC 2012: 412-420 - [c69]Liang Chen, Thomas Marconi, Tulika Mitra:
Online scheduling for multi-core shared reconfigurable fabric. DATE 2012: 582-585 - [c68]Liang Chen, Tulika Mitra:
Graph minor approach for application mapping on CGRAs. FPT 2012: 285-292 - 2011
- [c67]Liang Chen, Tulika Mitra:
Shared reconfigurable fabric for multi-core customization. DAC 2011: 830-835 - [c66]Thomas Marconi, Tulika Mitra:
A novel online hardware task scheduling and placement algorithm for 3D partially reconfigurable FPGAs. FPT 2011: 1-6 - [c65]Liang Chen, Nicolas Boichat, Tulika Mitra:
Customized MPSoC synthesis for task sequence. SASP 2011: 16-21 - 2010
- [j10]Vivy Suhendra, Abhik Roychoudhury, Tulika Mitra:
Scratchpad allocation for concurrent embedded software. ACM Trans. Program. Lang. Syst. 32(4): 13:1-13:47 (2010) - [c64]Yun Liang, Tulika Mitra:
Improved procedure placement for set associative caches. CASES 2010: 147-156 - [c63]Yun Liang, Tulika Mitra:
Instruction cache locking using temporal reuse profile. DAC 2010: 344-349 - [c62]Huynh Phung Huynh, Yun Liang, Tulika Mitra:
Efficient custom instructions generation for system-level design. FPT 2010: 445-448 - [c61]Unmesh D. Bordoloi, Huynh Phung Huynh, Tulika Mitra, Samarjit Chakraborty:
Design space exploration of instruction set customizable MPSoCs for multimedia applications. ICSAMOS 2010: 170-177 - [c60]Sudipta Chattopadhyay, Abhik Roychoudhury, Tulika Mitra:
Modeling shared cache and bus in multi-cores for timing analysis. SCOPES 2010: 6
2000 – 2009
- 2009
- [j9]Huynh Phung Huynh, Joon Edward Sim, Tulika Mitra:
An efficient framework for dynamic reconfiguration of instruction-set customization. Des. Autom. Embed. Syst. 13(1-2): 91-113 (2009) - [j8]Lei Ju, Yun Liang, Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury:
Cache-aware optimization of BAN applications. Des. Autom. Embed. Syst. 13(3): 159-178 (2009) - [j7]Ramkumar Jayaseelan, Tulika Mitra:
Temperature Aware Scheduling for Embedded Processors. J. Low Power Electron. 5(3): 363-372 (2009) - [j6]Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele:
Cache-aware timing analysis of streaming applications. Real Time Syst. 41(1): 52-85 (2009) - [c59]Thanh Nga Dang, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra:
Generating test programs to cover pipeline interactions. DAC 2009: 142-147 - [c58]Unmesh D. Bordoloi, Huynh Phung Huynh, Samarjit Chakraborty, Tulika Mitra:
Evaluating design trade-offs in customizable processors. DAC 2009: 244-249 - [c57]Ramkumar Jayaseelan, Tulika Mitra:
Dynamic thermal management via architectural adaptation. DAC 2009: 484-489 - [c56]Zhiguo Ge, Tulika Mitra, Weng-Fai Wong:
A DVS-based pipelined reconfigurable instruction memory. DAC 2009: 897-902 - [c55]Huynh Phung Huynh, Tulika Mitra:
Runtime reconfiguration of custom instructions for real-time embedded systems. DATE 2009: 1536-1541 - [c54]Vinayak Puranik, Tulika Mitra, Y. N. Srikant:
Probabilistic modeling of data cache behavior. EMSOFT 2009: 255-264 - [c53]Ramkumar Jayaseelan, Tulika Mitra:
A hybrid local-global approach for multi-core thermal management. ICCAD 2009: 314-320 - [c52]Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Abhik Roychoudhury:
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores. RTSS 2009: 57-67 - [c51]Huynh Phung Huynh, Tulika Mitra:
Runtime Adaptive Extensible Embedded Processors - A Survey. SAMOS 2009: 215-225 - [c50]Ramkumar Jayaseelan, Tulika Mitra:
Temperature Aware Scheduling for Embedded Processors. VLSI Design 2009: 541-546 - 2008
- [j5]Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David B. Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter P. Puschner, Jan Staschulat, Per Stenström:
The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst. 7(3): 36:1-36:53 (2008) - [c49]Vivy Suhendra, Abhik Roychoudhury, Tulika Mitra:
Scratchpad allocation for concurrent embedded software. CODES+ISSS 2008: 37-42 - [c48]Yun Liang, Tulika Mitra:
Static analysis for fast and accurate design space exploration of caches. CODES+ISSS 2008: 103-108 - [c47]Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury:
Cache-aware optimization of BAN applications. CODES+ISSS 2008: 149-154 - [c46]Vivy Suhendra, Tulika Mitra:
Exploring locking & partitioning for predictable shared caches on multi-cores. DAC 2008: 300-303 - [c45]Yun Liang, Tulika Mitra:
Cache modeling in probabilistic execution time analysis. DAC 2008: 319-324 - [c44]