"Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs."

Isuru Nawinne et al. (2015)

> Home

Details and statistics

DOI: 10.1109/TCAD.2015.2445736

access: closed

type: Journal Article

metadata version: 2020-10-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/NawinneJRRP15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/NawinneJRRP15
Isuru Nawinne, Haris Javaid, Roshan G. Ragel, Swarnalatha Radhakrishnan, Sri Parameswaran:
Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 1991-2003 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.