Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"The design of a 1.5 V, 10-bit, 10 M samples/s low power pipelined ..."

Jen-Shiun Chiang, Ming-Da Chiang (2000)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2000.857126

access: closed

type: Conference or Workshop Paper

metadata version: 2017-10-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/ChiangC00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/ChiangC00
Jen-Shiun Chiang, Ming-Da Chiang:
The design of a 1.5 V, 10-bit, 10 M samples/s low power pipelined analog-to-digital converter. ISCAS 2000: 443-446

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.