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2020 – today
- 2024
[j71]Dian Zhou, Shiguang Liu
, Qing Xu:
Music conditioned 2D hand gesture dance generation with HGS. Comput. Animat. Virtual Worlds 35(1) (2024)- [j70]Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng:
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(2): 417-430 (2024) - [j69]Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi, Yuzhe Ma, Bei Yu, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng:
pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis With Perimeter Adjustment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(2): 667-680 (2024) - [j68]Aidong Zhao, Tianchen Gu, Zhaori Bi, Fan Yang, Changhao Yan, Xuan Zeng, Zixiao Lin, Wenchuang Walter Hu, Dian Zhou:
D3PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing. ACM Trans. Design Autom. Electr. Syst. 29(3): 44:1-44:25 (2024) - [c124]Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper). ASPDAC 2024: 671-678 - [c123]Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng:
Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing. ASPDAC 2024: 872-877 - [c122]Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng:
Circuits Physics Constrained Predictor of Static IR Drop with Limited Data. DATE 2024: 1-2 - 2023
- [j67]Guanghui Zheng, Yan Wang, Chengyi Zhao, Wen Dai, Giri Raj Kattel, Dian Zhou:
Quantitative Analysis of Tidal Creek Evolution and Vegetation Variation in Silting Muddy Flats on the Yellow Sea. Remote. Sens. 15(21): 5107 (2023) - [j66]Qingxue Zhang, Dian Zhou:
Machine Learning Electrocardiogram for Mobile Cardiac Pattern Extraction. Sensors 23(12): 5723 (2023) - [j65]Aosheng Wang, Guanghui Zheng, Danping Wei, Caixia Jiao, Xianli Xie, Rong Zeng, Chengyi Zhao, Giri Kattel, Ying Xiong, Dian Zhou:
Identification and Evolution of Soil Organic Carbon Density Caused by Coastal Rapid Siltation Based on Imaging Spectroscopy. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 16: 4287-4300 (2023) - [j64]Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi, Xuan Zeng:
A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 347-359 (2023) - [j63]Jiangli Huang, Chuyu Wang, Yuyang Yan, Cong Tao, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng:
An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3280-3293 (2023) - [c121]Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng:
cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. DAC 2023: 1-6 - 2022
- [j62]Yan Qiu, Shuai Ding, Di Tian, Caiyun Zhang, Dian Zhou:
Predicting the quality of answers with less bias in online health question answering communities. Inf. Process. Manag. 59(6): 103112 (2022) - [j61]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(1): 1-14 (2022) - [j60]Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Fast Statistical Analysis of Rare Failure Events With Truncated Normal Distribution in High-Dimensional Variation Space. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 789-793 (2022) - [j59]Jun Tao, Handi Yu, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 813-826 (2022) - [j58]Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng:
Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4887-4900 (2022) - [j57]Yifan Wang, Zhaori Bi, Yuxue Xie, Tao Wu, Xuan Zeng, Shuang Chen, Dian Zhou:
Learning From Highly Confident Samples for Automatic Knee Osteoarthritis Severity Assessment: Data From the Osteoarthritis Initiative. IEEE J. Biomed. Health Informatics 26(3): 1239-1250 (2022) - [j56]Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng:
Efficient Layout Hotspot Detection via Neural Architecture Search. ACM Trans. Design Autom. Electr. Syst. 27(6): 62:1-62:16 (2022) - [c120]Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou:
A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. ASP-DAC 2022: 86-91 - [c119]Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng:
An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling. DAC 2022: 625-630 - [c118]Longlong Yang, Cuiyang Ding, Changhao Yan, Dian Zhou, Xuan Zeng:
A High-Precision Stochastic Solver for Steady-State Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions. ICCAD 2022: 50:1-50:9 - [c117]Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng:
A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion. ISCAS 2022: 2886-2890 - [c116]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. MLCAD 2022: 27-34 - 2021
- [j55]Qingxue Zhang, Vincenzo Piuri, Edward A. Clancy, Dian Zhou, Thomas Penzel, Wenchuang Walter Hu:
IEEE Access Special Section Editorial: Advanced Information Sensing and Learning Technologies for Data-Centric Smart Health Applications. IEEE Access 9: 30404-30407 (2021) - [j54]Qingxue Zhang, Vincenzo Piuri, Edward A. Clancy, Dian Zhou, Thomas Penzel, Wenchuang Walter Hu, Hui Zheng:
IEEE Access Special Section Editorial: Smart Health Sensing and Computational Intelligence: From Big Data to Big Impacts. IEEE Access 9: 30452-30455 (2021) - [j53]Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng:
Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(7): 1476-1488 (2021) - [c115]Jiahui Hu, Changhao Yan, Chao Guo, Ronggui Jiang, Dian Zhou, Xuan Zeng:
A Fast Aging-aware Static Timing Analysis Prediction Frame of Digital Integrated Circuits. ASICON 2021: 1-4 - [c114]Yan Wang, Changhao Yan, Dian Zhou, Xuan Zeng:
High-Dimensional Bayesian Optimization for Automated Analog Circuit Design via Add-Graph Structure. ASICON 2021: 1-4 - [c113]Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization. ASP-DAC 2021: 146-151 - [c112]Zhengqi Gao, Zihao Chen, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng:
Bayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits. ASP-DAC 2021: 892-897 - [c111]Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng:
NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis. DAC 2021: 187-192 - [c110]Yue Shen, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays. DATE 2021: 1723-1728 - [c109]Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process. ISCAS 2021: 1-5 - [i7]Dario Dematties, Chenyu Wen, Mauricio David Pérez, Dian Zhou, Shi-Li Zhang:
Deep learning of nanopore sensing signals using a bi-path network. CoRR abs/2105.03660 (2021) - [i6]Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. CoRR abs/2106.14683 (2021) - [i5]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble. CoRR abs/2106.15412 (2021) - [i4]Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. CoRR abs/2109.00617 (2021) - 2020
- [j52]Mingchao Du, Min Tao, Jian Hong, Dian Zhou, Shuihua Wang:
Application of Deep Learning Algorithm in Feature Mining and Rapid Identification of Colorectal Image. IEEE Access 8: 128830-128844 (2020) - [j51]Yiyang Jiang, Fan Yang, Hengliang Zhu, Dian Zhou, Xuan Zeng:
Nonlinear CNN: improving CNNs with quadratic convolutions. Neural Comput. Appl. 32(12): 8507-8516 (2020) - [j50]Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2029-2041 (2020) - [j49]Zhengqi Gao, Jun Tao, Dian Zhou, Xuan Zeng:
Efficient Parametric Yield Estimation Over Multiple Process Corners via Bayesian Inference Based on Bernoulli Distribution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 3144-3148 (2020) - [j48]Fulin Peng, Handi Yu, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4971-4984 (2020) - [j47]Renjian Pan, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Analog/RF Post-silicon Tuning via Bayesian Optimization. ACM Trans. Design Autom. Electr. Syst. 25(1): 7:1-7:17 (2020) - [c108]Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
Bayesian Methods for the Yield Optimization of Analog and SRAM Circuits. ASP-DAC 2020: 440-445 - [c107]Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. DAC 2020: 1-6 - [c106]Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. DAC 2020: 1-6 - [c105]Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. DATE 2020: 67-72 - [c104]Zhibin Zhang, Dian Zhou, Jiqing Rao, Dongdong Zhao, Wenhua Hu, Jianwen Xiang, Zhongjin Liu, Yanzhen Xing:
VSFBS: Vulnerability Search in Firmware Based on String. DSA 2020: 555-563 - [c103]Binbin Liu, Fan Yang, Dian Zhou, Xuan Zeng:
An Efficient Memory Partitioning Approach for Multi-Pattern Data Access in STT-RAM. ISCAS 2020: 1-4 - [c102]Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng:
A Mixed-Variable Bayesian Optimization Approach for Analog Circuit Synthesis. ISCAS 2020: 1-4 - [c101]Jiahe Shi, Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng:
Multi-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior. ISCAS 2020: 1-4 - [c100]Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng:
Learning Low-Rank Structured Sparsity in Recurrent Neural Networks. ISCAS 2020: 1-4 - [i3]Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng:
Projection based Active Gaussian Process Regression for Pareto Front Modeling. CoRR abs/2001.07072 (2020)
2010 – 2019
- 2019
- [j46]Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(8): 1385-1398 (2019) - [j45]Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:
An Efficient Memory Partitioning Approach for Multi-Pattern Data Access via Data Reuse. ACM Trans. Reconfigurable Technol. Syst. 12(1): 1:1-1:22 (2019) - [j44]Xiang Ge, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:
An Efficient FPGA Implementation of Orthogonal Matching Pursuit With Square-Root-Free QR Decomposition. IEEE Trans. Very Large Scale Integr. Syst. 27(3): 611-623 (2019) - [c99]Huaidong Gao, Fan Yang, Dian Zhou, Xuan Zeng:
Parallel Global Placement on CPU via Parallel Reduction. ASICON 2019: 1-4 - [c98]Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng:
Learning Sparse Patterns in Deep Neural Networks. ASICON 2019: 1-4 - [c97]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu:
An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. DAC 2019: 64 - [c96]Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng:
Efficient Layout Hotspot Detection via Binarized Residual Neural Network. DAC 2019: 147 - [c95]Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng:
An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel. DATE 2019: 1040-1045 - [c94]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. DATE 2019: 1463-1468 - [c93]Mushuai Han, Dongdong Zhao, Hong Lin, Dian Zhou, Jianwen Xiang, Zhongjin Liu, Yanzhen Xing:
VSkLCG A Method for Cross-Platform Vulnerability Search in Firmware. DSA 2019: 395-400 - [c92]Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng:
Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network. ICCAD 2019: 1-8 - [c91]Man Yu, Dongdong Zhao, Dian Zhou, Linjun Ran, Jianwen Xiang, Zhongjin Liu, Yanzhen Xing:
Vulnerability Detection in Firmware Based on Clonal Selection Algorithm. SSCI 2019: 1915-1921 - [i2]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu:
An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. CoRR abs/1912.00392 (2019) - [i1]Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. CoRR abs/1912.00402 (2019) - 2018
- [j43]Qingxue Zhang, Dian Zhou, Xuan Zeng:
A novel single-arm-worn 24 h heart disease monitor empowered by machine intelligence. Biomed. Signal Process. Control. 42: 129-133 (2018) - [j42]Yishi Yang, Hengliang Zhu, Zhaori Bi, Changhao Yan, Dian Zhou, Yangfeng Su, Xuan Zeng:
Smart-MSP: A Self-Adaptive Multiple Starting Point Optimization Approach for Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 531-544 (2018) - [j41]Hengliang Zhu, Feng Hu, Hao Zhou, David Z. Pan, Dian Zhou, Xuan Zeng:
Interlayer Cooling Network Design for High-Performance 3D ICs Using Channel Patterning and Pruning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 770-781 (2018) - [j40]Mengshuo Wang, Wenlong Lv, Fan Yang, Changhao Yan, Wei Cai, Dian Zhou, Xuan Zeng:
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 1929-1942 (2018) - [j39]Wenlong Lyu, Pan Xue, Fan Yang, Changhao Yan, Zhiliang Hong, Xuan Zeng, Dian Zhou:
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1954-1967 (2018) - [j38]Jinyuan Zhai, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Hai Zhou, Xuan Zeng:
An Efficient Non-Gaussian Sampling Method for High Sigma SRAM Yield Analysis. ACM Trans. Design Autom. Electr. Syst. 23(3): 36:1-36:23 (2018) - [j37]Hao Zhou, Hengliang Zhu, Tao Cui, David Z. Pan, Dian Zhou, Xuan Zeng:
Thermal Stress and Reliability Analysis of TSV-Based 3-D ICs With a Novel Adaptive Strategy Finite Element Method. IEEE Trans. Very Large Scale Integr. Syst. 26(7): 1312-1325 (2018) - [j36]Ye Zhang, Wenlong Lyu, Wai-Shing Luk, Fan Yang, Hai Zhou, Dian Zhou, David Z. Pan, Xuan Zeng:
Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26(9): 1613-1626 (2018) - [c90]Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Multi-objective bayesian optimization for analog/RF circuit synthesis. DAC 2018: 11:1-11:6 - [c89]Fulin Peng, Changhao Yan, Chunyang Feng, Jianquan Zheng, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
A general graph based pessimism reduction framework for design optimization of timing closure. DAC 2018: 25:1-25:6 - [c88]Jinyuan Zhai, Changhao Yan, Sheng-Guo Wang, Dian Zhou:
An efficient Bayesian yield estimation method for high dimensional and high sigma SRAM circuits. DAC 2018: 132:1-132:6 - [c87]Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:
An efficient data reuse strategy for multi-pattern data access. ICCAD 2018: 118 - [c86]Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design. ICML 2018: 3312-3320 - 2017
- [j35]Qingxue Zhang, Xuan Zeng, Wenchuang Walter Hu, Dian Zhou:
A Machine Learning-Empowered System for Long-Term Motion-Tolerant Wearable Monitoring of Blood Pressure and Heart Rate With Ear-ECG/PPG. IEEE Access 5: 10547-10561 (2017) - [j34]Qingxue Zhang, Dian Zhou, Xuan Zeng:
HeartID: A Multiresolution Convolutional Neural Network for ECG-Based Biometric Human Identification in Smart Health Applications. IEEE Access 5: 11805-11816 (2017) - [j33]Guanming Huang, Donesh Gillin, Dian Zhou, Jin Liu, Xuan Zeng, Po-Yu Kuo:
An efficient and robust method to determine the optimal tap coefficients of high speed FIR equalizer. Sci. China Inf. Sci. 60(2): 22401 (2017) - [j32]Qingxue Zhang, Dian Zhou, Xuan Zeng:
A Novel Framework for Motion-Tolerant Instantaneous Heart Rate Estimation by Phase-Domain Multiview Dynamic Time Warping. IEEE Trans. Biomed. Eng. 64(11): 2562-2574 (2017) - [j31]Wei Zeng, Hengliang Zhu, Xuan Zeng, Dian Zhou, Ruey-Wen Liu, Xin Li:
C-YES: An Efficient Parametric Yield Estimation Approach for Analog and Mixed-Signal Circuits Based on Multicorner-Multiperformance Correlations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 899-912 (2017) - [j30]Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng, Dian Zhou:
Improved Tangent Space-Based Distance Metric for Lithographic Hotspot Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1545-1556 (2017) - [j29]Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou, Jie Chen:
Efficient Memory Partitioning for Parallel Data Access in FPGA via Data Reuse. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1674-1687 (2017) - [j28]Zhaori Bi, Dian Zhou, Sheng-Guo Wang, Xuan Zeng:
Optimization and Quality Estimation of Circuit Design via Random Region Covering Method. ACM Trans. Design Autom. Electr. Syst. 23(1): 1:1-1:25 (2017) - [j27]Yunfeng Yang, Wai-Shing Luk, Hai Zhou, David Z. Pan, Dian Zhou, Changhao Yan, Xuan Zeng:
An Effective Layout Decomposition Method for DSA with Multiple Patterning in Contact-Hole Generation. ACM Trans. Design Autom. Electr. Syst. 23(1): 11:1-11:27 (2017) - [j26]Mengshuo Wang, Changhao Yan, Xin Li, Dian Zhou, Xuan Zeng:
High-Dimensional and Multiple-Failure-Region Importance Sampling for SRAM Yield Analysis. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 806-819 (2017) - [c85]Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng:
Network flow based cut redistribution and insertion for advanced 1D layout design. ASP-DAC 2017: 360-365 - [c84]Jiabei Ge, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng:
An efficient algorithm for stencil planning and optimization in E-beam lithography. ASP-DAC 2017: 366-371 - [c83]Jun Tao, Handi Yu, Dian Zhou, Yangfeng Su, Xuan Zeng, Xin Li:
Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. DAC 2017: 54:1-54:6 - [c82]Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits. DATE 2017: 1195-1200 - [c81]Chao Yan, Hengliang Zhu, Dian Zhou, Xuan Zeng:
An efficient leakage-aware thermal simulation approach for 3D-ICs using corrected linearized model and algebraic multigrid. DATE 2017: 1207-1212 - [c80]Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou:
Efficient SVM-based hotspot detection using spectral clustering. ISCAS 2017: 1-4 - [c79]Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu:
A grid-based detailed routing algorithm for advanced 1D process. ISCAS 2017: 1-4 - [c78]Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu:
Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis. ISCAS 2017: 1-4 - [c77]Kun Lu, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng:
A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. ISPA/IUCC 2017: 814-821 - [c76]Dian Zhou, Gang Zhang:
Study on mechanical properties of radial permanent magnet bearing. CIS/RAM 2017: 654-659 - [c75]Qingxue Zhang, Dian Zhou, Xuan Zeng:
Hear the heart: Daily cardiac health monitoring using Ear-ECG and machine learning. UEMCON 2017: 448-451 - [c74]Qingxue Zhang, Dian Zhou, Xuan Zeng:
PulsePrint: Single-arm-ECG biometric human identification using deep learning. UEMCON 2017: 452-456 - 2016
- [j25]Minghua Li, Guancheng Chen, Qijun Wang, Yonghua Lin, H. Peter Hofstee, Per Stenström, Dian Zhou:
PATer: A Hardware Prefetching Automatic Tuner on IBM POWER8 Processor. IEEE Comput. Archit. Lett. 15(1): 37-40 (2016) - [j24]