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"Design of an inter-plane circuit for clocked PLAs."

Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen (2000)

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DOI: 10.1109/ISCAS.2000.858743

access: closed

type: Conference or Workshop Paper

metadata version: 2017-10-22

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Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen:
Design of an inter-plane circuit for clocked PLAs. ISCAS 2000: 281-284

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