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2020 – today
- 2022
[j141]Nithyashankari Gummidipoondi Jayasankaran
, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. IEEE Trans. Emerg. Top. Comput. 10(1): 386-403 (2022)- 2021
- [j140]Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Synthesis of High-Order Continuously Tunable Low-Pass Active-R Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1841-1854 (2021) - [j139]Zizhen Zeng, Johan J. Estrada-López, Bo Wang, Edgar Sánchez-Sinencio:
A CMOS Energy Harvesting Interface Circuit With Cycle-to-Cycle Frequency-to-Amplitude Conversion MPPT for Centimeter-Scale Wind Turbine. IEEE Trans. Circuits Syst. I Regul. Pap. 68(9): 3587-3597 (2021) - [j138]Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, Jiang Hu, Jeyavijayan Rajendran, Edgar Sánchez-Sinencio:
Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 36-41 (2021) - [j137]Sanghoon Lee, Edgar Sánchez-Sinencio:
Current Reference Circuits: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 68(3): 830-836 (2021) - 2020
- [j136]John R. Aggas, Edgar Sánchez-Sinencio, Anthony Guiseppi-Elie:
Wien Oscillator Using Organic Enzyme-Chemiresistors for Fused Measurement of Glucose and Lactate. Adv. Intell. Syst. 2(7): 2000004 (2020) - [j135]Sanghoon Lee, Stephen K. Heinrich-Barna, Kyoohyun Noh, Keith Kunz, Edgar Sánchez-Sinencio:
A 1-nA 4.5-nW 289-ppm/°C Current Reference Using Automatic Calibration. IEEE J. Solid State Circuits 55(9): 2498-2512 (2020) - [j134]Zizhen Zeng, Johan J. Estrada-López, Mohamed Abouzied, Edgar Sánchez-Sinencio:
A Reconfigurable Rectifier With Optimal Loading Point Determination for RF Energy Harvesting From -22 dBm to -2 dBm. IEEE Trans. Circuits Syst. II Express Briefs 67-II(1): 87-91 (2020) - [j133]Joseph Riad, Johan J. Estrada-López, Ivan R. Padilla-Cantoya, Edgar Sánchez-Sinencio:
Power-Scaling Output-Compensated Three-Stage OTAs for Wide Load Range Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(7): 2180-2192 (2020) - [j132]Hatem Osman, Edgar Sánchez-Sinencio:
A PVT-Resilient, Highly-Linear Fifth-Order Ring-Oscillator-Based Filter. IEEE Trans. Circuits Syst. 67-I(12): 4295-4308 (2020) - [j131]Joseph Riad, Peng Li, Edgar Sánchez-Sinencio:
A Stabilizing Centralized Controller for On-Chip Power Delivery Networks. IEEE Trans. Circuits Syst. II Express Briefs 67-II(4): 680-684 (2020) - [j130]Johan J. Estrada-López, Amr Abuellil, Alfredo Costilla-Reyes, Mohamed Abouzied, Sungjun Yoon, Edgar Sánchez-Sinencio:
A Fully Integrated Maximum Power Tracking Combiner for Energy Harvesting IoT Applications. IEEE Trans. Ind. Electron. 67(4): 2744-2754 (2020) - [j129]Amr Abuellil, Johan J. Estrada-López, Aditya Bommireddipalli, Alfredo Costilla-Reyes, Zizhen Zeng, Edgar Sánchez-Sinencio:
Multiple-Input Harvesting Power Management Unit With Enhanced Boosting Scheme for IoT Applications. IEEE Trans. Ind. Electron. 67(5): 3662-3672 (2020) - [j128]Samuel Annor Fordjour, Joseph Riad, Edgar Sánchez-Sinencio:
A 175.2-mW 4-Stage OTA With Wide Load Range (400 pF-12 nF) Using Active Parallel Compensation. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1621-1629 (2020) - [j127]Fernando Lavalle-Aviles, Edgar Sánchez-Sinencio:
A 0.6-V Power-Efficient Active-RC Analog Low-Pass Filter With Cutoff Frequency Selection. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1757-1769 (2020) - [j126]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Breaking Analog Locking Techniques. IEEE Trans. Very Large Scale Integr. Syst. 28(10): 2157-2170 (2020) - [c98]Jianhao Chen, Joseph Riad, Edgar Sánchez-Sinencio, Peng Li:
Dynamic Heterogeneous Voltage Regulation for Systolic Array-Based DNN Accelerators. ICCD 2020: 486-493 - [c97]Guillermo G. Garayar-Leyva, Hatem Osman, Johan J. Estrada-López, Edgar Sánchez-Sinencio:
A Harmonic-Canceling Synthesizer using Skew-Circulant-Matrix-Based Coefficient Generator. ISCAS 2020: 1-5 - [c96]Joseph Riad, Jianhao Chen, Edgar Sánchez-Sinencio, Peng Li:
Variation-Aware Heterogeneous Voltage Regulation for Multi-Core Systems-on-a-Chip with On-Chip Machine Learning. ISQED 2020: 190-194 - [c95]Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, S. Y. Lee, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan (JV) Rajendran:
Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits. ITC 2020: 1-10
2010 – 2019
- 2019
- [j125]Zizhen Zeng, Shanpu Shen, Xiaopeng Zhong, Xing Li, Chi-Ying Tsui, Amine Bermak, Ross D. Murch, Edgar Sánchez-Sinencio:
Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From -22 to 4 dBm With 99.8% Peak MPPT Power Efficiency. IEEE J. Solid State Circuits 54(9): 2601-2613 (2019) - [j124]Xin Zhan, Peng Li, Edgar Sánchez-Sinencio:
Taming the Stability-Constrained Performance Optimization Challenge of Distributed On-Chip Voltage Regulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(8): 1571-1584 (2019) - [j123]Kyoohyun Noh, Minglei Zhang, Edgar Sánchez-Sinencio:
A Unified Amplifier-Based CC-CV Linear Charger for Energy-Constrained Low-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 377-381 (2019) - [j122]Congyin Shi, Edgar Sánchez-Sinencio:
An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 897-908 (2019) - [j121]Alfredo Costilla-Reyes, Amr Abuellil, Johan J. Estrada-López, Salvador Carreon-Bautista, Edgar Sánchez-Sinencio:
Reconfigurable System for Electromagnetic Energy Harvesting With Inherent Activity Sensing Capabilities for Wearable Technology. IEEE Trans. Circuits Syst. II Express Briefs 66-II(8): 1302-1306 (2019) - [j120]Omar Elsayed, Jorge Zarate-Roldan, Amr Abuellil, Faisal Abdel-Latif Hussien, Ahmed Eladawy, Edgar Sánchez-Sinencio:
Highly Linear Low-Power Wireless RF Receiver for WSN. IEEE Trans. Very Large Scale Integr. Syst. 27(5): 1007-1016 (2019) - [j119]Xin Zhan, Jianhao Chen, Edgar Sánchez-Sinencio, Peng Li:
Power Management for Multicore Processors via Heterogeneous Voltage Regulation and Machine Learning Enabled Adaptation. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2641-2654 (2019) - [c94]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Breaking Analog Locking Techniques via Satisfiability Modulo Theories. ITC 2019: 1-10 - 2018
- [j118]Congyin Shi, Sanghoon Lee, Sergio Soto Aguilar, Edgar Sánchez-Sinencio:
A Time-Domain Digital-Intensive Built-In Tester for Analog Circuits. J. Electron. Test. 34(3): 313-320 (2018) - [j117]Xiaosen Liu, Krishnan Ravichandran, Edgar Sánchez-Sinencio:
A Switched Capacitor Energy Harvester Based on a Single-Cycle Criterion for MPPT to Eliminate Storage Capacitor. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(2): 793-803 (2018) - [j116]Sanghoon Lee, Congyin Shi, Jiafan Wang, Adriana C. Sanabria-Borbon, Hatem Osman, Jiang Hu, Edgar Sánchez-Sinencio:
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3445-3458 (2018) - [j115]Sungjun Yoon, Salvador Carreon-Bautista, Edgar Sánchez-Sinencio:
An Area Efficient Thermal Energy Harvester With Reconfigurable Capacitor Charge Pump for IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs 65-II(12): 1974-1978 (2018) - [j114]Mohamed Abouzied, Hatem Osman, Vaibhav A. Vaidya, Krishnan Ravichandran, Edgar Sánchez-Sinencio:
An Integrated Concurrent Multiple-Input Self-Startup Energy Harvesting Capacitive-Based DC Adder Combiner. IEEE Trans. Ind. Electron. 65(8): 6281-6290 (2018) - [j113]Judy M. Amanor-Boadu, Mohamed Abouzied, Edgar Sánchez-Sinencio:
An Efficient and Fast Li-Ion Battery Charging System Using Energy Harvesting or Conventional Sources. IEEE Trans. Ind. Electron. 65(9): 7383-7394 (2018) - [j112]Judy M. Amanor-Boadu, Anthony Guiseppi-Elie, Edgar Sánchez-Sinencio:
Search for Optimal Pulse Charging Parameters for Li-Ion Polymer Batteries Using Taguchi Orthogonal Arrays. IEEE Trans. Ind. Electron. 65(11): 8982-8992 (2018) - [j111]Xin Zhan, Joseph Riad, Peng Li, Edgar Sánchez-Sinencio:
Design Space Exploration of Distributed On-Chip Voltage Regulation Under Stability Constraint. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1580-1584 (2018) - [j110]Kyoohyun Noh, Judy M. Amanor-Boadu, Minglei Zhang, Edgar Sánchez-Sinencio:
A 13.56-MHz CMOS Active Rectifier With a Voltage Mode Switched-Offset Comparator for Implantable Medical Devices. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 2050-2060 (2018) - [c93]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Towards provably-secure analog and mixed-signal locking against overproduction. ICCAD 2018: 7 - [c92]Johan J. Estrada-López, Amr Abuellil, Alfredo Costilla-Reyes, Edgar Sánchez-Sinencio:
Technology Enabling Circuits and Systems for the Internet-of-Things: An Overview. ISCAS 2018: 1-5 - [c91]Sergio Soto Aguilar, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Surrogate-based Optimization-aided Design for Low Power Analog Circuits. MWSCAS 2018: 566-569 - [i1]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. IACR Cryptol. ePrint Arch. 2018: 1064 (2018) - 2017
- [j109]Mohamed Abouzied, Krishnan Ravichandran, Edgar Sánchez-Sinencio:
A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability. IEEE J. Solid State Circuits 52(3): 704-719 (2017) - [j108]Congyin Shi, Edgar Sánchez-Sinencio:
On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture. IEEE J. Solid State Circuits 52(8): 2105-2116 (2017) - [j107]Minglei Zhang, Kyoohyun Noh, Xiaohua Fan, Edgar Sánchez-Sinencio:
A 0.8-1.2 V 10-50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier. IEEE J. Solid State Circuits 52(11): 2991-3005 (2017) - [j106]Xiaosen Liu, Adrian I. Colli-Menchi, Edgar Sánchez-Sinencio:
Ultrasonic Electric Scalpels Based on a Sliding-Mode Controller With an Auxiliary PLL Frequency Discriminator. IEEE Trans. Biomed. Circuits Syst. 11(6): 1226-1235 (2017) - [j105]Nashiru Alhassan, Zekun Zhou, Edgar Sánchez-Sinencio:
An All-MOSFET Voltage Reference With -50-dB PSR at 80 MHz for Low-Power SoC Design. IEEE Trans. Circuits Syst. II Express Briefs 64-II(8): 892-896 (2017) - [j104]Massimo Alioto, Edgar Sánchez-Sinencio, Alberto L. Sangiovanni-Vincentelli:
Guest Editorial Special Issue on Circuits and Systems for the Internet of Things - From Sensing to Sensemaking. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2221-2225 (2017) - [j103]Nashiru Alhassan, Zekun Zhou, Edgar Sánchez-Sinencio:
An All-MOSFET Sub-1-V Voltage Reference With a - 51 -dB PSR up to 60 MHz. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 919-928 (2017) - [c90]Edgar Sánchez-Sinencio:
Analog filter design: Current design techniques and trends. CICC 2017: 1-76 - [c89]Ang Li, Peng Li, Tingwen Huang, Edgar Sánchez-Sinencio:
Noise-sensitive feedback loop identification in linear time-varying analog circuits. DATE 2017: 1285-1288 - [c88]Xiaosen Liu, Adrian I. Colli-Menchi, Edgar Sánchez-Sinencio:
21.4 A reduced-order sliding-mode controller with an auxiliary PLL frequency discriminator for ultrasonic electric scalpels. ISSCC 2017: 358-359 - [c87]Stefano Stanzione, Edgar Sánchez-Sinencio, Axel Thomsen:
Session 22 overview: Harvesting and wireless power. ISSCC 2017: 368-369 - [c86]Jiafan Wang, Congyin Shi, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu:
Thwarting analog IC piracy via combinational locking. ITC 2017: 1-10 - [c85]Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives. LASCAS 2017: 1-4 - 2016
- [j102]Xiaosen Liu, Lilly Huang, Krishnan Ravichandran, Edgar Sánchez-Sinencio:
A Highly Efficient Reconfigurable Charge Pump Energy Harvester With Wide Harvesting Range and Two-Dimensional MPPT for Internet of Things. IEEE J. Solid State Circuits 51(5): 1302-1312 (2016) - [j101]Salvador Carreon-Bautista, Lilly Huang, Edgar Sánchez-Sinencio:
An Autonomous Energy Harvesting Power Management Unit With Digital Regulation for IoT Applications. IEEE J. Solid State Circuits 51(6): 1457-1474 (2016) - [j100]Edgar Sánchez-Sinencio, Jan Mulder, Antonio Liscidini, Eric A. M. Klumperink, Elad Alon:
Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 51(12): 2803-2807 (2016) - [j99]Jorge Zarate-Roldan, Mengde Wang, Joselyn Torres, Edgar Sánchez-Sinencio:
A Capacitor-Less LDO With High-Frequency PSR Suitable for a Wide Range of On-Chip Capacitive Loads. IEEE Trans. Very Large Scale Integr. Syst. 24(9): 2970-2982 (2016) - [c84]Xin Zhan, Peng Li, Edgar Sánchez-Sinencio:
Distributed on-chip regulation: theoretical stability foundation, over-design reduction and performance optimization. DAC 2016: 54:1-54:6 - [c83]Xiaosen Liu, Edgar Sánchez-Sinencio:
21.1 A single-cycle MPPT charge-pump energy harvester using a thyristor-based VCO without storage capacitor. ISSCC 2016: 364-365 - 2015
- [j98]Bharadvaj Bhamidipati, Adrian Colli-Menchi, Edgar Sánchez-Sinencio:
Low power complementary metal-oxide semiconductor class-G audio amplifier with gradual power supply switching. IET Circuits Devices Syst. 9(4): 256-264 (2015) - [j97]Xiaosen Liu, Edgar Sánchez-Sinencio:
An 86% Efficiency 12 µW Self-Sustaining PV Energy Harvesting System With Hysteresis Regulation and Time-Domain MPPT for IOT Smart Nodes. IEEE J. Solid State Circuits 50(6): 1424-1437 (2015) - [j96]Jiayi Jin, Edgar Sánchez-Sinencio:
A Home Sleep Apnea Screening Device With Time-Domain Signal Processing and Autonomous Scoring Capability. IEEE Trans. Biomed. Circuits Syst. 9(1): 96-104 (2015) - [j95]Jorge Zarate-Roldan, Salvador Carreon-Bautista, Alfredo Costilla-Reyes, Edgar Sánchez-Sinencio:
A Power Management Unit With 40 dB Switching-Noise-Suppression for a Thermal Harvesting Array. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 1918-1928 (2015) - [j94]Congyin Shi, Edgar Sánchez-Sinencio:
150-850 MHz High-Linearity Sine-wave Synthesizer Architecture Based on FIR Filter Approach and SFDR Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2227-2237 (2015) - [j93]Xiaosen Liu, Adrian Colli-Menchi, James G. R. Gilbert, Daniel A. Friedrichs, Keith Malang, Edgar Sánchez-Sinencio:
An Automatic Resonance Tracking Scheme With Maximum Power Transfer for Piezoelectric Transducers. IEEE Trans. Ind. Electron. 62(11): 7136-7145 (2015) - [j92]Xiaosen Liu, Edgar Sánchez-Sinencio:
A Highly Efficient Ultralow Photovoltaic Power Harvesting System With MPPT for Internet of Things Smart Nodes. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3065-3075 (2015) - [c82]Xiaosen Liu, Edgar Sánchez-Sinencio:
20.7 A 0.45-to-3V reconfigurable charge-pump energy harvester with two-dimensional MPPT for Internet of Things. ISSCC 2015: 1-3 - [c81]Jiafan Wang, Congyin Shi, Edgar Sánchez-Sinencio, Jiang Hu:
Built-In Self Optimization for Variation Resilience of Analog Filters. ISVLSI 2015: 656-661 - 2014
- [j91]Erik Pankratz, Edgar Sánchez-Sinencio:
Survey of integrated-circuit-oscillator phase-noise analysis. Int. J. Circuit Theory Appl. 42(9): 871-938 (2014) - [j90]Adrian Colli-Menchi, Joselyn Torres, Edgar Sánchez-Sinencio:
A Feed-Forward Power-Supply Noise Cancellation Technique for Single-Ended Class-D Audio Amplifiers. IEEE J. Solid State Circuits 49(3): 718-728 (2014) - [j89]Jiayi Jin, Yang Gao, Edgar Sánchez-Sinencio:
An Energy-Efficient Time-Domain Asynchronous 2 b/Step SAR ADC With a Hybrid R-2R/C-3C DAC Structure. IEEE J. Solid State Circuits 49(6): 1383-1396 (2014) - [j88]Jingjing Yu, Ahmed Amer, Edgar Sánchez-Sinencio:
Electromagnetic Interference Resisting Operational Amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 1917-1927 (2014) - [j87]Salvador Carreon-Bautista, Ahmed Eladawy, Ahmed Nader Mohieldin, Edgar Sánchez-Sinencio:
Boost Converter With Dynamic Input Impedance Matching for Energy Harvesting With Multi-Array Thermoelectric Generators. IEEE Trans. Ind. Electron. 61(10): 5345-5353 (2014) - [c80]Jorge Zarate-Roldan, Salvador Carreon-Bautista, Alfredo Costilla-Reyes, Edgar Sánchez-Sinencio:
An ultra-low power power management unit with -40dB switching-noise-suppression for a 3×3 thermoelectric generator array with 57% maximum end-to-end efficiency. CICC 2014: 1-4 - [c79]Edgar Sánchez-Sinencio:
Smart nodes of internet of things (IoT): a hardware perspective view & implementation. ACM Great Lakes Symposium on VLSI 2014: 137-138 - [c78]José Silva-Martínez, Edgar Sánchez-Sinencio, José G. Delgado-Frias, Randall L. Geiger:
Welcome to MWSCAS 2014. MWSCAS 2014: 1-2 - [c77]Judy M. Amanor-Boadu, Mohamed A. Abouzied, Salvador Carreon-Bautista, Roland Ribeiro, Xiaosen Liu, Edgar Sánchez-Sinencio:
A switched mode Li-ion battery charger with multiple energy harvesting systems simultaneously used as input sources. MWSCAS 2014: 330-333 - [c76]Leticia Ibarra, Benjamin Hilton, Mehna Nawal, Salvador Carreon-Bautista, Mohamed Abouzied, Xiaosen Liu, Roland Ribeiro, Judy Amanor-Badu, Ethan Miller, Jorge Vanegas, Edgar Sánchez-Sinencio:
SmartShelter: A Sustainable power system design using energy harvesting techniques. MWSCAS 2014: 467-470 - [c75]Arunvenkatesh Alagappan, Sergio Soto Aguilar, Edgar Sánchez-Sinencio:
Reduced clock harmonic distortion technique in maximum tunable switched-R-MOSFET-C filters. MWSCAS 2014: 1037-1040 - 2013
- [j86]Mohamed M. Elsayed, Mohammed M. Abdul-Latif, Edgar Sánchez-Sinencio:
A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS. IEEE J. Solid State Circuits 48(9): 2104-2117 (2013) - [j85]Chengliang Qian, Jess Shi, Jordi Parramon, Edgar Sánchez-Sinencio:
A Low-Power Configurable Neural Recording System for Epileptic Seizure Detection. IEEE Trans. Biomed. Circuits Syst. 7(4): 499-512 (2013) - [j84]Hesam Amir Aslanzadeh, Erik John Pankratz, Chinmaya Mishra, Edgar Sánchez-Sinencio:
Current-Reused 2.4-GHz Direct-Modulation Transmitter With On-Chip Automatic Tuning. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 732-746 (2013) - [c74]Reza Abdullah, Edgar Sánchez-Sinencio:
A biopotential amplifier with improved common mode gain. LASCAS 2013: 1-4 - 2012
- [j83]Mohammed M. Abdul-Latif, Edgar Sánchez-Sinencio:
Low Phase Noise Wide Tuning Range N-Push Cyclic-Coupled Ring Oscillators. IEEE J. Solid State Circuits 47(6): 1278-1294 (2012) - [j82]Erik Pankratz, Edgar Sánchez-Sinencio:
Multiloop High-Power-Supply-Rejection Quadrature Ring Oscillator. IEEE J. Solid State Circuits 47(9): 2033-2048 (2012) - [j81]Hajir Hedayati, Mohamed Mobarak, Guillaume Varin, Philippe Meunier, Patrice Gamand, Edgar Sánchez-Sinencio, Kamran Entesari:
A 2-GHz Highly Linear Efficient Dual-Mode BiCMOS Power Amplifier Using a Reconfigurable Matching Network. IEEE J. Solid State Circuits 47(10): 2385-2404 (2012) - [j80]Félix O. Fernandez-Rodriguez, Edgar Sánchez-Sinencio:
Advanced Quenching Techniques for Super-Regenerative Radio Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(7): 1533-1545 (2012) - [c73]Joseph S. Chang, Tong Ge, Edgar Sánchez-Sinencio:
Challenges of printed electronics on flexible substrates. MWSCAS 2012: 582-585 - [c72]Moataz Abdelfattah, Ahmed Nader Mohieldin, Ahmed Emira, Ahmed K. Hussien, Edgar Sánchez-Sinencio:
Ultra-low-voltage power management unit for thermal energy harvesting applications. NEWCAS 2012: 381-384 - 2011
- [j79]Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz:
A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element. IEEE J. Solid State Circuits 46(3): 639-650 (2011) - [j78]Mohamed El-Nozahi, Ahmed A. Helmy, Edgar Sánchez-Sinencio, Kamran Entesari:
An Inductor-Less Noise-Cancelling Broadband Low Noise Amplifier With Composite Transistor Pair in 90 nm CMOS Technology. IEEE J. Solid State Circuits 46(5): 1111-1122 (2011) - [j77]Mohammed M. Abdul-Latif, Mohamed M. Elsayed, Edgar Sánchez-Sinencio:
A Wideband Millimeter-Wave Frequency Synthesis Architecture Using Multi-Order Harmonic-Synthesis and Variable N -Push Frequency Multiplication. IEEE J. Solid State Circuits 46(6): 1265-1283 (2011) - [j76]Chengliang Qian, Jordi Parramon, Edgar Sánchez-Sinencio:
A Micropower Low-Noise Neural Recording Front-End Circuit for Epileptic Seizure Detection. IEEE J. Solid State Circuits 46(6): 1392-1405 (2011) - [j75]Joselyn Torres, Adrian Colli-Menchi, Miguel Angel Rojas González, Edgar Sánchez-Sinencio:
A Low-Power High-PSRR Clock-Free Current-Controlled Class-D Audio Amplifier. IEEE J. Solid State Circuits 46(7): 1553-1561 (2011) - [j74]Mohamed M. Elsayed, Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio:
A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator. IEEE J. Solid State Circuits 46(9): 2084-2098 (2011) - [j73]Heng Zhang, Edgar Sánchez-Sinencio:
Linearization Techniques for CMOS Low Noise Amplifiers: A Tutorial. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(1): 22-36 (2011) - [j72]Didem Zeliha Turker, Sunil P. Khatri, Edgar Sánchez-Sinencio:
A DCVSL Delay Cell for Fast Low Power Frequency Synthesis Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(6): 1225-1238 (2011) - [c71]Hajir Hedayati, Mohamed Mobarak, Guillaume Varin, Philippe Meunier, Patrice Gamand, Edgar Sánchez-Sinencio, Kamran Entesari:
A fully integrated highly linear efficient power amplifier in 0.25µm BiCMOS technology for wireless applications. CICC 2011: 1-4 - [c70]Heng Zhang, Junhua Tan, Chao Zhang, Hongbo Chen, Edgar Sánchez-Sinencio:
A 0.6-to-200MSPS speed reconfigurable and 1.9-to-27mW power scalable 10bit ADC. ESSCIRC 2011: 367-370 - 2010
- [j71]Mohamed El-Nozahi, Edgar Sánchez-Sinencio, Kamran Entesari:
A Millimeter-Wave (23-32 GHz) Wideband BiCMOS Low-Noise Amplifier. IEEE J. Solid State Circuits 45(2): 289-299 (2010) - [j70]Mohamed Mobarak, Marvin Onabajo, José Silva-Martínez, Edgar Sánchez-Sinencio:
Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications. IEEE J. Solid State Circuits 45(2): 351-367 (2010) - [j69]Mohamed El-Nozahi, Ahmed Amer, Joselyn Torres, Kamran Entesari, Edgar Sánchez-Sinencio:
High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique. IEEE J. Solid State Circuits 45(3): 565-577 (2010) - [j68]Mohamed M. Elsayed, Edgar Sánchez-Sinencio:
A Low THD, Low Power, High Output-Swing Time-Mode-Based Tunable Oscillator Via Digital Harmonic-Cancellation Technique. IEEE J. Solid State Circuits 45(5): 1061-1071 (2010) - [c69]Ahmed Amer, Edgar Sánchez-Sinencio:
A 140mA 90nm CMOS low drop-out regulator with -56dB power supply rejection at 10MHz. CICC 2010: 1-4 - [c68]Joselyn Torres, Adrian Colli-Menchi, Miguel Angel Rojas González, Edgar Sánchez-Sinencio:
A 470μW clock-free current-controlled class D amplifier with 0.02% THD+N and 82dB PSRR. ESSCIRC 2010: 326-329
2000 – 2009
- 2009
- [j67]Heng Zhang, Xiaohua Fan, Edgar Sánchez-Sinencio:
A Low-Power, Linearized, Ultra-Wideband LNA Design Technique. IEEE J. Solid State Circuits 44(2): 320-330 (2009) - [j66]Hesam Amir Aslanzadeh, Erik John Pankratz, Edgar Sánchez-Sinencio:
A 1-V +31 dBm IIP3, Reconfigurable, Continuously Tunable, Power-Adjustable Active-RC LPF. IEEE J. Solid State Circuits 44(2): 495-508 (2009) - [j65]Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
Design of Three-Stage Class-AB 16ΩHeadphone Driver Capable of Handling Wide Range of Load Capacitance. IEEE J. Solid State Circuits 44(6): 1734-1744 (2009) - [j64]Sang Wook Park, Edgar Sánchez-Sinencio:
RF Oscillator Based on a Passive RC Bandpass Filter. IEEE J. Solid State Circuits 44(11): 3092-3101 (2009) - [j63]Miguel Angel Rojas González, Edgar Sánchez-Sinencio:
Low-Power High-Efficiency Class D Audio Power Amplifiers. IEEE J. Solid State Circuits 44(12): 3272-3284 (2009) - [j62]Marvin Onabajo, José Silva-Martínez, Félix O. Fernandez-Rodriguez, Edgar Sánchez-Sinencio:
An On-Chip Loopback Block for RF Transceiver Built-In Test. IEEE Trans. Circuits Syst. II Express Briefs 56-II(6): 444-448 (2009) - [j61]Mohamed El-Nozahi, Edgar Sánchez-Sinencio, Kamran Entesari:
Power-Aware Multiband-Multistandard CMOS Receiver System-Level Budgeting. IEEE Trans. Circuits Syst. II Express Briefs 56-II(7): 570-574 (2009) - [j60]Chinmaya Mishra, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio, José Silva-Martínez:
System and Circuit Design for an MB-OFDM UWB Frequency Synthesizer. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(7): 1467-1477 (2009) - [c67]Heng Zhang, Mohamed Mostafa Elsayed, Edgar Sánchez-Sinencio:
New applications and technology scaling driving next generation A/D converters. ECCTD 2009: 109-112 - [c66]Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz:
A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element. ISSCC 2009: 174-175 - [c65]Mohamed El-Nozahi, Ahmed Amer, Joselyn Torres, Kamran Entesari, Edgar Sánchez-Sinencio:
A 25mA 0.13µm CMOS LDO regulator with power-supply rejection better than -56dB up to 10MHz using a feedforward ripple-cancellation technique. ISSCC 2009: 330-331 - [c64]Miguel Angel Rojas González, Edgar Sánchez-Sinencio:
Two Class-D audio amplifiers with 89/90% efficiency and 0.02/0.03% THD+N consuming less than 1mW of quiescent power. ISSCC 2009: 450-451 - 2008
- [j59]Xiaohua Fan, Heng Zhang, Edgar Sánchez-Sinencio:
A Noise Reduction and Linearity Improvement Technique for a Differential Cascode LNA. IEEE J. Solid State Circuits 43(3): 588-599 (2008) - [j58]Tongyu Song, Jingyu Hu, Xiaohong Li, Edgar Sánchez-Sinencio, Shouli Yan:
A Robust and Scalable Constant- gm Rail-to-Rail CMOS Input Stage With Dynamic Feedback for VLSI Cell Libraries. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 804-816 (2008) - [j57]Pradeep Kotte Prakasam, Mandar Kulkarni, Xi Chen, Zhuizhuan Yu, Sebastian Hoyos, José Silva-Martínez, Edgar Sánchez-Sinencio:
Applications of Multipath Transform-Domain Charge-Sampling Wide-Band Receivers. IEEE Trans. Circuits Syst. II Express Briefs 55-II(4): 309-313 (2008) - [j56]Xiaohua Fan, Marvin Onabajo, Félix O. Fernandez-Rodriguez, José Silva-Martínez, Edgar Sánchez-Sinencio:
A Current Injection Built-In Test Technique for RF Low-Noise Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(7): 1794-1804 (2008) - [j55]Alberto Valdes-Garcia, Radhika Venkatasubramanian, José Silva-Martínez, Edgar Sánchez-Sinencio:
A Broadband CMOS Amplitude Detector for On-Chip RF Measurements. IEEE Trans. Instrum. Meas. 57(7): 1470-1477 (2008) - [c63]Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
A low power 1.3GHz dual-path current mode Gm-C filter. CICC 2008: 703-706 - [c62]Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF. ISSCC 2008: 434-435 - 2007
- [j54]Faramarz Bahmani, Edgar Sánchez-Sinencio:
Low THD bandpass-based oscillator using multilevel hard limiter. IET Circuits Devices Syst. 1(2): 151-160 (2007) - [j53]Slawomir Koziel, A. Ramachandran, Stanislaw Szczepanski, Edgar Sánchez-Sinencio:
A general framework for evaluating nonlinearity, noise and dynamic range in continuous-time OTA-C filters for computer-aided design and optimization. Int. J. Circuit Theory Appl. 35(4): 405-425 (2007) - [j52]Alberto Valdes-Garcia, Chinmaya Mishra, Faramarz Bahmani, José Silva-Martínez, Edgar Sánchez-Sinencio:
An 11-Band 3-10 GHz Receiver in SiGe BiCMOS for Multiband OFDM UWB Communication. IEEE J. Solid State Circuits 42(4): 935-948 (2007) - [j51]Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio:
A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter. IEEE J. Solid State Circuits 42(11): 2411-2420 (2007) - [j50]Sang Wook Park, José L. Ausín, Faramarz Bahmani, Edgar Sánchez-Sinencio:
Nonlinear Shaping SC Oscillator With Enhanced Linearity. IEEE J. Solid State Circuits 42(11): 2421-2431 (2007) - [j49]Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio:
Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band Gm-C Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(3): 458-468 (2007) - [j48]Faramarz Bahmani, Teresa Serrano-Gotarredona, Edgar Sánchez-Sinencio:
An Accurate Automatic Quality-Factor Tuning Scheme for Second-Order LC Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(4): 745-756 (2007) - [j47]Robert Jon Milliken, José Silva-Martínez, Edgar Sánchez-Sinencio:
Full On-Chip CMOS Low-Dropout Voltage Regulator. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(9): 1879-1890 (2007) - [j46]Miguel Angel Rojas González, Edgar Sánchez-Sinencio:
Design of a Class D Audio Amplifier IC Using Sliding Mode Control and Negative Feedback. IEEE Trans. Consumer Electron. 53(2): 609-617 (2007) - [c61]Rangakrishnan Srinivasan, Didem Zeliha Turker, Sang Wook Park, Edgar Sánchez-Sinencio:
A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications. ISCAS 2007: 429-432 - [c60]Burak Kelleci, Edgar Sánchez-Sinencio, Aydin I. Karsilayan:
THD+Noise Estimation in Class-D Amplifiers. ISCAS 2007: 465-468 - 2006
- [j45]Alberto Valdes-Garcia, José Silva-Martínez, Edgar Sánchez-Sinencio:
On-Chip Testing Techniques for RF Wireless Transceivers. IEEE Des. Test Comput. 23(4): 268-277 (2006) - [j44]Bo Xia, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio:
A 10-bit 44-MS/s 20-mW configurable time-interleaved pipeline ADC for a dual-mode 802.11b/Bluetooth receiver. IEEE J. Solid State Circuits 41(3): 530-539 (2006) - [j43]Ari Yakov Valero-López, Sung Tae Moon, Edgar Sánchez-Sinencio:
Self-calibrated quadrature generator for WLAN multistandard frequency synthesizer. IEEE J. Solid State Circuits 41(5): 1031-1041 (2006) - [j42]Alberto Valdes-Garcia, Faisal Abdel-Latif Hussien, José Silva-Martínez, Edgar Sánchez-Sinencio:
An Integrated Frequency Response Characterization System With a Digital Interface for Analog Testing. IEEE J. Solid State Circuits 41(10): 2301-2313 (2006) - [j41]Jianlong Chen, Edgar Sánchez-Sinencio, José Silva-Martínez:
Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(3): 499-510 (2006) - [j40]Ahmed A. Emira, Alberto Valdes-Garcia, Bo Xia, A. N. Mohieldin, Ari Yakov Valero-López, Sung Tae Moon, Chunyu Xin, Edgar Sánchez-Sinencio:
Chameleon: a dual-mode 802.11b/Bluetooth receiver system design. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(5): 992-1003 (2006) - [j39]Wenjun Sheng, Ahmed Emira, Edgar Sánchez-Sinencio:
CMOS RF receiver system design: a systematic approach. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(5): 1023-1034 (2006) - [j38]Wenchang Huang, Edgar Sánchez-Sinencio:
Robust highly linear high-frequency CMOS OTA with IM3 below - 70 dB at 26 MHz. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(7): 1433-1447 (2006) - [j37]Faramarz Bahmani, Edgar Sánchez-Sinencio:
A Stable Loss Control Feedback Loop for VCO Amplitude Tuning. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(12): 2498-2506 (2006) - [c59]A. K. Gupta, Edgar Sánchez-Sinencio, S. Karthikeyan, Wern Ming Koe, Yong-In Park:
Second order dynamic element matching technique for low oversampling delta sigma ADC. ISCAS 2006 - 2005
- [j36]Marcia G. Méndez-Rivera, Alberto Valdes-Garcia, José Silva-Martínez, Edgar Sánchez-Sinencio:
An On-Chip Spectrum Analyzer for Analog Built-In Testing. J. Electron. Test. 21(3): 205-219 (2005) - [j35]Xiaohua Fan, Chinmaya Mishra, Edgar Sánchez-Sinencio:
Single Miller capacitor frequency compensation technique for low-power multistage amplifiers. IEEE J. Solid State Circuits 40(3): 584-592 (2005) - [j34]Timothy Wayne Fischer, Aydin I. Karsilayan, Edgar Sánchez-Sinencio:
A rail-to-rail amplifier input stage with ±0.35%gm fluctuation. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(2): 271-282 (2005) - [j33]Wei Zhuo, Xiaoyong Li, Sudip Shekhar, Sherif H. K. Embabi, José Pineda de Gyvez, David J. Allstot, Edgar Sánchez-Sinencio:
A capacitor cross-coupled common-gate low-noise amplifier. IEEE Trans. Circuits Syst. II Express Briefs 52-II(12): 875-879 (2005) - [c58]Shouli Yan, Jingyu Hu, Tongyu Song, Edgar Sánchez-Sinencio:
A constant-gm rail-to-rail op amp input stage using dynamic current scaling technique. ISCAS (3) 2005: 2567-2570 - [c57]Shouli Yan, Jingyu Hu, Tongyu Song, Edgar Sánchez-Sinencio:
Constant-gm techniques for rail-to-rail CMOS amplifier input stages: a comparative study. ISCAS (3) 2005: 2571-2574 - [c56]Feng Zhu, Shouli Yan, Jingyu Hu, Edgar Sánchez-Sinencio:
Feedforward reversed nested Miller compensation techniques for three-stage amplifiers. ISCAS (3) 2005: 2575-2578 - [c55]Alberto Valdes-Garcia, Radhika Venkatasubramanian, Rangakrishnan Srinivasan, José Silva-Martínez, Edgar Sánchez-Sinencio:
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers. VTS 2005: 249-254 - 2004
- [j32]Shouli Yan, Edgar Sánchez-Sinencio:
A continuous-time sigma-delta modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth. IEEE J. Solid State Circuits 39(1): 75-86 (2004) - [j31]Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo, Antonio J. López-Martín, Edgar Sánchez-Sinencio:
A fully parallel CMOS analog median filter. IEEE Trans. Circuits Syst. II Express Briefs 51-II(3): 116-123 (2004) - [j30]Bo Xia, Shouli Yan, Edgar Sánchez-Sinencio:
An RC time constant auto-tuning structure for high linearity continuous-time ΣΔ modulators and active filters. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(11): 2179-2188 (2004) - [j29]Benoit Provost, Edgar Sánchez-Sinencio:
A practical self-calibration scheme implementation for pipeline ADC. IEEE Trans. Instrum. Meas. 53(2): 448-456 (2004) - [c54]Faramarz Bahmani, Edgar Sánchez-Sinencio:
A highly linear pseudo-differential transconductance [CMOS OTA]. ESSCIRC 2004: 111-114 - [c53]Bo Xia, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio:
A configurable time-interleaved pipeline ADC for multi-standard wireless receivers. ESSCIRC 2004: 259-262 - [c52]Ahmed Nader Mohieldin, Edgar Sánchez-Sinencio:
A dual-mode low-pass filter for 802.11b/Bluetooth receiver. ESSCIRC 2004: 423-426 - [c51]Slawomir Koziel, A. Ramachandran, Stanislaw Szczepanski, Edgar Sánchez-Sinencio:
Dynamic range, noise and linearity optimization of continuous-time OTA-C filters. ICECS 2004: 41-44 - [c50]Chunyu Xin, Edgar Sánchez-Sinencio:
A linearization technique for RF low noise amplifier. ISCAS (4) 2004: 313-316 - [c49]Xiaohua Fan, Chinmaya Mishra, Edgar Sánchez-Sinencio:
Single Miller capacitor compensated multistage amplifiers for large capacitive load applications. ISCAS (1) 2004: 493-496 - [c48]Stanislaw Szczepanski, Slawomir Koziel, Edgar Sánchez-Sinencio:
Linearized CMOS OTA using active-error feedforward technique. ISCAS (1) 2004: 549-552 - [c47]Ari Yakov Valero-López, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio:
Frequency synthesizer for on-chip testing and automated tuning. ISCAS (4) 2004: 565-568 - [c46]Xiaohua Fan, Edgar Sánchez-Sinencio:
3-22GHz CMOS distributed single-balanced mixer. SoCC 2004: 93-96 - [c45]Alberto Valdes-Garcia, José Silva-Martínez, Edgar Sánchez-Sinencio:
An On-Chip Transfer Function Characterization System for Analog Built-in Testing. VTS 2004: 261-266 - 2003
- [j28]Wenjun Sheng, Bo Xia, Ahmed E. Emira, Chunyu Xin, Ari Yakov Valero-López, Sung Tae Moon, Edgar Sánchez-Sinencio:
A 3-V, 0.35-μm CMOS Bluetooth receiver IC. IEEE J. Solid State Circuits 38(1): 30-42 (2003) - [j27]Benoit Provost, Edgar Sánchez-Sinencio:
On-chip ramp generators for mixed-signal BIST and ADC self-test. IEEE J. Solid State Circuits 38(2): 263-273 (2003) - [j26]Praveen Kallam, Edgar Sánchez-Sinencio, Aydin Ilker Karsilayan:
An enhanced adaptive Q-tuning scheme for a 100-MHz fully symmetric OTA-based bandpass filter. IEEE J. Solid State Circuits 38(4): 585-593 (2003) - [j25]Ahmed Nader Mohieldin, Edgar Sánchez-Sinencio, José Silva-Martínez:
A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector. IEEE J. Solid State Circuits 38(4): 663-668 (2003) - [j24]Keliu Shu, Edgar Sánchez-Sinencio, José Silva-Martínez, Sherif H. K. Embabi:
A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier. IEEE J. Solid State Circuits 38(6): 866-874 (2003) - [j23]Fikret Dulger, Edgar Sánchez-Sinencio, José Silva-Martínez:
A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35-μm CMOS. IEEE J. Solid State Circuits 38(6): 918-928 (2003) - [j22]Ahmed N. Mohieldin, Edgar Sánchez-Sinencio, José Silva-Martínez:
A 2.7-V 1.8-GHz fourth-order tunable LC bandpass filter based on emulation of magnetically coupled resonators. IEEE J. Solid State Circuits 38(7): 1172-1181 (2003) - [j21]Bo Xia, Chunyu Xin, Wenjun Sheng, Ari Yakov Valero-López, Edgar Sánchez-Sinencio:
A GFSK demodulator for low-IF Bluetooth receiver. IEEE J. Solid State Circuits 38(8): 1397-1400 (2003) - [j20]Yunchu Li, Edgar Sánchez-Sinencio:
A wide input bandwidth 7-bit 300-MSample/s folding and current-mode interpolating ADC. IEEE J. Solid State Circuits 38(8): 1405-1410 (2003) - [j19]José L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Edgar Sánchez-Sinencio:
Switched-capacitor circuits with periodical nonuniform individual sampling. IEEE Trans. Circuits Syst. II Express Briefs 50(8): 404-414 (2003) - [j18]Ahmed A. Emira, Edgar Sánchez-Sinencio:
A pseudo differential complex filter for Bluetooth with frequency tuning. IEEE Trans. Circuits Syst. II Express Briefs 50(10): 742-754 (2003) - [j17]A. N. Mohieldin, Edgar Sánchez-Sinencio, José Silva-Martínez:
Nonlinear effects in pseudo differential OTAs with CMFB. IEEE Trans. Circuits Syst. II Express Briefs 50(10): 762-770 (2003) - [c44]Ahmed Emira, Edgar Sánchez-Sinencio:
Variable gain amplifier with offset cancellation. ACM Great Lakes Symposium on VLSI 2003: 265-268 - [c43]Ahmed Emira, Edgar Sánchez-Sinencio:
A low-power CMOS complex filter for Bluetooth with frequency tuning. ISCAS (1) 2003: 489-492 - [c42]Antonio F. Mondragón-Torres, Terry Mayhugh Jr., José Pineda de Gyvez, José Silva-Martínez, Edgar Sánchez-Sinencio:
An Analog Integrated Circuit Design Laboratory. MSE 2003: 91-92 - 2002
- [j16]Anand Veeravalli, Edgar Sánchez-Sinencio, José Silva-Martínez:
Transconductance amplifier structures with very small transconductances: a comparative design approach. IEEE J. Solid State Circuits 37(6): 770-775 (2002) - [j15]Anand Veeravalli, Edgar Sánchez-Sinencio, José Silva-Martínez:
A CMOS transconductance amplifier architecture with wide tuning range for very low frequency applications. IEEE J. Solid State Circuits 37(6): 776-781 (2002) - [j14]Ahmed Nader Mohieldin, Ahmed A. Emira, Edgar Sánchez-Sinencio:
A 100-MHz 8-mW ROM-less quadrature direct digital frequency synthesizer. IEEE J. Solid State Circuits 37(10): 1235-1243 (2002) - [c41]Wenjun Sheng, Bo Xia, Ahmed Emira, Chunyu Xin, Sung Tae Moon, Ari Yakov Valero-López, Edgar Sánchez-Sinencio:
A monolithic CMOS low-IF Bluetooth receiver. CICC 2002: 247-250 - [c40]Fikret Duelgel, Edgar Sánchez-Sinencio, Jose Silva-Martinez:
A 2.1GHz 1.3V 5mW programmable Q-enhancement LC bandpass biquad in 0.35μm CMOS. CICC 2002: 283-286 - [c39]Ahmed Emira, Edgar Sánchez-Sinencio, M. Schneider:
Design tradeoffs of CMOS current mirrors using one-equation for all-region model. ISCAS (5) 2002: 45-48 - [c38]Marcia G. Méndez-Rivera, José Silva-Martínez, Edgar Sánchez-Sinencio:
On-chip spectrum analyzer for built-in testing analog ICs. ISCAS (5) 2002: 61-64 - [c37]Keliu Shu, Edgar Sánchez-Sinencio:
A 5-GHz prescaler using improved phase switching. ISCAS (3) 2002: 85-88 - [c36]Praveen Kallam, Edgar Sánchez-Sinencio, Aydin I. Karsilayan:
An improved Q-tuning scheme and a fully symmetric OTA. ISCAS (5) 2002: 165-168 - [c35]Fikret Dülger, Edgar Sánchez-Sinencio:
Design trade-offs of a symmetric linearized CMOS LC VCO. ISCAS (4) 2002: 397-400 - [c34]Chunyu Xin, Bo Xia, Wenjun Sheng, Ari Yakov Valero-López, Edgar Sánchez-Sinencio:
A mixed-mode IF GFSK demodulator for Bluetooth. ISCAS (3) 2002: 457-460 - [c33]Bo Xia, Shouli Yan, Edgar Sánchez-Sinencio:
An auto-tuning structure for continuous time sigma-delta AD converter and high precision filters. ISCAS (5) 2002: 593-596 - [c32]José L. Ausín, Raquel Pérez-Aloe, J. Francisco Duque-Carrillo, Guido Torelli, Edgar Sánchez-Sinencio:
High-selectivity SC filters with continuous digital Q-factor programmability. ISCAS (4) 2002: 631-634 - [c31]A. N. Mohieldin, Ahmed Emira, Edgar Sánchez-Sinencio:
A 2-V 11-bit incremental A/D converter using floating gate technique. ISCAS (4) 2002: 667-670 - [c30]Keliu Shu, Edgar Sánchez-Sinencio, José Silva-Martínez:
A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling. ISCAS (4) 2002: 791-794 - 2001
- [c29]Lei Wang, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
1.5 V 5.0 MHz switched capacitor circuits in 1.2 μm CMOS without voltage bootstrapper. CICC 2001: 17-20 - [c28]Keliu Shu, Edgar Sánchez-Sinencio, Franco Maloberti, Udaykiran Eduri:
A comparative study of digital ΣΔ modulators for fractional-N synthesis. ICECS 2001: 1391-1394 - [c27]Federico Lobato-Lopez, José Silva-Martínez, Edgar Sánchez-Sinencio:
Linear cellular neural networks. ISCAS (3) 2001: 437-440 - [c26]Asit Shankar, José Silva-Martínez, Edgar Sánchez-Sinencio:
A low voltage operational transconductance amplifier using common mode feedforward for high frequency switched capacitor circuits. ISCAS (1) 2001: 643-646 - 2000
- [c25]Anand Veeravalli, Edgar Sánchez-Sinencio, José Silva-Martínez:
Different operational transconductance amplifier topologies for obtaining very small transconductances. ISCAS 2000: 189-192 - [c24]José L. Ausín, Juan F. Duque-Carillo, Guido Torelli, Edgar Sánchez-Sinencio, Franco Maloberti:
Periodical nonuniform individually sampled switched-capacitor circuits. ISCAS 2000: 449-452 - [c23]Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo, Antonio Lopez, Edgar Sánchez-Sinencio:
A fully parallel CMOS analog median filter. ISCAS 2000: 593-596 - [c22]Shouli Yan, Edgar Sánchez-Sinencio:
A programmable rail-to-rail constant-gm input structure for LV amplifier. ISCAS 2000: 645-648
1990 – 1999
- 1999
- [c21]Octavio A. González, Gunhee Han, José Pineda de Gyvez, Edgar Sánchez-Sinencio:
CMOS cryptosystem using a Lorenz chaotic oscillator. ISCAS (5) 1999: 442-445 - [c20]G. Xu, Sherif H. K. Embabi, P. Hao, Edgar Sánchez-Sinencio:
A low voltage fully differential nested Gm capacitance compensation amplifier: analysis and design. ISCAS (2) 1999: 606-609 - [c19]Benoit Provost, Edgar Sánchez-Sinencio:
Auto-calibrating analog timer for on-chip testing. ITC 1999: 541-548 - 1998
- [j13]Fan You, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
Low-voltage class AB buffers with quiescent current control. IEEE J. Solid State Circuits 33(6): 915-920 (1998) - [j12]Jan-Michael Stevenson, Edgar Sánchez-Sinencio:
An accurate quality factor tuning scheme for IF and high-Q continuous-time filters. IEEE J. Solid State Circuits 33(12): 1970-1978 (1998) - [j11]Lei Wang, José Pineda de Gyvez, Edgar Sánchez-Sinencio:
Time multiplexed color image processing based on a CNN with cell-state outputs. IEEE Trans. Very Large Scale Integr. Syst. 6(2): 314-322 (1998) - [c18]X. Quan, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
A current-mode based field programmable analog array architecture for signal processing applications. CICC 1998: 277-280 - [c17]Zeki Sezgin Günay, Eric G. Soenen, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
A 1.8 V pseudo-differential switched-capacitor amplifier. CICC 1998: 373-376 - [c16]Benoit Provost, Edgar Sánchez-Sinencio, Anna Maria Brosa:
A Unified Approach for a Time-Domain Built-In Self-Test Technique and Fault Detection. Great Lakes Symposium on VLSI 1998: 230-236 - [c15]Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo, Antonio Lopez, Edgar Sánchez-Sinencio:
A parallel analog median filter. ICECS 1998: 381-384 - [c14]Marcia G. Méndez-Rivera, Ari Yakov Valero-López, José Silva-Martínez, Edgar Sánchez-Sinencio:
Efficient clock recovery architecture. ICECS 1998: 537-540 - 1997
- [j10]Raquel Pérez-Aloe, J. Francisco Duque-Carrillo, Edgar Sánchez-Sinencio, José M. Valverde, Guido Torelli, Alexander H. Reyes, Franco Maloberti:
Programmable time-multiplexed switched-capacitor variable equalizer for arbitrary frequency response realizations. IEEE J. Solid State Circuits 32(2): 274-278 (1997) - [j9]Fan You, Sherif H. K. Embabi, J. Francisco Duque-Carrillo, Edgar Sánchez-Sinencio:
Am improved tail current source for low voltage applications. IEEE J. Solid State Circuits 32(8): 1173-1180 (1997) - [j8]Fan You, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
Multistage amplifier topologies with nested Gm-C compensation. IEEE J. Solid State Circuits 32(11): 2000-2011 (1997) - [j7]Joongho Chang, Gunhee Han, José M. Valverde, Norman C. Griswold, J. Francisco Duque-Carrillo, Edgar Sánchez-Sinencio:
Cork quality classification system using a unified image processing and fuzzy-neural network methodology. IEEE Trans. Neural Networks 8(4): 964-974 (1997) - 1996
- [j6]J. Francisco Duque-Carrillo, Piero Malcovati, Franco Maloberti, Raquel Pérez-Aloe, Alexander H. Reyes, Edgar Sánchez-Sinencio, Guido Torelli, José M. Valverde:
VERDI: an acoustically programmable and adjustable CMOS mixed-mode signal processor for hearing aid applications. IEEE J. Solid State Circuits 31(5): 634-645 (1996) - [c13]Adrién Martínez-González, Laura Ortiz-Balbuena, Héctor M. Pérez Meana, Edgar Sánchez-Sinencio, Juan Carlos Sánchez-García:
A new method for wavelets generation. EUSIPCO 1996: 1-4 - [c12]Fan You, Sherif H. K. Embabi, Edgar Sánchez-Sinencio:
A 1.5V class AB output buffer. ISLPED 1996: 285-288 - 1995
- [c11]Gabriel J. Gómez, Sherif H. K. Embabi, Edgar Sánchez-Sinencio, Martin C. Lefebvre:
A Nonlinear Macromodel for CMOS OTAs. ISCAS 1995: 920-923 - [c10]Apollo Q. Fong, Ajay Kanji, Edgar Sánchez-Sinencio, José Pineda de Gyvez:
A Universal Interface Between PC and Neural Networks Hardware. ISCAS 1995: 1169-1172 - [c9]Gunhee Han, Edgar Sánchez-Sinencio:
A General Purpose Discrete-Time Multiplexing Neuron-Array Architecture. ISCAS 1995: 1320-1323 - [c8]Fan You, Sherif H. K. Embabi, Edgar Sánchez-Sinencio, A. Ganesan:
A Design Scheme to Stabilize the Active Gain Enhancement Amplifier. ISCAS 1995: 1976-1979 - 1994
- [j5]Servando Espejo, Ángel Rodríguez-Vázquez, Rafael Domínguez-Castro, John L. Huertas, Edgar Sánchez-Sinencio:
Smart-pixel cellular neural networks in analog current-mode CMOS technology. IEEE J. Solid State Circuits 29(8): 895-905 (1994) - [c7]Joseph T. Nabicht, Edgar Sánchez-Sinencio, Jaime Ramírez-Angulo:
A Programmable 1.8-18MHz High-Q Fully-Differential Continuous-Time Filter with 1.5-2 Power Supply. ISCAS 1994: 653-656 - [c6]Jaime Ramírez-Angulo, Edgar Sánchez-Sinencio:
Two Approaches for Current-Mode Filters using Voltage Follower and Transconductance Multipliers Building Blocks. ISCAS 1994: 669-672 - [c5]Shyam S. Somayajula, Edgar Sánchez-Sinencio, José Pineda de Gyvez:
A power supply ramping and current measurement based technique for analog fault diagnosis. VTS 1994: 234-239 - 1993
- [j4]Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José L. Huertas:
A CMOS analog adaptive BAM with on-chip learning and weight refreshing. IEEE Trans. Neural Networks 4(3): 445-455 (1993) - [j3]Yuping He, Ugur Çilingiroglu, Edgar Sánchez-Sinencio:
A high-density and low-power charge-based Hamming network. IEEE Trans. Very Large Scale Integr. Syst. 1(1): 56-62 (1993) - [c4]Jaime Ramírez-Angulo, Roberto Sadkowski, Edgar Sánchez-Sinencio:
Linearity, Accuracy and Bandwidth Considerations in Wideband CMOS Voltage Amplifiers. ISCAS 1993: 1251-1254 - [c3]Jaime Ramírez-Angulo, Edgar Sánchez-Sinencio:
High Frequency Compensated Current-mode Ladder Filters Using Multiple Output OTAs. ISCAS 1993: 1412-1415 - [c2]Sterling L. Smith, Edgar Sánchez-Sinencio:
3v High-frequency Current-mode Filters. ISCAS 1993: 1459-1462 - 1992
- [j2]Moises E. Robinson, Hideki Yoneda, Edgar Sánchez-Sinencio:
A modular CMOS design of a Hamming network. IEEE Trans. Neural Networks 3(3): 444-456 (1992) - 1991
- [c1]Bernabé Linares-Barranco, Edgar Sánchez-Sinencio, Ángel Rodríguez-Vázquez, José Luis Huertas:
CMOS Continuous BAM With On Chip Learning. IWANN 1991: 322-327
1980 – 1989
- 1985
- [j1]Edgar Sánchez-Sinencio, Jaime Ramírez-Angulo:
AROMA: An Area Optimized CAD Program for Cascade SC Filter Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(3): 296-303 (1985)
1970 – 1979
- 1973
- [b1]Edgar Sánchez-Sinencio:
Computer-Aided Design of Microwave Circuits. University of Illinois Urbana-Champaign, USA, 1973
Coauthor Index
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