41. DAC 2004: San Diego, CA, USA


Hot Leakage

Clock Routing and Buffering

Tools and Strategies for Dynamic Verification

Timing-Driven System Synthesis

Reliable System-on-a-chip Design in the Nanometer Era


Power Modeling and Optimization for Embedded Systems

Performance Evaluation and Run Time Support

Advances in Analog Circuit and Layout Synthesis

Power Grid Design and Analysis Techniques


Methods for A Priori Feasible Layout Generation

Abstraction Techniques for Functional Verification

Memory and Network Optimization in Embedded Designs

Business Day Session

The Future of Timing Closure


Design Space Exploration and Scheduling for Embedded Software

Advances in Accelerated Simulation

Design for Manufacturing

Statistical Timing Analysis


New Ideas in Placement

Model Order Reduction and Variational Techniques for Parasitic Analysis

Compilation Techniques for Embedded Applications

Platform-based System Design

Innovations in Logic Synthesis

Yield Estimation and Optimization

High-level Techniques for Signal Processing

Advanced Test Solutions


Advances in Boolean Analysis Techniques


Power Optimization for Real-Time and Media-Rich Embedded Systems

Latency Tolerance and Asynchronous Design

New Technologies in System Design