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2010 – 2019
- 2012
[j8]Yuwen Sun, Allen C. Cheng:
Machine learning on-a-chip: A high-performance low-power reusable neuron architecture for artificial neural networks in ECG classifications. Comput. Biol. Medicine 42(7): 751-757 (2012)- 2011
- [j7]Zhanpeng Jin, Allen C. Cheng:
SubsetTrio: An evolutionary, geometric, and statistical benchmark subsetting framework. ACM Trans. Model. Comput. Simul. 21(3): 21:1-21:23 (2011) - [c9]Zhanpeng Jin, Allen C. Cheng:
A self-healing autonomous neural network hardware for trustworthy biomedical systems. FPT 2011: 1-8 - 2010
- [j6]Yuwen Sun, Shimeng Huang, Joseph Oresko, Allen C. Cheng:
Programmable Neural Processing on a Smartdust for Brain-Computer Interfaces. IEEE Trans. Biomed. Circuits Syst. 4(5): 265-273 (2010) - [j5]Joseph Oresko, Zhanpeng Jin, Jun Cheng, Shimeng Huang, Yuwen Sun, Heather Duschl, Allen C. Cheng:
A wearable smartphone-based platform for real-time cardiovascular disease detection via electrocardiogram processing. IEEE Trans. Inf. Technol. Biomed. 14(3): 734-740 (2010)
2000 – 2009
- 2009
- [c8]Shimeng Huang, Joseph Oresko, Yuwen Sun, Allen C. Cheng:
Programmable neural processing on a smartdust. DAC 2009: 619-620 - [c7]Yuwen Sun, Shimeng Huang, Joseph Oresko, John Krais
, Allen C. Cheng:
A programmable implementation of neural signal processing on a smartdust for brain-computer interfaces. ISLPED 2009: 351-354 - 2008
- [j4]Zhanpeng Jin, Allen C. Cheng:
ImplantBench: Characterizing and Projecting Representative Benchmarks for Emerging Bioimplantable Computing. IEEE Micro 28(4): 71-91 (2008) - [j3]Zhanpeng Jin, Allen C. Cheng:
Evolutionary Benchmark Subsetting. IEEE Micro 28(6): 20-36 (2008) - [c6]Zhanpeng Jin, Allen C. Cheng:
Improve simulation efficiency using statistical benchmark subsetting: an ImplantBench case study. DAC 2008: 970-973 - [c5]Allen C. Cheng:
A Software-to-Hardware Self-Mapping Technique to Enhance Program Throughput for Portable Multimedia Workloads. DELTA 2008: 356-361 - [c4]Allen C. Cheng:
Amplifying Embedded System Efficiency via Automatic Instruction Fusion on a Post-Manufacturing Reconfigurable Architecture Platform. ISQED 2008: 744-749 - 2007
- [c3]Allen C. Cheng:
Accelerating Embedded Multimedia Applications with Versatile and Reconfigurable Instruction Fusion. ISM 2007: 318-325 - 2006
- [b1]Allen C. Cheng:
Application-specific architecture framework for high-performance low -power embedded computing. University of Michigan, USA, 2006 - [j2]Allen C. Cheng, Gary S. Tyson:
High-quality ISA synthesis for low-power cache designs in embedded microprocessors. IBM J. Res. Dev. 50(2-3): 299-310 (2006) - 2005
- [j1]Allen C. Cheng, Gary S. Tyson:
An Energy Efficient Instruction Set Synthesis Framework for Low Power Embedded System Designs. IEEE Trans. Computers 54(6): 698-713 (2005) - [c2]Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge:
PowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis. ISPASS 2005: 32-41 - 2004
- [c1]Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge:
FITS: framework-based instruction-set tuning synthesis for embedded application specific processors. DAC 2004: 920-923
Coauthor Index
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