ITC 2002:
Baltimore, MD, USAHomegrown versus Commercial Solutions for Low-Cost Text
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Bozena Kaminska :
Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines.
23
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Bill Bottoms :
Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines.
24
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Greg Spirakis :
Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines.
25
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Dale E. Hoffman :
Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines.
26
Testing the Tester
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John C. Johnson :
Testing the Tester: Specification and Validation Approaches.
29
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Plenary
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Alex d'Arbeloff :
Managing in the ATE Business - Postcards from the Past, Lessons for the Future.
12
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Memory Testing
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Advances in Soc Testing
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Defect-Oriented Test
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High-Performance Timing Measurements
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Hideo Okawara :
Frequency/Phase Movement Analy i by Orthogonal Demodulation.
110-119
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Test Data Reduction
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Memory DFT, Bist and Repair
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conf/itc/HirabayashiSYKTKTO02 export record as
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conf/itc/TomishimaTNMHTG02 export record as
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Design Validation - Novel ATPG Applications
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conf/itc/ParthasarathyIFWCA02 export record as
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Novel Techniques for Diagnostics
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Connecting Disconnects
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Guy Peterson :
Verification of Device Interface Hardware Interconnections Prior to the Start of Testing.
297-300
Test Data Compression
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conf/itc/RajkiTKMTTHTMEQ02 Janusz Rajski ,
Jerzy Tyszer ,
Mark Kassab ,
Nilanjan Mukherjee ,
Rob Thompson ,
Kun-Han Tsai ,
Andre Hertwig ,
Nagesh Tamarapalli ,
Grzegorz Mrugalski ,
Geir Eide ,
Jun Qian :
Embedded Deterministic Test for Low-Cost Manufacturing Test.
301-310
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Lecture Series - Embedded IP for Soc Infrastructure
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Yervant Zorian :
Embedded Memory Test and Repair: Infrastructure IP for SOC Yield.
340-349
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Chip-Level Crosstalk Identification and Testing
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Advances in Fault Simulation and Test Generation
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Adventures in Interfacing
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Wolfram Humann :
Compensation of Transmission Line Loss for Gbit/s Test on ATEs.
430-437
DFT Testers
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Production Test Automation
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Soft and Hard Failure Analysis and On-Line Testing
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Yi Zhao ,
Li Chen ,
Sujit Dey :
On-Line Testing of Multi-Source Noise-Induced Errors on the Interconnects and Buses of System-on-Chips.
491-499
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conf/itc/ChakravartyJRSZ02
Soc Benchmarks
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Appliaction Series - High-Speed Test Interfaces
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Todd Sargent :
Physical Principles of Interface Design.
549-554
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Thomas P. Warwick :
What a Device Interface Board Really Costs: An Evaluation of Technical Considerations for Testing Products Operating in the Gigabit Region.
555-564
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David E. McFeely :
The Process and Challenges of a High-Speed DUT Board Project.
565-573
Test and Debug of Microprocessors
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conf/itc/BaileyMSTWFAWR02 export record as
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Timothe Litt :
Support for Debugging in the Alpha 21364 Microprocessor.
584-589
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FPGA Testing
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Lecture Series-Silicon Debug
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conf/itc/BalachandranBS02 export record as
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Data Analysis and Yield Model Validation
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Jitter Testing in Multi-Gigahertz Digital Systems
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Efficient Approaches to Soc Testing
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1149.1 Verification and Validation
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Dave Stang ,
Ramaswami Dandapani :
An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements.
746-754
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Adam Kristof :
Improved Digital I/O Ports Enhance Testability of Interconnections.
763-772
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Scan Stitching
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DFT for Manufacturing Problems
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Seongmoon Wang :
Generation of Low Power Dissipation and High Fault Coverage Patterns for Scan-Based BIST.
834-843
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Mixed-Signal Test Techniques
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Go-Fast ATE!
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Ahmed Rashid Syed :
R4X/D4X - Formatters for Flexible Test System Architecture.
885-893
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Masashi Shimanouchi :
New Paradigm for Signal Paths in ATE Pin Electronics are Needed for Serialcom Device Testing.
903-912
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System Test Design, Bist and System Verification
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Advances in IDDX
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Delay-Test
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Embedded Test for Analog and Digital
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Maximizing Test Effectiveness and Minimizing Cost
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Peter C. Maxwell :
Wafer/Package Test Mix for Optimal Defect Detection.
1050-1055
Board Test and Bist for Mems
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Debug and Diagnosis
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Delay-Test:
Practical Experience and Solutions
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RF Testing
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Kevin M. MacKay :
Testing Wireless Local Area Network Transceiver ICs at 5 GHz.
1146-1150
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Test Resource
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Can System Test and IC Test Learn from Each Other?
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Taps All Over My Chips
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Lee Whetsel :
Inevitable Use of TAP Domains in SOCs.
1191
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Can Scan Achieve The Quality Level We Are Looking For?
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Carol Pyron :
Scan and BIST Can Almost Achieve Test Quality Levels.
1196
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Grady Giles :
Is Scan (Alone) Sufficient to Test Today?s Microprocessors? Not Quite, but We Can?t Get the Job Done Without It.
1197
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Phil Nigh :
Scan-Based Testing: The Only Practical Solution for Testing ASIC/Consumer Products.
1198
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Mixed-Signal Bist:
Fact or Fiction?
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Mission Possible?:
An Open Ate Tester Architecture
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Paul D. Roddy :
Is an Open Architecture Tester Really Achievable?
1209
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Mark Jagiela :
An Open Architecture for Semiconductor Test: Enablers and Challenges.
1211
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The Impacts of Outsourcing on Test
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Bill Price :
The Role of Test in a Highly Outsourced Business Model.
1214
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Test and Repair of Commodity and Embedded Flash Memories
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Paul Okino :
Test Time Impact of Redundancy Repair in Embedded Flash Memory.
1220
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Riichiro Shirota :
Test and Repair of Non-Volatile Commodity and Embedded Memories (NAND Flash Memory).
1221
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Roger Barth :
Selective Optimization of Test for Embedded Flash Memory.
1222
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Shigeo Tsuchida :
Test and Repair of Nonvolatile Commodity and Embedded Memories.
1223-1224
Testing Highly Integrated Circuits and Systems Using A Low-Cost Tester:
How to Overcome The Challenge?
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Mustapha Slamani :
Testing Highly Integrated Wireless Circuits and Systems with Low Cost Tester: How to Overcome the Challenge?
1225
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Alan Kafton :
Wireless SOC Testing: Can RF Testing Costs Be Reduced?
1226-1227
Multi-GHZ Era:
Test Challenges and Solutions
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David C. Keezer :
Challenges and Solutions for Multi-Gigahertz Testing.
1230
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Manoj Sachdev :
Multi-Gigahertz Digital Test Challenges and Techniques.
1231
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Mike Tripp :
On-Die DFT Based Solutions are Sufficient for Testing Multi-GHz Interfaces in Manufacturing (and Are Also Key to Enabling Lower Cost ATE Platforms).
1232
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Board Test and ITC:
What Does the Future Hold?
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Bill Eklow :
Is Board Test Worth Talking About?
1235
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conf/itc/Lobetti-Bodoni02
2001 ITC Best Paper
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