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James R. Armstrong
Person information
- affiliation: Virginia Tech, Blacksburg, VA, USA
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2000 – 2009
- 2004
- [c16]Brian A. Jackson, James R. Armstrong:
Synthesis of SystemC models from SDF Ptolemy descriptions. SoCC 2004: 133-134 - 2002
- [c15]Rajneesh Mahajan, Ramesh Govindarajulu, James R. Armstrong, F. Gail Gray:
A Multi-Language Goal-Tree Based Functional Test Planning System. ITC 2002: 472-481
1990 – 1999
- 1999
- [j11]James R. Armstrong, F. Gail Gray, Meng-Wei Lin:
VHDL modeling and model testing for DSP applications. IEEE Trans. Ind. Electron. 46(1): 13-22 (1999) - 1998
- [c14]Morris Lin, James R. Armstrong, F. Gail Gray:
A goal tree based high-level test planning system for DSP real number models. ITC 1998: 1000-1009 - 1996
- [j10]James R. Armstrong, Geoff Frank, F. Gail Gray:
Efficient approaches to testing VHDL DSP models. J. VLSI Signal Process. 14(2): 221-234 (1996) - 1995
- [c13]James R. Armstrong:
Efficient approaches to testing VHDL DSP models. ICASSP 1995: 2865-2867 - 1994
- [c12]Chang Hyun Cho, James R. Armstrong:
B-algorithm: A Behavioral-Test Generation Algorithm. ITC 1994: 968-979 - 1993
- [c11]Balraj Singh, John R. Wicks, Philip Wright, James R. Armstrong:
The Modeler's Assistant: A CAD Tool for Behavioral Model Development. CHDL 1993: 361-368 - [c10]James R. Armstrong:
Hierarchical test generation: Where we are, and where we should be going. EURO-DAC 1993: 434-439 - 1992
- [c9]Ashish S. Gadagkar, James R. Armstrong:
Timing distribution in VHDL behavioral models. ICCAD 1992: 82-89 - 1990
- [j9]James R. Armstrong:
Tuning VHDL for Multivalve Logic Modeling. IEEE Des. Test Comput. 7(3): 8-10 (1990) - [c8]P. C. Ward, James R. Armstrong:
Behavioral Fault Simulation in VHDL. DAC 1990: 587-593 - [c7]James R. Armstrong, D. Burnette:
Automated assists to the behavioral modeling process. RSP 1990: 187-195
1980 – 1989
- 1989
- [j8]S.-C. Chu, James R. Armstrong:
t-TDA-Diagnosable Systems. IEEE Trans. Computers 38(6): 914-920 (1989) - 1986
- [c6]Daniel S. Barclay, James R. Armstrong:
A heuristic chip-level test generation algorithm. DAC 1986: 257-262 - 1985
- [c5]Anil K. Gupta, James R. Armstrong:
Functional fault modeling and simulation for VLSI devices. DAC 1985: 720-726 - 1984
- [j7]James R. Armstrong:
Chip Level Modeling of LSI Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(4): 288-297 (1984) - 1981
- [j6]James R. Armstrong, F. Gail Gray:
Fault Diagnosos in a Boolean n Cube Array of Microprocessors. IEEE Trans. Computers 30(8): 587-590 (1981) - [j5]Adit D. Singh, F. Gail Gray, James R. Armstrong:
Tree Structured Sequential Multiple-Valued Logic Design from Universal Modules. IEEE Trans. Computers 30(9): 671-674 (1981) - [j4]Gardner Pomper, James R. Armstrong:
Representation of Multivalued Functions Using the Direct Cover Method. IEEE Trans. Computers 30(9): 674-679 (1981) - [c4]James R. Armstrong, D. E. Devlin:
GSP: A logic simulator for LSI. DAC 1981: 518-524 - 1980
- [j3]James R. Armstrong, Garry W. Woodruff:
Special Feature Chip-Level Simulation of Microprocessors. Computer 13(1): 94-100 (1980) - [j2]James R. Armstrong:
The Complexity of Computational Circuits Versus Radix. IEEE Trans. Computers 29(10): 937-941 (1980)
1970 – 1979
- 1978
- [c3]James R. Armstrong:
The modular complexity of a tree structured higher radix multiplier. MVL 1978: 101-103 - [c2]Adit D. Singh, James R. Armstrong:
A simultaneous, radix four, I2L multiplier mechanized via repeated addition. MVL 1978: 114-121 - 1977
- [c1]James R. Armstrong, Garry W. Woodruff:
Simulation techniques for microprocessors. DAC 1977: 225-229 - 1973
- [j1]James R. Armstrong:
Design of a Graphic Generator for Remote Terminal Application. IEEE Trans. Computers 22(5): 464-468 (1973)
Coauthor Index
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