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ORCIDISCAS 2007: New Orleans, Louisiana, USA
- International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. IEEE 2007, ISBN 1-4244-0920-9
- Ramon Tortosa Navas, Antonio Aceituno, José M. de la Rosa, Ángel Rodríguez-Vázquez, Francisco V. Fernández
:
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator. 1-4 - Minho Kwon, Gunhee Han:
An I/Q Channel Time-Interleaved Band-Pass Sigma-Delta Modulator for a Low-IF Receiver. 5-8 - Jens Anders, Wolfgang Mathis:
On the modeling and the stability of continuous-time Sigma-Delta-Modulators. 9-12 - Christopher S. Taillefer, Gordon W. Roberts:
Delta-Sigma Analog-to-Digital Conversion via Time-Mode Signal Processing. 13-16 - Xavier Redondo, Jofre Pallares, Francisco Serra-Graells:
A 1.2V 130µA 10-bit MOS-Only Log-Domain Sigma Delta Modulator. 17-20 - Ediz Çetin, Izzet Kale, Richard C. S. Morling:
Living and Dealing with RF Impairments in Communication Transceivers. 21-24 - Lauri Anttila, Mikko Valkama, Markku Renfors:
3.9G Radio Reception with SC-FDMA Waveforms Under I/Q Imbalance. 25-28 - Piotr Rykaczewski, Friedrich K. Jondral:
Blind I/Q Imbalance Compensation in Multipath Environments. 29-32 - Marcus Windisch, Gerhard P. Fettweis:
On the Impact of I/Q Imbalance in Multi-Carrier Systems for Different Channel Scenarios. 33-36 - Qiyue Zou, Alireza Tarighat, Ali H. Sayed:
On the Joint Compensation of IQ Imbalances and Phase Noise in MIMO-OFDM Systems. 37-40 - Mei Guo, Yan Lu, Feng Wu, Shipeng Li, Wen Gao:
Distributed Video Coding with Spatial Correlation Exploited Only at the Decoder. 41-44 - Zhihai He:
Peak Transform for Efficient Image Representation and Coding. 45-48 - Long Xu, Wen Gao, Xiangyang Ji, Debin Zhao:
Rate Control for Hierarchical B-picture Coding with Scaling-factors. 49-52 - Yong Fang, Lu Yu:
Block-Interleaved Error-Resilient Entropy Coding. 53-56 - Shilin Xu, Li Yu, Guangxi Zhu:
A Perceptual Coding Method based on the Luma Sensitivity Model. 57-60 - Hanoch Lev-Ari, Alex M. Stankovic:
Fundamental Performance Limits in Lossy Polyphase Systems: Apparent Power and Optimal Compensation. 61-64 - Ali Pinar, Adam Reichert, Bernard C. Lesieutre:
Computing Criticality of Lines in Power Systems. 65-68 - Bei Gou, Hui Zheng, Weibiao Wu, Xingbin Yu:
Probability Distribution of Blackouts in Complex Power Networks. 69-72 - Aaron St. Leger, Juan C. Jiménez, Agung Fu, Sanal Djimbinov, Sa Em Soeurn, Sun Sit Lwin, Chika O. Nwankpa:
Analog Emulation of a Reconfigurable Tap Changing Transformer. 73-76 - Hiroyuki Mori, Hidenobu Tani:
Application of Two-Layered Tabu Search to Optimal Allocation of D-FACTS for Uncertain Wind Power Generation. 77-80 - Clyde Clarke, Carl White, Ralph Etienne-Cummings:
Design and Optimization of a Capacitive Micromachined Ultrasonic Transducer Micro-Array for Near Field Sensing. 81-84 - Ebrahim Ghafar-Zadeh, Mohamad Sawan:
A CMOS-Based Capacitive Sensor for Laboratory-On-Chips: Design and Experimental Results. 85-88 - Nizar Lajnef, Shantanu Chakrabartty, Niell Elvin, Alex Elvin:
Piezo-powered floating gate injector for self-powered fatigue monitoring in biomechanical implants. 89-92 - Nader Safavian, G. Reza Chaji, Shahin Jafarabadi-Ashtiani, Arokia Nathan, John A. Rowlands:
A novel current scaling active pixel sensor with correlated double sampling readout circuit for real time medical x-ray imaging. 93-96 - Andrea Anzalone, Federico Bizzarri, Paolo Camera, Luca Petrillo, Marco Storace:
DSP implementation of a low-complexity algorithm for real-time automated vessel detection in images of the fundus of the human retina. 97-100 - Raghuram Ranganathan, Wasfy B. Mikhael:
A Novel Interference Supression Technique employing Complex Adaptive ICA for Time-Varying Channels in Diversity Wireless QAM Receivers. 101-104 - Da-Zheng Feng, Wei Xing Zheng:
Adaptive IIR Filtering via a Recursive Total Instrumental Variable Algorithm. 105-108 - Munkyo Seo, Mark J. W. Rodwell:
Generalized Blind Mismatch Correction for a Two-Channel Time-Interleaved ADC: Analytic Approach. 109-112 - Jeffrey A. Foutz, Andreas S. Spanias:
An Adaptive Low Rank Algorithm for Semispherical Antenna Arrays. 113-116 - Paulo Alexandre Crisóstomo Lopes, José António Beltran Gerald:
New Normalized LMS Algorithms Based on the Kalman Filter. 117-120 - Praveen Raghavan, José L. Ayala, David Atienza, Francky Catthoor, Giovanni De Micheli, Marisa López-Vallejo:
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors. 121-124 - Héctor Pettenghi, Maria J. Avedillo, José M. Quintana:
Non Return Mobile Logic Family. 125-128 - Takao Waho, Akinori Yamada, Hiroki Okuyama, Victor Khorenko, Thai Do, Werner Prost:
A Four-Resonant-Tunneling-Diode (4RTD) NAND/NOR Logic Gate. 129-132 - Jacques-Olivier Klein, Eric Belhaire, Claude Chappert, Florent Ouchet, Russell Cowburn, Dan Read, Dorothee Petit:
Synthesis of Finite State Machines with Magnetic Domain Wall Logic. 133-136 - Jennifer Blain Christen, Andreas G. Andreou:
A Self-Biased Operational Transconductance Amplifier in 0.18 micron 3D SOI-CMOS. 137-140 - Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew:
Soft Error Mitigation in Switch Modules of SRAM-based FPGAs. 141-144 - Jing Li, Hiroshi Miyashita:
Efficient Thermal Via Planning for Placement of 3D Integrated Circuits. 145-148 - Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki:
Design for Secure Test - A Case Study on Pipelined Advanced Encryption Standard. 149-152 - Xueqing Wang, William R. Eisenstadt, Robert M. Fox:
Embedded Jitter Measurement of High-speed I/O Signals. 153-156 - Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskarani:
GALS Based Shared Test Architecture for Embedded Memories. 157-160 - Yang Qu, Juha-Pekka Soininen, Jari Nurmi:
A Genetic Algorithm for Scheduling Tasks onto Dynamically Reconfigurable Hardware. 161-164 - Fredrik Kristensen, W. James MacLean:
Real-Time Extraction of Maximally Stable Extremal Regions on an FPGA. 165-168 - Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler:
Programmable Floating Gate FPAA Switches Are Not Dead Weight. 169-172 - Christopher M. Twigg, Paul E. Hasler:
Programmable Conductance Switches for FPAAs. 173-176 - Paul E. Hasler, Christopher M. Twigg:
An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. 177-180 - Boo-Young Choi, Jung-Won Han, Sung Min Park, Kang-Yeob Park, Wonseok Oh, J.-C. Choi:
A 1Gb/s Optical Transceiver Array Chipset for Automotive Wired Interconnects. 181-184 - David Rennie, Manoj Sachdev:
A Novel Tri-State Binary Phase Detector. 185-188 - Mike Bichan, Anthony Chan Carusone:
Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links. 189-192 - Hyoungsoo Kim, Franklin Bien, Youngsik Hur, Soumya Chandramouli, Jeongwon Cha, Edward Gebara, Joy Laskar:
A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication. 193-196 - Franklin Bien, Soumya Chandramouli, Hyoungsoo Kim, Edward Gebara, Joy Laskar:
Digitally Controlled 10-Gb/s Adjustable Delay Line for Adaptive Filter Design in standard CMOS Technology. 197-200 - Tetsuro Endo, Jun Yokota:
Generation of White Noise by Using Chaos in Practical Phase-Locked Loop Integrated Circuit Module. 201-204 - Ned J. Corron, Scott T. Hayes, Shawn D. Pethel, Jonathan N. Blakely:
Reverse-Time Chaos from a Randomly Driven Filter. 205-208 - Yoko Uwate, Yoshifumi Nishio:
Switching Phase States of Chaotic Circuits Coupled by Time-Varying Resistor. 209-212 - Sergio Callegari, Gianluca Setti:
ADCs, Chaos and TRNGs: a Generalized View Exploiting Markov Chain Lumpability Properties. 213-216 - Weihua Deng, Jinhu Lu:
Design of Multi-Directional Multi-Scroll Chaotic Attractors Based on Fractional Differential Systems. 217-220 - Chutham Sawigun, Jirayuth Mahattanakul:
A Compact High Current Efficiency Low-Voltage MOS Transconductor with Nearly Constant Input Voltage Range. 221-224 - Jingjing Hu, Johan H. Huijsing, Kofi A. A. Makinwa:
A Three-Stage Amplifier with Quenched Multipath Frequency Compensation for All Capacitive Loads. 225-228 - Tee Hui Teo, Wooi Gan Yeoh:
Low-Power Digitally Controlled CMOS Source Follower Variable Attenuator. 229-232 - Hirokazu Yoshizawa, Gabor C. Temes:
Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity. 233-236 - Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti:
150 µA CMOS Transconductor with 82 dB SFDR. 237-240 - Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators. 241-244 - Chi-Tung Ko, Kong-Pang Pun:
A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT Delta Sigma Modulator. 245-248 - Kyehyung Lee, Gabor C. Temes, Franco Maloberti:
Noise-Coupled Multi-Cell Delta-Sigma ADCs. 249-252 - Ghyslain Gagnon, Leonard MacEachern:
Continuous Compensation of Binary-Weighted DAC Nonlinearities in Bandpass Delta-Sigma Modulators. 253-256 - Nima Maghari, Sunwoo Kwon, Gabor C. Temes, Un-Ku Moon:
Mixed-Order Sturdy MASH Delta-Sigma Modulator. 257-260 - Timo Roman, Visa Koivunen:
Carrier frequency synchronization for mobile television receivers. 261-264 - Xinping Huang, Mario Caron:
Efficient Transmitter Self-Calibration and Amplifier Linearization Techniques. 265-268 - Antonio Cantoni, John Tuthill:
Digital Compensation of Frequency Dependent Imperfections in Direct Conversion I-Q Modulators. 269-272 - Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Gerard Wienk, Zhiyu Ru, Bram Nauta:
Multipath Polyphase Circuits and their Application to RF Transceivers. 273-276 - Kutluyil Dogancay:
Adaptive Pre-Distortion of Nonlinear Systems Using Out-of-Band Energy Minimization. 277-280 - Jie Dong, King Ngi Ngan, Chi-Keung Fong, Wai-kuen Cham:
A Universal Approach to Developing Fast Algorithm for Simplified Order-16 ICT. 281-284 - Jiancong Luo, Yu Sun, Ishfaq Ahmad:
A PD Feed-back Rate Control Algorithm for Multiple Video Object Coding. 285-288 - Jianpeng Dong, Nam Ling:
On Model Parameter Estimation for H.264/AVC Rate Control. 289-292 - Jun Zhang, Xiaoquan Yi, Nam Ling, Weijia Shang:
Chroma Coding Efficiency Improvement with Context Adaptive Lagrange Multiplier (CALM). 293-296 - Jing-Yu Yang, Wenli Xu, Qionghai Dai, Yao Wang:
Image Compression using 2D Dual-tree Discrete Wavelet Transform (DDWT). 297-300 - Philippe Artillan, Bruno Estibals, Alain Salles, Jean Abboud, Pierre Aloisi, Corinne Alonso:
A PEEC approach for circular spiral inductive components modeling. 301-304 - Feng Luo, Dongsheng Ma:
An Integrated Switching Power Converter with a Hybrid Pulse-Train/PWM Control. 305-308 - Vincent Binet, Yvon Savaria, Michel Meunier, Yves Gagnon:
Modeling the Substrate Noise Injected by a DC-DC Converter. 309-312 - Bharath Balaji Kannan, Khai D. T. Ngo:
Digital Inverse Timing Generator with Wide Dynamic Range. 313-316 - Alessandro Cabrini, Laura Gobbi, Guido Torelli:
Design of Maximum-Efficiency Integrated Voltage Doubler. 317-320 - Ming Yin, Maysam Ghovanloo:
A Low-Noise Preamplifier with Adjustable Gain and Bandwidth for Biopotential Recording Applications. 321-324 - Jim A. Simpson, Maysam Ghovanloo:
An Experimental Study of Voltage, Current, and Charge Controlled Stimulation Front-End Circuitry. 325-328 - AbdEl-Monem M. El-Sharkawy, Paul-Peter Sotiriadis, Paul A. Bottomley, Ergin Atalar:
A New RF Radiometer for Absolute Noninvasive Temperature Sensing in Biomedical Applications. 329-332 - Chae-Ryung Kim, Yu-Ri Kang, Young-Jae Min, Soo-Won Kim:
A 2.5-V 4-µW Low-Power Delta-Sigma Modulator for Implantable Cardiac Pacemaker with Periodic Bias Current Reduction Technique. 333-336 - Chiu-Hsien Chan, Jack Wills, Jeff LaCoss, John J. Granacki, John Choma Jr.:
A Novel Variable-Gain Micro-Power Band-Pass Auto-Zeroing CMOS Amplifier. 337-340 - Huimin Chen, Dimitrios Charalampidis:
Fast Basis Selection and Instantaneous Frequency Tracking for Audio Signal Analysis and Synthesis. 341-344 - Talieh Seyed Tabatabaei, Sridhar Krishnan, Aziz Guergachi:
Emotion Recognition Using Novel Speech Signal Features. 345-348 - Shaikh Anowarul Fattah, Wei-Ping Zhu, M. Omair Ahmad:
An Identification Technique for Noisy ARMA Systems in Correlation Domain. 349-352 - Zohra Yermeche, Benny Sallberg, Nedelko Grbic, Ingvar Claesson:
Real-Time DSP Implementation of a Subband Beamforming Algorithm for Dual Microphone Speech Enhancement. 353-356 - Jae Hee Han, Myung Hoon Sunwoo, Jong Ha Moon:
Novel Non-linear Inverse Quantization Algorithm and its Architecture for Digital Audio Codecs. 357-360 - Teijo Lehtonen, Pasi Liljeberg, Juha Plosila:
Fault Tolerance Analysis of NoC Architectures. 361-364 - Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan:
Multiple Upsets Tolerance in SRAM Memory. 365-368 - Themistoklis Prodromakis, Christos Papavassiliou, George Konstantinidis:
A Miniaturized Delay Line based on Slow-Wave Substrates. 369-372 - Wai-Chi Fang, Sharon Kedar:
Gigascale System Design of Sensor Networks for Active Volcanoes. 373-376 - Pier Paolo Civalleri, Marco Gilli, Michele Bonnin:
Open Two-State Quantum Systems Solved by Harmonic Balance. 377-380 - Sumit D. Mediratta, Jeffrey T. Draper:
Characterization of a Fault-tolerant NoC Router. 381-384 - Shyue-Wen Yang, Ming-Hwa Sheu, Chun-Kai Yeh, Chih-Yuen Wen, Chih-Chieh Lin, Wen-Kai Tsai:
Fast Fair Crossbar Scheduler for On-chip Router. 385-388 - César A. M. Marcon, Edson I. Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Evaluation of Algorithms for Low Energy Mapping onto NoCs. 389-392 - Paul-Peter Sotiriadis:
An Information Theory Approach to Power - Optimal Trafic Routing in Networks on Chips. 393-396 - Ik-Jae Chun, Tae Moon Roh, Bo-Gwan Kim:
Binary-Truncated CDMA-Based On-Chip Network. 397-400 - Minoru Watanabe, Fuminori Kobayashi:
Holographic memory reconfigurable VLSI. 401-404 - Christophe Layer, Daniel Schaupp, Hans-Jörg Pfleiderer:
Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA. 405-408 - Shin-Kai Chen, Bing-Shiun Wang, Tay-Jyi Lin, Chih-Wei Liu:
Rapid C to FPGA Prototyping with Multithreaded Emulation Engine. 409-412 - Christian Genz, Rolf Drechsler, Gerhard Angst, Lothar Linhard:
Visualization of SystemC Designs. 413-416 - Sayed Hafizur Rahman, Asif Iqbal Ahmed, Otmane Aït Mohamed:
Analysis and Performance Evaluation of a Digital Carrier Synchronizer for Modem Applications. 417-420 - Andrea Gerosa, M. Soldan, Alessandro Bevilacqua, Andrea Neviani:
A 0.18-µm CMOS Squarer Circuit for a Non-Coherent UWB Receiver. 421-424 - Yu-Tso Lin, Tao Wang, Shey-Shi Lu:
A Fully Integrated Concurrent Dual-Band Low Noise Amplifier with Suspended Inductors in SiGe 0.35µm BiCMOS Technology. 425-428 - Rangakrishnan Srinivasan, Didem Zeliha Turker, Sang Wook Park, Edgar Sánchez-Sinencio:
A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications. 429-432 - Saeed Sarhangian, Seyed Mojtaba Atarodi:
A Low-Power CMOS Low-IF Receiver Front-End for 2450-MHz Band IEEE 802.15.4 ZigBee Standard. 433-436 - Zhujin Zhou, Ning Li, Wei Li, Junyan Ren:
A Power-Optimized CMOS Quadrature VCO with Wide-Tuning Range for UWB Receivers. 437-440 - Heinz Koeppl:
The Composition Rule for Multivariate Volterra Operators and its Application to Circuit Analysis. 441-444 - Kofi M. Odame, Christopher M. Twigg, Arindam Basu, Paul E. Hasler:
Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform. 445-448 - Guoji Zhu, Ajoy Opal:
Per-Element Decompostion in Distortion Analysis. 449-452 - Wai Man Tam, Francis Chung-Ming Lau, C. K. Michael Tse:
Modeling the Telephone Call Network. 453-456 - Andrew Buschmeier, Douglas Frey:
Novel Analysis of Phase Noise in Oscillators. 457-460 - Belén Calvo, Santiago Celma, Maria Teresa Sanz, Juan Pablo Alegre:
Low-Voltage Linearly Tunable CMOS Transconductor with Common-Mode Feedforward. 461-464 - Burak Kelleci, Edgar Sánchez-Sinencio, Aydin I. Karsilayan:
THD+Noise Estimation in Class-D Amplifiers. 465-468 - Gianluca Giustolisi:
Two-Stage OTA Design Based on Settling-Time Constraints. 469-472 - Ramón González Carvajal, Juan Antonio Gómez Galán, Antonio Jesús Torralba Silgado, Clara Isabel Luján-Martínez, Jaime Ramírez-Angulo, Antonio J. López-Martín:
A Very Linear OTA with V-I Conversion based on Quasi-Floating MOS Resistor. 473-476 - Tongyu Song, Shouli Yan:
A Robust Rail-to-Rail Input Stage with Constant-gm and Constant Slew Rate Using a Novel Level Shifter. 477-480