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2020 – today
- 2020
[j3]Mattis Hasler
, Robert Wittig, Emil Matús, Gerhard P. Fettweis:
Slicing FIFOs for On-Chip Memory Bandwidth Exhaustion. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 441-450 (2020)- [j2]Yong Chen, Emil Matús, Sadia Moriam, Gerhard P. Fettweis:
High Performance Dynamic Resource Allocation for Guaranteed Service in Network-on-Chips. IEEE Trans. Emerg. Top. Comput. 8(2): 503-516 (2020) - [c49]Nairuhi Grigoryan, Emil Matús, Gerhard P. Fettweis:
Scalable 5G Signal Processing on Multiprocessor System: A Clustering Approach. 5G World Forum 2020: 389-394 - [c48]Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis:
Balancing Dynamic Scheduling Overhead to Maximize SDF Performance. 6G SUMMIT 2020: 1-5 - [c47]Seungseok Nam, Emil Matús, Gerhard P. Fettweis:
An ASIP Approach to Path Allocation in TDM NoCs using Adaptive Search Region. ACM Great Lakes Symposium on VLSI 2020: 463-468 - [c46]Robert Wittig, Andrés Goens, Christian Menard, Emil Matús, Gerhard P. Fettweis, Jerónimo Castrillón:
Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach. ICT 2020: 1-5 - [c45]Seungseok Nam, Emil Matús, Sadia Moriam, Gerhard P. Fettweis:
Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs. ISVLSI 2020: 102-107 - [c44]Mohammed Radi, Emil Matús, Gerhard P. Fettweis:
Blind Packet-Based Receiver Chain Optimization Using Machine Learning. WCNC 2020: 1-8
2010 – 2019
- 2019
- [c43]Nairuhi Grigoryan, Emil Matús, Gerhard P. Fettweis:
DF4CRAN: Dataflow Framework for Cloud-RAN Signal Processing. 5G World Forum 2019: 141-147 - [c42]Gerhard P. Fettweis, Mattis Hasler, Robert Wittig, Emil Matús, Stefan A. Damjancevic, Sebastian Haas, Friedrich Pauls, Seungseok Nam, Nairuhi Grigoryan:
A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel. ACSSC 2019: 896-900 - [c41]Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis:
Statistical Access Interval Prediction for Tightly Coupled Memory Systems. COOL CHIPS 2019: 1-3 - [c40]Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis:
Queue Based Memory Management Unit for Heterogeneous MPSoCs. DATE 2019: 1297-1300 - [c39]Robert Wittig, Stefan A. Damjancevic, Emil Matús, Gerhard P. Fettweis:
General Multicarrier Modulation Hardware Accelerator for the Internet of Things. GLOBECOM 2019: 1-6 - [c38]Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis:
A Hybrid Execution Approach to Improve the Performance of Dataflow Applications. ISOCC 2019: 107-108 - [c37]Robert Wittig, Friedrich Pauls, Emil Matús, Gerhard P. Fettweis:
Access Interval Prediction for Tightly Coupled Memory Systems. SAMOS 2019: 229-240 - [c36]Seungseok Nam, Emil Matús, Gerhard P. Fettweis:
Application Specific Instruction Processor for Dynamic Connection Allocation in TDM-NoCs. SoCC 2019: 33-38 - [c35]Gerhard P. Fettweis, Emil Matús, Robert Wittig, Mattis Hasler, Stefan A. Damjancevic, Seungseok Nam, Sebastian Haas:
5G-and-Beyond Scalable Machines. VLSI-SoC 2019: 105-109 - [c34]Robert Wittig, Mattis Hasler, Emil Matús, Gerhard P. Fettweis:
Probabilistic Models for Off-Line Arbiters in Embedded Systems. VLSI-SoC 2019: 238-239 - [c33]Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis:
Towards GFDM for Handsets - Efficient and Scalable Implementation on a Vector DSP. VTC-Fall 2019: 1-7 - 2018
- [c32]Mattis Hasler, Robert Wittig, Emil Matús, Gerhard P. Fettweis:
Slicing FIFOs for on-chip memory bandwidth exhaustion. ICECS 2018: 513-516 - 2017
- [c31]Gerhard P. Fettweis, Emil Matús:
Scalable 5G MPSoC architecture. ACSSC 2017: 613-618 - [c30]Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis:
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC 2017: 47:1-47:6 - [c29]Yong Chen, Emil Matús, Gerhard P. Fettweis:
Combined Centralized and Distributed Connection Allocation in Large TDM Circuit Switching NoCs. ACM Great Lakes Symposium on VLSI 2017: 411-414 - [c28]Yong Chen, Emil Matús, Gerhard P. Fettweis:
Combined packet and TDM circuit switching NoCs with novel connection configuration mechanism. ISCAS 2017: 1-4 - [c27]Yong Chen, Emil Matús, Gerhard P. Fettweis:
Combined TDM and SDM Circuit Switching NoCs with Dedicated Connection Allocator. ISVLSI 2017: 104-109 - [c26]Yong Chen, Emil Matús, Gerhard P. Fettweis:
Register-Exchange Based Connection Allocator for Circuit Switching NoCs. PDP 2017: 559-566 - 2016
- [c25]Yong Chen, Emil Matús, Gerhard P. Fettweis:
Centralized parallel multi-path multi-slot allocation approach for TDM NoCs. CCECE 2016: 1-5 - [c24]Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis:
An MPSoC for energy-efficient database query processing. DAC 2016: 112:1-112:6 - [c23]Manolis Marazakis, John Goodacre, Didier Fuin, Paul M. Carpenter, John Thomson, Emil Matús, Antimo Bruno, Per Stenström, Jérôme Martin, Yves Durand, Isabelle Dor:
EUROSERVER: Share-anything scale-out micro-server design. DATE 2016: 678-683 - [c22]Yong Chen, Emil Matús, Gerhard P. Fettweis:
Trellis-search based Dynamic Multi-Path Connection Allocation for TDM-NoCs. ACM Great Lakes Symposium on VLSI 2016: 323-328 - [c21]Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis:
A database accelerator for energy-efficient query processing and optimization. NORCAS 2016: 1-5 - 2014
- [j1]Oliver Arnold, Emil Matús, Benedikt Noethen, Markus Winter, Torsten Limberg, Gerhard P. Fettweis:
Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs. ACM Trans. Embed. Comput. Syst. 13(3s): 107:1-107:24 (2014) - [c20]Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Matús, Iakovos Mavroidis, John Thomson:
EUROSERVER: Energy Efficient Node for European Micro-Servers. DSD 2014: 206-213 - [c19]Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny:
10.7 A 105GOPS 36mm2 heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS. ISSCC 2014: 188-189 - 2013
- [c18]Oliver Arnold, Emil Matús, Benedikt Noethen, Friedrich Pauls, Gerhard P. Fettweis:
Towards elastic SDR architectures using dynamic task management. GlobalSIP 2013: 1286-1289 - 2012
- [c17]Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori:
A 335Mb/s 3.9mm2 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates. ISSCC 2012: 216-218 - [c16]Marcel Jar, Emil Matús, Esther P. Adeva, Eckhard Ohlmer, Gerhard P. Fettweis:
Two-stage detector for SC-FDMA transmission over MIMO ISI channels. ISWCS 2012: 391-395 - 2011
- [c15]Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Tomoyoshi Kobori:
Combining LDPC, turbo and Viterbi decoders: Benefits and costs. SiPS 2011: 216-221
2000 – 2009
- 2009
- [c14]Marcel Bimberg, Emil Matús, Gerhard P. Fettweis:
On the performance and numerical stability of soft-decision Reed-Solomon decoding. EUSIPCO 2009: 1166-1170 - [c13]Maria Elizabeth Gonzalez, Attila Bilgic, Adam Lackorzynski, Dacian Tudor, Emil Matús, Irv Badr:
ICT-Emuco. An innovative solution for future smart phones. ICME 2009: 1821-1824 - [c12]Marcos B. S. Tavares, Emil Matús, Gerhard P. Fettweis:
On the Structured Parallelism of Decoders for LDPC Convolutional Codes - an Algebraic Description. ISCAS 2009: 2453-2456 - [c11]Steffen Kunze, Emil Matús, Gerhard P. Fettweis:
ASIP Decoder Architecture for Convolutional and LDPC Codes. ISCAS 2009: 2457-2460 - [c10]Björn Mennenga, Emil Matús, Gerhard P. Fettweis:
Vectorization of the Sphere Detection Algorithm. ISCAS 2009: 2806-2809 - 2008
- [c9]Marcos B. S. Tavares, Steffen Kunze, Emil Matús, Gerhard P. Fettweis:
Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes. ASAP 2008: 215-220 - [c8]Torsten Limberg, Markus Winter, Marcel Bimberg, Reimund Klemm, Emil Matús, Marcos B. S. Tavares, Gerhard P. Fettweis, Hendrik Ahlendorf, Pablo Robelly:
A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals. ESSCIRC 2008: 466-469 - [c7]Marcos B. S. Tavares, Emil Matús, Steffen Kunze, Gerhard P. Fettweis:
A dual-core programmable decoder for LDPC convolutional codes. ISCAS 2008: 532-535 - 2007
- [c6]Marcel Bimberg, Marcos B. S. Tavares, Emil Matús, Gerhard P. Fettweis:
A High-Throughput Programmable Decoder for LDPC Convolutional Codes. ASAP 2007: 239-246 - [c5]Emil Matús, Marcos B. S. Tavares, Marcel Bimberg, Gerhard P. Fettweis:
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes. ISCAS 2007: 1657-1660 - 2006
- [c4]Jie Guo, Torsten Limberg, Emil Matús, Björn Mennenga, Reimund Klemm, Gerhard P. Fettweis:
Code Generation for STA Architecture. Euro-Par 2006: 299-310 - 2005
- [c3]Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, Torsten Limberg, Gerhard P. Fettweis:
A Compiler-friendly and Low-power DSP architecture. GI Jahrestagung (1) 2005: 459 - 2004
- [c2]Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis:
Synchronous Transfer Architecture (STA). SAMOS 2004: 343-352 - [c1]Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis:
Generated DSP Cores for Implementation of an OFDM Communication System. SAMOS 2004: 353-362
Coauthor Index
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