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Michael Fulde
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2010 – 2019
- 2018
- [j3]Michael Kalcher, Michael Fulde, Daniel Gruber:
Fully-digital transmitter architectures and circuits for the next generation of wireless communications. Elektrotech. Informationstechnik 135(1): 89-98 (2018) - 2017
- [j2]Stefan Trampitsch, Jovan Markovic, Patrick Obmann, Jonas Fritzin, Jan Zaleski, Christian Mayer, Michael Fulde, Harald Pretl, Andreas Springer, Mario Huemer:
A Nonlinear Switched State-Space Model for Capacitive RF DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(6): 1342-1353 (2017) - [c14]Michael Fulde, Alexander Belitzer, Zdravko Boos, Michael Bruennert, Jonas Fritzin, Hans Geltinger, Marcus Groinig, Daniel Gruber, Simon Gruenberger, Thomas Hartig, Vahur Kampus, Boris Kapfelsperger, Franz Kuttner, Stephan Leuschner, Thomas Maletz, Andreas Menkhoff, José Moreira, Alan Paussa, Davide Ponton, Harald Pretl, Daniel Sira, Ulrich Steinacker, Nenad Stevanovic:
13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS. ISSCC 2017: 218-219 - 2011
- [j1]Davide Ponton, Gerhard Knoblinger, Andreas Roithmeier, Federico Cernoia, Marc Tiebout, Michael Fulde, Pierpaolo Palestri:
LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 58-II(8): 467-471 (2011) - [c13]Florian Chouard, Shailesh More, Michael Fulde, Doris Schmitt-Landsiedel:
An analog perspective on device reliability in 32nm high-κ metal gate technology. DDECS 2011: 65-70 - [c12]Florian Chouard, Shailesh More, Michael Fulde, Doris Schmitt-Landsiedel:
An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies. ESSCIRC 2011: 251-254 - [c11]Shailesh More, Michael Fulde, Florian Chouard, Doris Schmitt-Landsiedel:
Reducing impact of degradation on analog circuits by chopper stabilization and autozeroing. ISQED 2011: 8-13 - [c10]Franz Kuttner, Harun Habibovic, Thomas Hartig, Michael Fulde, Gernot Babin, Andreas Santner, Peter Bogner, Claus Kropf, Harald Riesslegger, Uwe Hodel:
A digitally controlled DC-DC converter for SoC in 28nm CMOS. ISSCC 2011: 384-385 - 2010
- [c9]Florian Chouard, Michael Fulde, Doris Schmitt-Landsiedel:
Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technology. ESSCIRC 2010: 410-413
2000 – 2009
- 2009
- [c8]Domagoj Siprak, Piet Wambacq, Bertrand Parvais, Abdelkarim Mercha, Michael Fulde, Jesenka Veledar Kruger, Morin Dehan, Stefaan Decoutere:
FinFET RF receiver building blocks operating above 10 GHz. ESSCIRC 2009: 360-363 - [c7]Davide Ponton, Gerhard Knoblinger, Andreas Roithmeier, Marc Tiebout, Michael Fulde, Pierpaolo Palestri:
Assessment of the impact of technology scaling on the performance of LC-VCOs. ESSCIRC 2009: 364-367 - [c6]Michael Fulde, Martin Wirnshofer, Gerhard Knoblinger, Doris Schmitt-Landsiedel:
Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies. ISCAS 2009: 2537-2540 - 2007
- [c5]Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Analog design challenges and trade-offs using emerging materials and devices. ESSCIRC 2007: 123-126 - [c4]Florian Bauer, Klaus von Arnim, Christian Pacha, Thomas Schulz, Michael Fulde, Axel Nackaerts, M. Jurczak, Wade Xiong, K. T. San, C. Rinn Cleavelin, Klaus Schruefer, Georg Georgakos, Doris Schmitt-Landsiedel:
Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. ESSCIRC 2007: 392-395 - [c3]Michael Fulde, Klaus von Arnim, Christian Pacha, Florian Bauer, Christian Russ, Domagoj Siprak, Wade Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Advances in Multi-Gate MOSFET Circuit Design. ICECS 2007: 186-189 - [c2]Michael Fulde, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. ISCAS 2007: 1249-1252 - 2005
- [c1]Stephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. ESSCIRC 2005: 145-148
Coauthor Index
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