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2020 – today
- 2024
[j52]Zhengfeng Huang, Zishuai Li
, Liting Sun, Huaguo Liang, Tianming Ni, Aibin Yan:
A Quadruple-Node Upsets Hardened Latch Design Based on Cross-Coupled Elements. J. Electron. Test. 40(1): 19-30 (2024)- [j51]Zhengfeng Huang, Yan Zhang, Lei Ai, Huaguo Liang, Tianming Ni, Tai Song, Aibin Yan:
Designs of High-Speed Triple-Node-Upset Hardened Latch Based on Dual-Modular-Redundancy. J. Circuits Syst. Comput. 33(5): 2450092:1-2450092:25 (2024) - [j50]Aibin Yan, Han Bao, Wangjin Jiang, Jie Cui, Zhengfeng Huang, Xiaoqing Wen:
Efficient design approaches to CMOS full adder circuits. Microelectron. J. 149: 106235 (2024) - [j49]Zhengfeng Huang, Liting Sun, Xu Wang, Huaguo Liang, Yingchun Lu, Aibin Yan, Jun Pan, Xiaoqing Wen:
NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization. IEEE Trans. Aerosp. Electron. Syst. 60(4): 4590-4600 (2024) - [j48]Aibin Yan, Zhixing Li, Zhongyu Gao, Jing Zhang, Zhengfeng Huang, Tianming Ni, Jie Cui, Xiaolei Wang, Patrick Girard, Xiaoqing Wen:
MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2205-2214 (2024) - [j47]Aibin Yan, Yu Chen, Zhongyu Gao, Tianming Ni, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen:
FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 2299-2303 (2024) - [j46]Qingsong Peng, Jingchang Bian, Zhengfeng Huang, Senling Wang, Aibin Yan:
A Compact TRNG Design for FPGA Based on the Metastability of RO-driven Shift Registers. ACM Trans. Design Autom. Electr. Syst. 29(1): 13:1-13:17 (2024) - [j45]Aibin Yan, Litao Wang, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen:
Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS. IEEE Trans. Very Large Scale Integr. Syst. 32(1): 116-127 (2024) - [c46]Aibin Yan, Chen Dong, Xing Guo, Jie Song, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen:
IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications. ACM Great Lakes Symposium on VLSI 2024: 19-24 - [c45]Aibin Yan, Zhuoyuan Lin, Guangzhu Liu, Qingyang Zhang, Zhengfeng Huang, Jie Cui, Xiaoqing Wen, Patrick Girard:
Nonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices. ISCAS 2024: 1-5 - [c44]Jingchang Bian, Zhengfeng Huang, Ruixiang Liu, Yankun Lin, Zhao Yang, Huaguo Liang, Aibin Yan:
A RO-Integrated-LFSR-Based Nonlinear Strong PUF with Intrinsic Modeling Attacks Resilience. ITC-Asia 2024: 1-6 - [c43]Yang Chang, Guangzhu Liu, Inam Ullah, Gaoyang Shan, Xiaoqing Wen, Aibin Yan:
SHRCO: Design of an SRAM with High Reliability and Cost Optimization for Safety-Critical Applications. ITC-Asia 2024: 1-6 - [c42]Fan Xia, Jing Zhang, Jehad Ali, Chunjiong Zhang, Xiaoqing Wen, Aibin Yan:
SRBML: A Single-Event-Upset Recoverable and BTI-Mitigated Latch Design for Long-Term Reliability Enhancement. ITC-Asia 2024: 1-5 - 2023
- [j44]Aibin Yan, Yuting He, Xiaoxiao Niu, Jie Cui, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications. IEEE Des. Test 40(4): 34-41 (2023) - [j43]Zhengfeng Huang, Hao Wang, Dongxing Ma, Huaguo Liang, Yiming Ouyang, Aibin Yan:
Low Overhead and High Stability Radiation-Hardened Latch for Double/Triple Node Upsets. J. Electron. Test. 39(3): 289-301 (2023) - [j42]Aibin Yan, Jing Xiang, Yang Chang, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen:
Two sextuple cross-coupled SRAM cells with double-node-upset protection and cost optimization for aerospace applications. Microelectron. J. 139: 105908 (2023) - [j41]Zhengfeng Huang, Lanxi Duan, Yan Zhang, Tianming Ni, Aibin Yan:
A Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch. IEEE Trans. Aerosp. Electron. Syst. 59(3): 2621-2632 (2023) - [j40]Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen:
Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments. IEEE Trans. Aerosp. Electron. Syst. 59(3): 2885-2897 (2023) - [j39]Zhengfeng Huang, Dongxing Ma, Runwu Ji, Huaguo Liang, Aibin Yan, Tai Song, Tianming Ni:
Overhead Optimized and Quadruple-Node-Upset Self-Recoverable Latch Design Based on Looped C-Element Matrix. IEEE Trans. Aerosp. Electron. Syst. 59(6): 9357-9367 (2023) - [j38]Aibin Yan, Zhixing Li, Jie Cui, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen:
LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(6): 2069-2073 (2023) - [j37]Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Senling Wang, Xiaoqing Wen:
Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5074-5085 (2023) - [j36]Aibin Yan, Runqi Liu, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang:
Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 2256-2260 (2023) - [j35]Aibin Yan, Aoran Cao, Zhengfeng Huang, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen, Jiliang Zhang:
Two Double-Node-Upset-Hardened Flip-Flop Designs for High-Performance Applications. IEEE Trans. Emerg. Top. Comput. 11(4): 1070-1081 (2023) - [c41]Aibin Yan, Yu Chen, Zhengfeng Huang, Jie Cui, Xiaoqing Wen:
A High-Performance and P-Type FeFET-Based Non-Volatile Latch. ATS 2023: 1-5 - [c40]Aibin Yan, Xuehua Li, Zhongyu Gao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen:
Advanced DICE Based Triple-Node-Upset Recovery Latch with Optimized Overhead for Space Applications. ATS 2023: 1-5 - [c39]Aibin Yan, Zhen Zhou, Liang Ding, Jie Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard:
High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology. DATE 2023: 1-2 - [c38]Aibin Yan, Xuehua Li, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen:
A Robust and High-Performance Flip-Flop with Complete Soft-Error Recovery. DSA 2023: 474-476 - [c37]Stefan Holst, Ruijun Ma, Xiaoqing Wen, Aibin Yan, Hui Xu:
BiSTAHL: A Built-In Self-Testable Soft-Error-Hardened Scan-Cell. ETS 2023: 1-6 - [c36]Aibin Yan, Shaojie Wei, Jinjun Zhang, Jie Cui, Jie Song, Tianming Ni, Patrick Girard, Xiaoqing Wen:
A Low Area and Low Delay Latch Design with Complete Double-Node-Upset-Recovery for Aerospace Applications. ACM Great Lakes Symposium on VLSI 2023: 167-171 - [c35]Aibin Yan, Yang Chang, Jing Xiang, Hao Luo, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen:
Two Highly Reliable and High-Speed SRAM Cells for Safety-Critical Applications. ACM Great Lakes Symposium on VLSI 2023: 293-298 - [c34]Aibin Yan, Shaojie Wei, Zhixing Li, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Design of Low-Cost Approximate CMOS Full Adders. ISCAS 2023: 1-5 - [c33]Aibin Yan, Jing Xiang, Zhengfeng Huang, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen:
Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications. ITC-Asia 2023: 1-6 - [c32]Aibin Yan, Fan Xia, Tianming Ni, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
A Low Overhead and Double-Node-Upset Self-Recoverable Latch. ITC-Asia 2023: 1-5 - [c31]Aibin Yan, Chao Zhou, Shaojie Wei, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness. ITC-Asia 2023: 1-6 - 2022
- [j34]Tianming Ni, Jingchang Bian, Zhao Yang, Mu Nie, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen:
Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement. IEEE Des. Test 39(5): 34-42 (2022) - [j33]Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu:
Evaluation and Test of Production Defects in Hardened Latches. IEICE Trans. Inf. Syst. 105-D(5): 996-1009 (2022) - [j32]Aibin Yan, Kuikui Qian, Tai Song, Zhengfeng Huang, Tianming Ni, Yu Chen, Xiaoqing Wen:
A double-node-upset completely tolerant CMOS latch design with extremely low cost for high-performance applications. Integr. 86: 22-29 (2022) - [j31]Tai Song, Zhengfeng Huang, Aibin Yan:
Machine learning classification algorithm for VLSI test cost reduction. Integr. 87: 40-48 (2022) - [j30]Aibin Yan, Zhengzheng Fan, Liang Ding, Jie Cui, Zhengfeng Huang, Qijun Wang, Hao Zheng, Patrick Girard, Xiaoqing Wen:
Cost-Effective and Highly Reliable Circuit-Components Design for Safety-Critical Applications. IEEE Trans. Aerosp. Electron. Syst. 58(1): 517-529 (2022) - [j29]Aibin Yan, Zhelong Xu, Xiangfeng Feng, Jie Cui, Zhili Chen, Tianming Ni, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Novel Quadruple-Node-Upset-Tolerant Latch Designs With Optimized Overhead for Reliable Computing in Harsh Radiation Environments. IEEE Trans. Emerg. Top. Comput. 10(1): 404-413 (2022) - [c30]Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen:
MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator. AsianHOST 2022: 1-6 - [c29]Aibin Yan, Liang Ding, Zhen Zhou, Zhengfeng Huang, Jie Cui, Patrick Girard, Xiaoqing Wen:
A Radiation-Hardened Non-Volatile Magnetic Latch with High Reliability and Persistent Storage. ATS 2022: 1-6 - [c28]Aibin Yan, Zhixing Li, Shiwei Huang, Zijie Zhai, Xiangyu Cheng, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard:
SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments. DATE 2022: 1257-1262 - [c27]Aibin Yan, Zhen Zhou, Shaojie Wei, Jie Cui, Yong Zhou, Tianming Ni, Patrick Girard, Xiaoqing Wen:
A Highly Robust, Low Delay and DNU-Recovery Latch Design for Nanoscale CMOS Technology. ACM Great Lakes Symposium on VLSI 2022: 255-260 - [c26]Aibin Yan, Zhihui He, Jing Xiang, Jie Cui, Yong Zhou, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Two 0.8 V, Highly Reliable RHBD 10T and 12T SRAM Cells for Aerospace Applications. ACM Great Lakes Symposium on VLSI 2022: 261-266 - [c25]Aibin Yan, Yu Chen, Shukai Song, Zijie Zhai, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and Low-Delay Flip-Flop for Aerospace Applications. ACM Great Lakes Symposium on VLSI 2022: 333-338 - [c24]Aibin Yan, Shukai Song, Jixiang Zhang, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard:
Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS. ITC-Asia 2022: 73-78 - [c23]Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard:
A Highly Reliable and Low Power RHBD Flip-Flop Cell for Aerospace Applications. VTS 2022: 1-6 - 2021
- [j28]Aibin Yan, Aoran Cao, Zhelong Xu, Jie Cui, Tianming Ni, Patrick Girard, Xiaoqing Wen:
Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications. J. Electron. Test. 37(4): 489-502 (2021) - [j27]Aibin Yan, Zhihui He, Jun Zhou, Jie Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard:
Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications. Microelectron. J. 111: 105034 (2021) - [j26]Tianming Ni, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen:
A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1952-1956 (2021) - [j25]Qijun Wang, Aibin Yan, Hua Bao:
Intra Coding With Geometric Information for Urban Building Scenes. IEEE Trans. Circuits Syst. Video Technol. 31(6): 2386-2400 (2021) - [j24]Aibin Yan, Chaoping Lai, Yinlei Zhang, Jie Cui, Zhengfeng Huang, Jie Song, Jing Guo, Xiaoqing Wen:
Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS. IEEE Trans. Emerg. Top. Comput. 9(1): 520-533 (2021) - [j23]Tianming Ni, Zhao Yang, Hao Chang, Xiaoqiang Zhang, Lin Lu, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen:
A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology. IEEE Trans. Emerg. Top. Comput. 9(2): 724-734 (2021) - [c22]Aibin Yan, Aoran Cao, Kuikui Qian, Liang Ding, Zhihui He, Zhengzheng Fan, Xiaoqing Wen:
A Reliable and Low-Cost Flip-Flop Hardened against Double-Node-Upsets. DSA 2021: 734-736 - [c21]Aibin Yan, Aoran Cao, Zhengzheng Fan, Zhelong Xu, Tianming Ni, Patrick Girard, Xiaoqing Wen:
A 4NU-Recoverable and HIS-Insensitive Latch Design for Highly Robust Computing in Harsh Radiation Environments. ACM Great Lakes Symposium on VLSI 2021: 301-306 - [c20]Aibin Yan, Liang Ding, Chuanbo Shan, Haoran Cai, Xiaofeng Chen, Zhanjun Wei, Zhengfeng Huang, Xiaoqing Wen:
TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh Radiation. ISCAS 2021: 1-5 - [c19]Aibin Yan, Zijie Zhai, Lele Wang, Jixiang Zhang, Ningning Cui, Tianming Ni, Xiaoqing Wen:
Parallel DICE Cells and Dual-Level CEs based 3-Node-Upset Tolerant Latch Design for Highly Robust Computing. ITC-Asia 2021: 1-5 - [c18]Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen:
A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch. NANOARCH 2021: 1-6 - 2020
- [j22]Tai Song, Huaguo Liang, Tianming Ni, Zhengfeng Huang, Yingchun Lu, Jinlei Wan, Aibin Yan:
Pattern Reorder for Test Cost Reduction Through Improved SVMRANK Algorithm. IEEE Access 8: 147965-147972 (2020) - [j21]Aibin Yan, Xiangfeng Feng, Yuanjie Hu, Chaoping Lai, Jie Cui, Zhili Chen, Kohei Miyase, Xiaoqing Wen:
Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments. IEEE Trans. Aerosp. Electron. Syst. 56(2): 1163-1171 (2020) - [j20]Aibin Yan, Zhelong Xu, Kang Yang, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
A Novel Low-Cost TMR-Without-Voter Based HIS-Insensitive and MNU-Tolerant Latch Design for Aerospace Applications. IEEE Trans. Aerosp. Electron. Syst. 56(4): 2666-2676 (2020) - [j19]Aibin Yan, Yan Chen, Zhelong Xu, Zhili Chen, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Design of Double-Upset Recoverable and Transient-Pulse Filterable Latches for Low-Power and Low-Orbit Aerospace Applications. IEEE Trans. Aerosp. Electron. Syst. 56(5): 3931-3940 (2020) - [j18]Aibin Yan, Yuanjie Hu, Jie Cui, Zhili Chen, Zhengfeng Huang, Tianming Ni, Patrick Girard, Xiaoqing Wen:
Information Assurance Through Redundant Design: A Novel TNU Error-Resilient Latch for Harsh Radiation Environment. IEEE Trans. Computers 69(6): 789-799 (2020) - [j17]Tianming Ni, Yao Yao, Hao Chang, Lin Lu, Huaguo Liang, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen:
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2938-2951 (2020) - [j16]Aibin Yan, Yafei Ling, Jie Cui, Zhili Chen, Zhengfeng Huang, Jie Song, Patrick Girard, Xiaoqing Wen:
Quadruple Cross-Coupled Dual-Interlocked-Storage-Cells-Based Multiple-Node-Upset-Tolerant Latch Designs. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(3): 879-890 (2020) - [j15]Tianming Ni, Hao Chang, Tai Song, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen:
Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC. IEEE Trans. Circuits Syst. 67-II(11): 2657-2661 (2020) - [j14]Aibin Yan, Yan Chen, Yuanjie Hu, Jun Zhou, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen:
Novel Speed-and-Power-Optimized SRAM Cell Designs With Enhanced Self-Recoverability From Single- and Double-Node Upsets. IEEE Trans. Circuits Syst. 67-I(12): 4684-4695 (2020) - [j13]Tianming Ni, Dongsheng Liu, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan:
Architecture of Cobweb-Based Redundant TSV for Clustered Faults. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1736-1739 (2020) - [c17]Aibin Yan, Yan Chen, Jun Zhou, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard:
A Sextuple Cross-Coupled SRAM Cell Protected against Double-Node Upsets. ATS 2020: 1-5 - [c16]Aibin Yan, Xiangfeng Feng, Xiaohu Zhao, Hang Zhou, Jie Cui, Zuobin Ying, Patrick Girard, Xiaoqing Wen:
HITTSFL: Design of a Cost-Effective HIS-Insensitive TNU-Tolerant and SET-Filterable Latch for Safety-Critical Applications. DAC 2020: 1-6 - [c15]Aibin Yan, Zhelong Xu, Jie Cui, Zuobin Ying, Zhengfeng Huang, Huaguo Liang, Patrick Girard, Xiaoqing Wen:
Dual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications. ISCAS 2020: 1-5 - [c14]Zhengda Dou, Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Tianming Ni, Jie Cui, Patrick Girard, Xiaoqing Wen:
Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors. ITC-Asia 2020: 35-40
2010 – 2019
- 2019
- [j12]Aibin Yan, Jun Zhou, Yuanjie Hu, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen:
Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets. IEEE Access 7: 176188-176196 (2019) - [j11]Aibin Yan, Kang Yang, Zhengfeng Huang, Jiliang Zhang, Jie Cui, Xiangsheng Fang, Maoxiang Yi, Xiaoqing Wen:
A Double-Node-Upset Self-Recoverable Latch Design for High Performance and Low Power Application. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 287-291 (2019) - [j10]Aibin Yan, Zhen Wu, Jing Guo, Jie Song, Xiaoqing Wen:
Novel Double-Node-Upset-Tolerant Memory Cell Designs Through Radiation-Hardening-by-Design and Layout. IEEE Trans. Reliab. 68(1): 354-363 (2019) - [c13]Aibin Yan, Zhen Wu, Lu Lu, Zhili Chen, Jie Song, Zuobin Ying, Patrick Girard, Xiaoqing Wen:
Novel Radiation Hardened Latch Design with Cost-Effectiveness for Safety-Critical Terrestrial Applications. ATS 2019: 43-48 - [c12]Aibin Yan, Zhen Wu, Jun Zhou, Yuanjie Hu, Yan Chen, Zuobin Ying, Xiaoqing Wen, Patrick Girard:
Design of a Sextuple Cross-Coupled SRAM Cell with Optimized Access Operations for Highly Reliable Terrestrial Applications. ATS 2019: 55-60 - [c11]Aibin Yan, Yuanjie Hu, Jie Song, Xiaoqing Wen:
Single-Event Double-Upset Self-Recoverable and Single-Event Transient Pulse Filterable Latch Design for Low Power Applications. DATE 2019: 1679-1684 - [c10]Aibin Yan, Jun Zhou, Yuanjie Hu, Yan Chen, Zhen Wu, Tianming Ni:
Design of a Novel Self-Recoverable SRAM Cell Protected Against Soft Errors. DSA 2019: 497-498 - [c9]Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu:
STAHL: A Novel Scan-Test-Aware Hardened Latch Design. ETS 2019: 1-6 - [c8]Zhiyuan Song, Aibin Yan, Jie Cui, Zhili Chen, Xuejun Li, Xiaoqing Wen, Chaoping Lai, Zhengfeng Huang, Huaguo Liang:
A Novel Triple-Node-Upset-Tolerant CMOS Latch Design using Single-Node-Upset-Resilient Cells. ITC-Asia 2019: 139-144 - [c7]Tai Song, Huaguo Liang, Ying Sun, Zhengfeng Huang, Maoxiang Yi, Xiangsheng Fang, Aibin Yan:
Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory. VTS 2019: 1-6 - 2018
- [j9]Jiliang Zhang, Xiao Tan, Xiangqi Wang, Aibin Yan, Zheng Qin:
T2FA: Transparent Two-Factor Authentication. IEEE Access 6: 32677-32686 (2018) - [c6]Aibin Yan, Yafei Ling, Kang Yang, Zhili Chen, Maoxiang Yi:
Aging-Temperature-and-Propagation Induced Pulse-Broadening Aware Soft Error Rate Estimation for nano-Scale CMOS. ATS 2018: 86-91 - [c5]Qian He, Aibin Yan, Chaoping Lai, Yinlei Zhang, Chunming Liu, Zhile Chen, Zhen Wu, Jie Cui, Huaguo Liang:
Novel low cost and DNU online self-recoverable RHBD latch design for nanoscale CMOS. ISCAS 2018: 1-5 - [c4]Aibin Yan, Zhile Chen, Zhengfeng Huang, Xiangsheng Fang, Maoxiang Yi, Jing Guo:
Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique. ITC-Asia 2018: 49-54 - 2017
- [j8]Aibin Yan, Huaguo Liang, Yingchun Lu, Zhengfeng Huang:
A transient pulse dually filterable and online self-recoverable latch. IEICE Electron. Express 14(2): 20160911 (2017) - [j7]Xiumin Xu, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yingchun Lu, Aibin Yan, Tianming Ni, Maoxiang Yi:
A single event transient detector in SRAM-based FPGAs. IEICE Electron. Express 14(12): 20170210 (2017) - [j6]Huaguo Liang, Xin Li, Zhengfeng Huang, Aibin Yan, Xiumin Xu:
Highly Robust Double Node Upset Resilient Hardened Latch Design. IEICE Trans. Electron. 100-C(5): 496-503 (2017) - [j5]Tianming Ni, Huaguo Liang, Mu Nie, Xiumin Xu, Aibin Yan, Zhengfeng Huang:
A Region-Based Through-Silicon via Repair Method for Clustered Faults. IEICE Trans. Electron. 100-C(12): 1108-1117 (2017) - [j4]Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Yiming Ouyang, Honghui Deng:
Single event double-upset fully immune and transient pulse filterable latch design for nanoscale CMOS. Microelectron. J. 61: 43-50 (2017) - [j3]Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yiming Ouyang, Huaguo Liang:
Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 25(6): 1978-1982 (2017) - [c3]Aibin Yan, Zhengfeng Huang, Maoxiang Yi, Jie Cui, Huaguo Liang:
HLDTL: High-performance, low-cost, and double node upset tolerant latch design. VTS 2017: 1-6 - 2016
- [j2]Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Yiming Ouyang, Xuejun Li:
An SEU resilient, SET filterable and cost effective latch in presence of PVT variations. Microelectron. Reliab. 63: 239-250 (2016) - [c2]Aibin Yan, Zhengfeng Huang, Xiangsheng Fang, Xiaolin Xu, Huaguo Liang:
Novel Low Cost and Double Node Upset Tolerant Latch Design for Nanoscale CMOS Technology. ATS 2016: 252-256 - 2015
- [j1]Aibin Yan, Huaguo Liang, Zhengfeng Huang, Cuiyun Jiang, Maoxiang Yi:
A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology. IEICE Trans. Electron. 98-C(12): 1171-1178 (2015) - 2014
- [c1]Huaguo Liang, Zhi Wang, Zhengfeng Huang, Aibin Yan:
Design of a Radiation Hardened Latch for Low-Power Circuits. ATS 2014: 19-24
Coauthor Index
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