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Akira Tamakoshi
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- affiliation: Tohoku University, Sendai, Miyagi, Japan
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2020 – today
- 2021
- [j5]Masanori Natsui
, Akira Tamakoshi
, Hiroaki Honjo
, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma
, Hui Shen, Shunsuke Fukami
, Hideo Sato
, Shoji Ikeda
, Hideo Ohno
, Tetsuo Endoh
, Takahiro Hanyu:
Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition. IEEE J. Solid State Circuits 56(4): 1116-1128 (2021) - [j4]Naoya Onizawa
, Akira Tamakoshi
, Takahiro Hanyu:
Hardware Acceleration of Large-Scale CMOS Invertible Logic Based on Sparse Hamiltonian Matrices. IEEE Open J. Circuits Syst. 2: 782-791 (2021) - [c6]Naoya Onizawa, Akira Tamakoshi, Takahiro Hanyu:
Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian Matrices. SiPS 2021: 1-6 - 2020
- [j3]Naoya Onizawa
, Shogo Mukaida, Akira Tamakoshi
, Hitoshi Yamagata, Hiroyuki Fujita, Takahiro Hanyu:
High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-Voltage/Current Converter. IEEE Trans. Very Large Scale Integr. Syst. 28(10): 2171-2181 (2020) - [c5]Akira Tamakoshi
, Naoya Onizawa, Hitoshi Yamagata, Hiroyuki Fujita, Takahiro Hanyu:
Design of an Energy-Efficient True Random Number Generator Based on Triple Read-Write Data-Stream Multiplexing of MTJ Devices. NEWCAS 2020: 283-286 - [c4]Masanori Natsui, Akira Tamakoshi, Hiroaki Honjo
, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma, Hui Shen, Shunsuke Fukami
, Hideo Sato, Shoji Ikeda
, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu:
Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j2]Masanori Natsui
, Daisuke Suzuki, Akira Tamakoshi
, Toshinari Watanabe, Hiroaki Honjo
, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda
, Hideo Ohno
, Tetsuo Endoh, Takahiro Hanyu
:
A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications. IEEE J. Solid State Circuits 54(11): 2991-3004 (2019) - [c3]Masanori Natsui
, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda
, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu:
An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz. ISSCC 2019: 202-204 - 2017
- [j1]Naoya Onizawa, Akira Mochizuki, Akira Tamakoshi, Takahiro Hanyu:
Sudden Power-Outage Resilient In-Processor Checkpointing for Energy-Harvesting Nonvolatile Processors. IEEE Trans. Emerg. Top. Comput. 5(2): 151-163 (2017) - 2016
- [c2]Masanori Natsui
, Akira Tamakoshi, Akira Mochizuki, Hiroki Koike, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu:
Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design. ISCAS 2016: 1878-1881 - 2015
- [c1]Naoya Onizawa, Akira Mochizuki, Akira Tamakoshi
, Takahiro Hanyu:
A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery. NANOARCH 2015: 39-44
Coauthor Index
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