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"Design and modeling of PLL-based clock and data recovery circuits with ..."

Hsi-En Liu et al. (2016)

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DOI: 10.1109/ISCAS.2016.7539027

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Hsi-En Liu, Chun-Jen Su, Chih-Kang Cheng, Wen-Kuen Liu:
Design and modeling of PLL-based clock and data recovery circuits with periodically embedded clock encoding for intra-panel interfaces. ISCAS 2016: 2234-2237

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