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ORCIDFrank Sill
Frank Sill Torres
Person information
- affiliation: German Aerospace Center,Institute for the Protection of Maritime Infrastructures, Bremerhaven, Germany
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2020 – today
- 2025
[j25]Sajjad Parvin
, Mehran Goli, Frank Sill Torres, Rolf Drechsler:
OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(4): 1553-1566 (2025)- [c59]Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler:
True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET. VLSID 2025: 37-42 - 2024
- [j24]Usman Ali Gulzari, Zoran Salcic, Waqar Farooq, Sheraz Anjum, Sarzamin Khan, Muhammad Sajid, Frank Sill Torres:
Comparative analysis of 2D mesh topologies with additional communication links for on-chip networks. Comput. Networks 241: 110193 (2024) - [j23]Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler:
Lower the RISC: Designing optical-probing-attack-resistant cores. Microprocess. Microsystems 111: 105121 (2024) - [j22]Arto Niemi, Bartosz Skobiej, Nikolai Kulev, Frank Sill Torres:
Modeling offshore wind farm disturbances and maintenance service responses within the scope of resilience. Reliab. Eng. Syst. Saf. 242: 109719 (2024) - [c58]Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler:
Hidden Cost of Circuit Design with RFETs. DATE 2024: 1-2 - 2023
- [j21]Chathura Wanigasekara, Frank Sill Torres, Akshya Swain:
Robust Control of Autonomous Underwater Vehicles Using Delta-Sigma-Based 1-bit Controllers. IEEE Access 11: 122821-122832 (2023) - [c57]Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler:
Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study. ASP-DAC 2023: 683-689 - [c56]Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler:
Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core. COINS 2023: 1-4 - [c55]Bartosz Skobiej, Frank Sill Torres, Finn-Matthis Minssen:
Surveillance of Offshore Installations with Patrol Routine. critis 2023: 208-223 - [c54]Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler:
FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing. DATE 2023: 1-2 - [c53]Felipe A. Costa de Oliveira, Borja Carrillo-Perez, Alberto García-Ortiz, Frank Sill Torres:
Integrity Assessment of Maritime Object Detection Impacted by Partial Camera Obstruction. ICSRS 2023: 474-480 - [c52]Sajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler:
LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing. ISVLSI 2023: 1-6 - 2022
- [j20]Fernando Gehm Moraes, Frank Sill Torres:
Guest Editors' Introduction: SBCCI 2020. IEEE Des. Test 39(2): 5-6 (2022) - [c51]Sajjad Parvin, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler:
Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design Techniques. ASP-DAC 2022: 429-435 - [c50]Felipe A. Costa de Oliveira, Arto Niemi, Alberto García-Ortiz, Frank Sill Torres:
Partial Camera Obstruction Detection Using Single Value Image Metrics and Data Augmentation. ICSRS 2022: 292-299 - [c49]Alexander Gabriel, Babette Tecklenburg, Frank Sill Torres:
Threat and Risk Scenarios for Offshore Wind Farms and an Approach to their Assessment. ISCRAM 2022: 162-173 - 2021
- [j19]Michael Canesche, Marcelo M. Menezes, Westerley Carvalho, Frank Sill Torres, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira:
TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1600-1612 (2021) - [j18]Danilo Damião Almeida, Lucas Bragança, Frank Sill Torres, Ricardo Ferreira, José Augusto Miranda Nacif:
HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3158-3162 (2021) - [c48]Marcel Walter, Winston Haaswijk, Robert Wille, Frank Sill Torres, Rolf Drechsler:
One-pass Synthesis for Field-coupled Nanocomputing Technologies. ASP-DAC 2021: 574-580 - [c47]Ilia Polian, Frank Altmann, Tolga Arul, Christian Boit, Ralf Brederlow, Lucas Davi, Rolf Drechsler, Nan Du, Thomas Eisenbarth, Tim Güneysu, Sascha Hermann, Matthias Hiller, Rainer Leupers, Farhad Merchant, Thomas Mussenbrock, Stefan Katzenbeisser, Akash Kumar, Wolfgang Kunz, Thomas Mikolajick, Vivek Pachauri, Jean-Pierre Seifert, Frank Sill Torres, Jens Trommer:
Nano Security: From Nano-Electronics to Secure Systems. DATE 2021: 1334-1339 - [c46]Alexander Gabriel, Babette Tecklenburg, Yann Guillouet, Frank Sill Torres:
Threat analysis of offshore wind farms by Bayesian networks - a new modeling approach. ISCRAM 2021: 174-185 - 2020
- [j17]Vitor A. M. F. Torres, D. A. C. Silva, Luiz C. B. Torres, Mateus T. Braga, M. B. R. Cardoso, V. T. Lino, Frank Sill Torres, Antônio de Pádua Braga:
Embedded real-time feature extraction for electrode inversion detection in telemedicine electrocardiograms. Biomed. Signal Process. Control. 60: 101946 (2020) - [j16]Frank Sill Torres, Philipp Niemann, Robert Wille, Rolf Drechsler:
Near Zero-Energy Computation Using Quantum-Dot Cellular Automata. ACM J. Emerg. Technol. Comput. Syst. 16(1): 11:1-11:16 (2020) - [j15]Frank Sill Torres, Pedro Arthur Silva, Geraldo Fontes, Marcel Walter, José Augusto Miranda Nacif, Ricardo Santos Ferreira, Omar Paranaiba Vilela Neto, Jeferson F. Chaves, Robert Wille, Philipp Niemann, Daniel Große, Rolf Drechsler:
On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata. Microprocess. Microsystems 76: 103109 (2020) - [c45]Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler:
Verification for Field-coupled Nanocomputing Circuits. DAC 2020: 1-6 - [c44]Umberto Garlando, Marcel Walter, Robert Wille, Fabrizio Riente, Frank Sill Torres, Rolf Drechsler:
ToPoliNano and fiction: Design Tools for Field-coupled Nanocomputing. DSD 2020: 408-415 - [c43]Westerley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira:
A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators. FPT 2020: 233-236 - [c42]Marcel Walter, Robert Wille, Frank Sill Torres, Rolf Drechsler:
Bail on Balancing: An Alternative Approach to the Physical Design of Field-Coupled Nanocomputing Circuits. ISVLSI 2020: 66-71
2010 – 2019
- 2019
- [j14]Vitor Ferreira Torres, Frank Sill Torres:
Resilient training of neural network classifiers with approximate computing techniques for hardware-optimised implementations. IET Comput. Digit. Tech. 13(6): 532-542 (2019) - [j13]Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler:
Placement and Routing for Tile-based Field-coupled Nanocomputing Circuits Is NP-complete (Research Note). ACM J. Emerg. Technol. Comput. Syst. 15(3): 29:1-29:10 (2019) - [c41]Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler:
Scalable design for field-coupled nanocomputing circuits. ASP-DAC 2019: 197-202 - [c40]Buse Ustaoglu, Sebastian Huhn, Frank Sill Torres, Daniel Große, Rolf Drechsler:
SAT-Hard: A Learning-Based Hardware SAT-Solver. DSD 2019: 74-81 - [c39]Frank Sill Torres, Hussam Amrouch, Jörg Henkel, Rolf Drechsler:
Impact of NBTI on Increasing the Susceptibility of FinFET to Radiation. IRPS 2019: 1-6 - [c38]Frank Sill Torres, Alberto García Ortiz, Rolf Drechsler:
HotAging - Impact of Power Dissipation on Hardware Degradation. ISCAS 2019: 1-5 - [c37]Robert Wille, Marcel Walter, Frank Sill Torres, Daniel Große, Rolf Drechsler:
Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies. ISVLSI 2019: 651-656 - [i2]Marcel Walter, Robert Wille, Frank Sill Torres, Daniel Große, Rolf Drechsler:
fiction: An Open Source Framework for the Design of Field-coupled Nanocomputing Circuits. CoRR abs/1905.02477 (2019) - 2018
- [j12]Sarzamin Khan, Sheraz Anjum, Usman Ali Gulzari, Frank Sill Torres:
Comparative analysis of network-on-chip simulation tools. IET Comput. Digit. Tech. 12(1): 30-38 (2018) - [j11]Rodrigo Possamai Bastos, Leonel Acunha Guimaraes, Frank Sill Torres, Laurent Fesquet:
Architectures of bulk built-in current sensors for detection of transient faults in integrated circuits. Microelectron. J. 71: 70-79 (2018) - [j10]Frank Sill Torres, Robert Wille, Philipp Niemann, Rolf Drechsler:
An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(12): 3031-3041 (2018) - [c36]Marcel Walter, Robert Wille, Daniel Große, Frank Sill Torres, Rolf Drechsler:
An exact method for design exploration of quantum-dot cellular automata. DATE 2018: 503-508 - [c35]Frank Sill Torres, Pedro Arthur Silva, Geraldo Fontes, José Augusto Miranda Nacif, Ricardo Santos Ferreira, Omar Paranaiba Vilela Neto, Jeferson F. Chaves, Rolf Drechsler:
Exploration of the Synchronization Constraint in Quantum-dot Cellular Automata. DSD 2018: 642-648 - [c34]Frank Sill Torres, Robert Wille, Marcel Walter, Philipp Niemann, Daniel Große, Rolf Drechsler:
Evaluating the Impact of Interconnections in Quantum-Dot Cellular Automata. DSD 2018: 649-656 - [c33]Jeferson F. Chaves, Marco A. Ribeiro, Frank Sill Torres, Omar P. Vilela Neto:
Enhancing Fundamental Energy Limits of Field-Coupled Nanocomputing Circuits. ISCAS 2018: 1-5 - [c32]Felipe Augusto Braga Viana, Frank Sill Torres:
Reliable Integration of Thermal Flow Sensors into Air Data Systems. SBESC 2018: 99-105 - [i1]Frank Sill Torres, Philipp Niemann, Robert Wille, Rolf Drechsler:
Breaking Landauer's Limit\\Using Quantum-dot Cellular Automata. CoRR abs/1811.03894 (2018) - 2017
- [j9]Usman Ali Gulzari, Sheraz Anjum, Shahrukh Agha, Sarzamin Khan, Frank Sill Torres:
Efficient and scalable cross-by-pass-mesh topology for networks-on-chip. IET Comput. Digit. Tech. 11(4): 140-148 (2017) - [j8]Muhammad Sajid, Nikolay G. Chechenin, Frank Sill Torres, Usman Ali Gulzari, Muhammad Usman Butt, Zhu Ming, E. U. Khan:
Single Event Upset rate determination for 65 nm SRAM bit-cell in LEO radiation environments. Microelectron. Reliab. 78: 11-16 (2017) - [j7]Raphael de Oliveira Rocha, Frank Sill Torres, Rodrigo Possamai Bastos:
Towards high-sensitive built-in current sensors enabling detection of radiation-induced soft errors. Microelectron. Reliab. 78: 190-196 (2017) - [c31]Frank Sill Torres, Pedro Fausto Rodrigues Leite, Rolf Drechsler:
Unintrusive aging analysis based on offline learning. DFT 2017: 1-4 - [c30]Andrei Silva, Frank Sill:
Mitigation of aging effects through selective time-borrowing and alternative path activation. SBCCI 2017: 210-216 - 2016
- [j6]João Guilherme Mourão Melo, Frank Sill Torres:
Exploration of Noise Impact on Integrated Bulk Current Sensors. J. Electron. Test. 32(2): 163-173 (2016) - [j5]Caio Araujo T. Campos, Abner Luis Panho Marciano, Omar P. Vilela Neto, Frank Sill Torres:
USE: A Universal, Scalable, and Efficient Clocking Scheme for QCA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(3): 513-517 (2016) - [c29]Dayane Alfenas Reis, Caio Araujo T. Campos, Thiago Rodrigues B. S. Soares, Omar Paranaiba Vilela Neto, Frank Sill Torres:
A Methodology for Standard Cell Design for QCA. ISCAS 2016: 2114-2117 - [c28]Christoph Niemann, Tim Wegner, Dirk Timmermann, Frank Sill Torres:
Low overhead in situ aging monitoring and proactive aging management. ISCAS 2016: 2799-2802 - [c27]Frank Sill Torres, Pedro Henrique Kohler Marra Pinto:
Pipelined SAR with comparator-based switch-capacitor residue amplification. LASCAS 2016: 119-122 - [c26]Mario Vinicius Guimaraes, Frank Sill Torres:
Automatic layout integration of Bulk Built-In Current Sensors for detection of soft errors. SBCCI 2016: 1-6 - 2015
- [c25]João Guilherme Mourão Melo, Frank Sill Torres:
Noise analysis of integrated bulk current sensors for detection of radiation induced soft errors. LATS 2015: 1-6 - [c24]Rodrigo Fonseca Rocha Soares, Frank Sill Torres, Dirk Timmermann:
Exploration of technology parameter values of integrated circuit technologies. PATMOS 2015: 118-125 - [c23]Dayane Alfenas Reis, Frank Sill Torres:
A novel methodology for robustness analysis of QCA circuits. SBCCI 2015: 15:1-15:7 - 2014
- [c22]Rafael Kioji Vivas Maeda, Frank Sill Torres:
CLEVER: Cross-Layer Error Verification, Evaluation and Reporting. SBCCI 2014: 10:1-10:7 - 2013
- [c21]Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
A bulk built-in sensor for detection of fault attacks. HOST 2013: 51-54 - [c20]Frank Sill Torres:
Enhancement of System-Lifetime by Alternating Module Activation. IESS 2013: 82-91 - [c19]Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre:
A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults. PATMOS 2013: 157-163 - 2012
- [j4]Rodrigo Possamai Bastos, Frank Sill Torres, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode. Microelectron. Reliab. 52(9-10): 1781-1786 (2012) - [c18]Frank Sill Torres, Rodrigo Possamai Bastos:
Robust modular Bulk Built-in Current Sensors for detection of transient faults. SBCCI 2012: 1-6 - 2011
- [j3]Claas Cornelius, Frank Sill Torres, Dirk Timmermann:
Power-Efficient Application of Sleep Transistors to Enhance the Reliability of Integrated Circuits. J. Low Power Electron. 7(4): 552-561 (2011) - [j2]Pedro F. Leite Retes, Frank Sill Torres, Davies William de Lima Monteiro:
Evaluation of the full operational cycle of a CMOS transfer-gated photodiode active pixel. Microelectron. J. 42(11): 1269-1275 (2011) - [c17]Frank Sill Torres, Claas Cornelius, Dirk Timmermann:
Reliability enhancement via Sleep Transistors. LATW 2011: 1-6
2000 – 2009
- 2009
- [c16]Hagen Sämrow, Claas Cornelius, Frank Sill, Andreas Tockhorn, Dirk Timmermann:
Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown. SBCCI 2009 - [c15]Frank Sill, Davies William de Lima Monteiro:
Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor. SBCCI 2009 - 2008
- [c14]Claas Cornelius, Frank Sill, Hagen Sämrow, Jakob Salzmann, Dirk Timmermann, Diógenes Cecilio da Silva Jr.:
Encountering gate oxide breakdown with shadow transistors to increase reliability. SBCCI 2008: 111-116 - 2007
- [j1]Ralf Salomon, Frank Sill:
High-speed, low-leakage integrated circuits: An evolutionary algorithm perspective. J. Syst. Archit. 53(5-6): 321-327 (2007) - [c13]Ralf Salomon, Frank Sill, Dirk Timmermann:
Minimizing leakage: What if every gate could have its individual threshold voltage? Artificial Intelligence and Applications 2007: 525-530 - [c12]Frank Sill, Jiaxi You, Dirk Timmermann:
Design of mixed gates for leakage reduction. ACM Great Lakes Symposium on VLSI 2007: 263-268 - [c11]Jakob Salzmann, Frank Sill, Dirk Timmermann:
Algorithm for Fast Statistical Timing Analysis. SoC 2007: 1-4 - 2006
- [c10]Ralf Salomon, Frank Sill:
Biologically-Inspired Optimization of Circuit Performance and Leakage: A Comparative Study. ARCS 2006: 352-366 - [c9]Frank Sill, Ralf Salomon:
Evolving High-Speed, Energy-Efficient Integrated Circuits. IEEE Congress on Evolutionary Computation 2006: 3121-3128 - [c8]Konrad Engel, Thomas Kalinowski, Roger Labahn, Frank Sill, Dirk Timmermann:
Algorithms for Leakage Reduction with Dual Threshold Design Techniques. SoC 2006: 1-4 - [c7]Frank Sill, Claas Cornelius, Dirk Timmermann:
Reduzierung des Leckstromverbrauchs mit gemischten Gattern in Deep Submicron Technologien. MBMV 2006: 275-283 - [c6]Frank Sill, Claas Cornelius, Stephan Kubisch, Dirk Timmermann:
Mixed Gates: Leakage Reduction techniques applied to Switches for Networks-on-Chip. ReCoSoC 2006: 76-82 - 2005
- [c5]Danko Schröer, Hagen Burchardt, Frank Sill, Frank Golatowski, Ralf Salomon, Dirk Timmermann:
Role-based Strategies at Example of RoboCup. Artificial Intelligence and Applications 2005: 585-590 - [c4]Frank Grassert, Frank Sill, Claas Cornelius, Dirk Timmermann:
Verlustleistungsreduzierung bei dynamischen TSPC-Schaltungstechniken. GI Jahrestagung (1) 2005: 450 - [c3]Frank Sill, Frank Grassert, Dirk Timmermann:
Total leakage power optimization with improved mixed gates. SBCCI 2005: 154-159 - [c2]Frank Sill, Frank Grassert, Dirk Timmermann:
Reducing Leakage with Mixed-V_th (MVT). VLSI Design 2005: 874-877 - 2004
- [c1]Frank Sill, Frank Grassert, Dirk Timmermann:
Low power gate-level design with mixed-Vth (MVT) techniques. SBCCI 2004: 278-282
Coauthor Index
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