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2020 – today
- 2024
[j73]Alessandro Ottaviano, Robert Balas, Giovanni Bambini
, Antonio del Vecchio, Maicol Ciani, Davide Rossi, Luca Benini, Andrea Bartolini:
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation. Int. J. Parallel Program. 52(1-2): 93-123 (2024)- [j72]Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. IEEE J. Solid State Circuits 59(1): 128-142 (2024) - [j71]Arpan Suravi Prasad, Moritz Scherer, Francesco Conti, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine. IEEE J. Solid State Circuits 59(7): 2055-2069 (2024) - [j70]Luca Valente, Alessandro Nadalini, Asif Hussain Chiralil Veeran, Mattia Sinigaglia, Bruno Sá, Nils Wistoff, Yvan Tortorella, Simone Benatti, Rafail Psiakis, Ari Kulmala, Baker Mohammad, Sandro Pinto, Daniele Palossi, Luca Benini, Davide Rossi:
A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation. IEEE Trans. Circuits Syst. I Regul. Pap. 71(5): 2266-2279 (2024) - [c135]Matteo Perotti, Michele Raeber, Mattia Sinigaglia, Matheus A. Cavalcante, Davide Rossi, Luca Benini:
Spatzformer: An Efficient Reconfigurable Dual-Core RISC-V V Cluster for Mixed Scalar-Vector Workloads. ASAP 2024: 172-173 - [c134]Amirhossein Kiamarzi, Davide Rossi, Giuseppe Tagliavini:
QR-PULP: Streamlining QR Decomposition for RISC-V Parallel Ultra-Low-Power Platforms. CF 2024 - [c133]Chaoqun Liang, Alessandro Ottaviano, Thomas Benz, Mattia Sinigaglia, Luca Benini, Angelo Garofalo, Davide Rossi:
A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems. CF (Companion) 2024 - [c132]Emanuele Parisi, Alberto Musa, Maicol Ciani, Francesco Barchi, Davide Rossi, Andrea Bartolini, Andrea Acquaviva:
Assessing the Performance of OpenTitan as Cryptographic Accelerator in Secure Open-Hardware System-on-Chips. CF 2024 - [c131]Emanuele Parisi, Alberto Musa, Simone Manoni, Maicol Ciani, Davide Rossi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva:
TitanCFI: Toward Enforcing Control-Flow Integrity in the Root -of- Trust. DATE 2024: 1-6 - [i57]Emanuele Parisi, Alberto Musa, Simone Manoni, Maicol Ciani, Davide Rossi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva:
TitanCFI: Toward Enforcing Control-Flow Integrity in the Root-of-Trust. CoRR abs/2401.02567 (2024) - [i56]Luca Valente, Alessandro Nadalini, Asif Veeran, Mattia Sinigaglia, Bruno Sá, Nils Wistoff, Yvan Tortorella, Simone Benatti, Rafail Psiakis, Ari Kulmala, Baker Mohammad, Sandro Pinto, Daniele Palossi, Luca Benini, Davide Rossi:
A Heterogeneous RISC-V based SoC for Secure Nano-UAV Navigation. CoRR abs/2401.03531 (2024) - [i55]Luca Valente, Francesco Restuccia, Davide Rossi, Ryan Kastner, Luca Benini:
TOP: Towards Open & Predictable Heterogeneous SoCs. CoRR abs/2401.15639 (2024) - [i54]Emanuele Parisi, Alberto Musa, Maicol Ciani, Francesco Barchi, Davide Rossi, Andrea Bartolini, Andrea Acquaviva:
Assessing the Performance of OpenTitan as Cryptographic Accelerator in Secure Open-Hardware System-on-Chips. CoRR abs/2402.10395 (2024) - [i53]Chaoqun Liang, Alessandro Ottaviano, Thomas Benz, Mattia Sinigaglia, Luca Benini, Angelo Garofalo, Davide Rossi:
A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems. CoRR abs/2406.06394 (2024) - [i52]Maicol Ciani, Emanuele Parisi, Alberto Musa, Francesco Barchi, Andrea Bartolini, Ari Kulmala, Rafail Psiakis, Angelo Garofalo, Andrea Acquaviva, Davide Rossi:
Unleashing OpenTitan's Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading. CoRR abs/2406.11558 (2024) - [i51]Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus A. Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gürkaynak, Davide Rossi, Luca Benini:
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET. CoRR abs/2406.15068 (2024) - [i50]Matteo Perotti, Michele Raeber, Mattia Sinigaglia, Matheus A. Cavalcante, Davide Rossi, Luca Benini:
Spatzformer: An Efficient Reconfigurable Dual-Core RISC-V V Cluster for Mixed Scalar-Vector Workloads. CoRR abs/2407.05447 (2024) - [i49]Riccardo Tedeschi, Luca Valente, Gianmarco Ottavi, Enrico Zelioli, Nils Wistoff, Massimiliano Giacometti, Abdul Basit Sajjad, Luca Benini, Davide Rossi:
Culsans: An Efficient Snoop-based Coherency Unit for the CVA6 Open Source RISC-V application processor. CoRR abs/2407.19895 (2024) - 2023
- [j69]Yvan Tortorella, Luca Bertaccini, Luca Benini, Davide Rossi, Francesco Conti:
RedMule: A mixed-precision matrix-matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration. Future Gener. Comput. Syst. 149: 122-135 (2023) - [j68]Binyamin Frankel, Eyal Sarfati, Davide Rossi, Shmuel Wimer:
Energy Efficiency of Opportunistic Refreshing for Gain-Cell Embedded DRAM. IEEE Trans. Circuits Syst. I Regul. Pap. 70(4): 1605-1612 (2023) - [j67]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2450-2463 (2023) - [j66]Jie Chen, Igor Loi, Eric Flamand, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 456-469 (2023) - [j65]Bruno Sá, Luca Valente, José Martins, Davide Rossi, Luca Benini, Sandro Pinto:
CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration. IEEE Trans. Very Large Scale Integr. Syst. 31(11): 1713-1726 (2023) - [j64]Sergi Abadal, Robert Guirado, Hamidreza Taghvaee, Akshay Jain, Elana Pereira de Santana, Peter Haring Bolívar, Mohamed Saeed, Renato Negra, Zhenxing Wang, Kun-Ta Wang, Max Christian Lemme, Joshua Klein, Marina Zapater, Alexandre Levisse, David Atienza, Davide Rossi, Francesco Conti, Martino Dazzi, Geethan Karunaratne, Irem Boybat, Abu Sebastian:
Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors. IEEE Wirel. Commun. 30(4): 162-169 (2023) - [c130]Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst:
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. DAC 2023: 1-6 - [c129]Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. DATE 2023: 1-6 - [c128]Seyed Ahmad Mirsalari, Giuseppe Tagliavini, Davide Rossi, Luca Benini:
TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes. DATE 2023: 1-2 - [c127]Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi:
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC. DATE 2023: 1-6 - [c126]Gianmarco Ottavi, Florian Zaruba, Luca Benini, Davide Rossi:
Reducing Load-Use Dependency-Induced Performance Penalty in the Open-Source RISC-V CVA6 CPU. DSD 2023: 429-435 - [c125]Moritz Scherer, Manuel Eggimann, Alfio Di Mauro, Arpan Suravi Prasad, Francesco Conti, Davide Rossi, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS. ESSCIRC 2023: 217-220 - [c124]Luca Valente, Asif Veeran, Mattia Sinigaglia, Yvan Tortorella, Alessandro Nadalini, Nils Wistoff, Bruno Sá, Angelo Garofalo, Rafail Psiakis, M. Tolba, Ari Kulmala, Nimisha Limaye, Ozgur Sinanoglu, Sandro Pinto, Daniele Palossi, Luca Benini, Baker Mohammad, Davide Rossi:
Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs. HCS 2023: 1-12 - [c123]Maicol Ciani, Stefano Bonato, Rafail Psiakis, Angelo Garofalo, Luca Valente, Suresh Sugumar, Alessandro Giusti, Davide Rossi, Daniele Palossi:
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case. ISCAS 2023: 1-5 - [c122]Mattia Sinigaglia, Luca Bertaccini, Luca Valente, Angelo Garofalo, Simone Benatti, Luca Benini, Francesco Conti, Davide Rossi:
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays. ISCAS 2023: 1-5 - [c121]Francesco Conti, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, Nils Exibard, Pascal Gouedo, Mathieu Louvat, Emmanuel Botte, Luca Benini:
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing. ISSCC 2023: 326-327 - [c120]Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. ISVLSI 2023: 1-6 - [i48]Yvan Tortorella, Luca Bertaccini, Luca Benini, Davide Rossi, Francesco Conti:
RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Acceleration. CoRR abs/2301.03904 (2023) - [i47]Bruno Sá, Luca Valente, José Martins, Davide Rossi, Luca Benini, Sandro Pinto:
CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration. CoRR abs/2302.02969 (2023) - [i46]Michael Rogenmoser, Yvan Tortorella, Davide Rossi, Francesco Conti, Luca Benini:
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space. CoRR abs/2303.08706 (2023) - [i45]Maicol Ciani, Stefano Bonato, Rafail Psiakis, Angelo Garofalo, Luca Valente, Suresh Sugumar, Alessandro Giusti, Davide Rossi, Daniele Palossi:
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case. CoRR abs/2303.16554 (2023) - [i44]Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti:
DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training. CoRR abs/2303.17954 (2023) - [i43]Mattia Sinigaglia, Luca Bertaccini, Luca Valente, Angelo Garofalo, Simone Benatti, Luca Benini, Francesco Conti, Davide Rossi:
Echoes: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays. CoRR abs/2305.07325 (2023) - [i42]Francesco Conti, Gianna Paulin, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing. CoRR abs/2305.08415 (2023) - [i41]Alessandro Ottaviano, Robert Balas, Giovanni Bambini, Antonio del Vecchio, Maicol Ciani, Davide Rossi, Luca Benini, Andrea Bartolini:
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation. CoRR abs/2306.09501 (2023) - [i40]Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. CoRR abs/2307.01056 (2023) - [i39]Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst:
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge. CoRR abs/2308.00154 (2023) - [i38]Jie Chen, Igor Loi, Eric Flamand, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters. CoRR abs/2309.01299 (2023) - [i37]Arpan Suravi Prasad, Moritz Scherer, Francesco Conti, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini:
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality with At-MRAM Neural Engine. CoRR abs/2312.14750 (2023) - 2022
- [j63]Angelo Garofalo, Gianmarco Ottavi, Francesco Conti, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 422-435 (2022) - [j62]Davide Rossi, Francesco Conti, Manuel Eggimann, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini:
Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. IEEE J. Solid State Circuits 57(1): 127-139 (2022) - [j61]Fabio Montagna, Stefan Mach, Simone Benatti, Angelo Garofalo, Gianmarco Ottavi, Luca Benini, Davide Rossi, Giuseppe Tagliavini:
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics. IEEE Trans. Parallel Distributed Syst. 33(5): 1038-1053 (2022) - [c119]Nazareno Bruschi, Giuseppe Tagliavini, Francesco Conti, Sergi Abadal, Albert Cabellos-Aparicio, Eduard Alarcón, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference. AICAS 2022: 170-173 - [c118]Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco Conti:
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs. DATE 2022: 1099-1102 - [c117]Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti:
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training. ESSCIRC 2022: 273-276 - [c116]Alfio Di Mauro, Moritz Scherer, Davide Rossi, Luca Benini:
Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs. HCS 2022: 1-19 - [c115]Davide Rossi, Stefano Zacchiroli:
Worldwide Gender Differences in Public Code Contributions and how they have been affected by the COVID-19 pandemic. ICSE-SEIS 2022: 172-183 - [c114]Alex Coto, Franco Barbanera, Ivan Lanese, Davide Rossi, Emilio Tuosto:
On Formal Choreographic Modelling: A Case Study in EU Business Processes. ISoLA (1) 2022: 205-219 - [c113]Davide Rossi, Stefano Zacchiroli:
Geographic Diversity in Public Code Contributions: An Exploratory Large-Scale Study Over 50 Years. MSR 2022: 80-85 - [c112]Alessandro Ottaviano, Robert Balas, Giovanni Bambini, Corrado Bonfanti, Simone Benatti, Davide Rossi, Luca Benini, Andrea Bartolini:
ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration. SAMOS 2022: 120-135 - [c111]Luca Bedogni, Sebastiano Manfredini, Francesco Poggi, Davide Rossi:
WISE: A Semantic and Interoperable Web of Things Architecture for Smart Environments. WF-IoT 2022: 1-6 - [i36]Angelo Garofalo, Gianmarco Ottavi, Francesco Conti, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
A Heterogeneous In-Memory Computing Cluster For Flexible End-to-End Inference of Real-World Deep Neural Networks. CoRR abs/2201.01089 (2022) - [i35]Nazareno Bruschi, Germain Haugou, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors. CoRR abs/2201.08166 (2022) - [i34]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. CoRR abs/2201.08656 (2022) - [i33]Davide Rossi, Stefano Zacchiroli:
Worldwide Gender Differences in Public Code Contributions. CoRR abs/2202.07278 (2022) - [i32]Davide Rossi, Stefano Zacchiroli:
Geographic Diversity in Public Code Contributions. CoRR abs/2203.15369 (2022) - [i31]Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco Conti:
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs. CoRR abs/2204.11192 (2022) - [i30]Nazareno Bruschi, Giuseppe Tagliavini, Francesco Conti, Sergi Abadal, Albert Cabellos-Aparicio, Eduard Alarcón, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference. CoRR abs/2206.04796 (2022) - [i29]Alfio Di Mauro, Moritz Scherer, Davide Rossi, Luca Benini:
Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs. CoRR abs/2209.01065 (2022) - [i28]Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. CoRR abs/2211.12877 (2022) - [i27]Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi:
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC. CoRR abs/2211.14944 (2022) - 2021
- [j60]Alessio Burrello, Angelo Garofalo, Nazareno Bruschi, Giuseppe Tagliavini, Davide Rossi, Francesco Conti:
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs. IEEE Trans. Computers 70(8): 1253-1268 (2021) - [j59]Ahmed Elnaqib, Hayate Okuhara, Taekwang Jang, Davide Rossi, Luca Benini:
A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator With 0.22% INL. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 156-160 (2021) - [j58]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes. IEEE Trans. Emerg. Top. Comput. 9(3): 1489-1505 (2021) - [j57]Florian Glaser, Giuseppe Tagliavini, Davide Rossi, Germain Haugou, Qiuting Huang, Luca Benini:
Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters. IEEE Trans. Parallel Distributed Syst. 32(3): 633-648 (2021) - [j56]Pasquale Davide Schiavone, Davide Rossi, Alfio Di Mauro, Frank K. Gürkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini:
Arnold: An eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End Nodes. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 677-690 (2021) - [j55]Pierpaolo Palestri, Ahmed Elnaqib, Davide Menin, Klaid Shyti, Francesco Brandonisio, Andrea Bandiziol, Davide Rossi, Roberto Nonis:
Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation. IEEE Trans. Very Large Scale Integr. Syst. 29(7): 1392-1401 (2021) - [j54]Hayate Okuhara, Ahmed Elnaqib, Martino Dazzi, Pierpaolo Palestri, Simone Benatti, Luca Benini, Davide Rossi:
A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 29(10): 1800-1811 (2021) - [c110]Gianmarco Ottavi, Geethan Karunaratne, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet? AICAS 2021: 1-4 - [c109]Fabio Montagna, Giuseppe Tagliavini, Davide Rossi, Angelo Garofalo, Luca Benini:
Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs. ARCS 2021: 167-182 - [c108]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V based IoT End Nodes. ARITH 2021: 53 - [c107]Joshua Klein, Alexandre Levisse, Giovanni Ansaloni, David Atienza, Marina Zapater, Martino Dazzi, Geethan Karunaratne, Irem Boybat, Abu Sebastian, Davide Rossi, Francesco Conti, Elana Pereira de Santana, Peter Haring Bolívar, Mohamed Saeed, Renato Negra, Zhenxing Wang, Kun-Ta Wang, Max Christian Lemme, Akshay Jain, Robert Guirado, Hamidreza Taghvaee, Sergi Abadal:
Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH). CF 2021: 191-193 - [c106]Angelo Garofalo, Gianmarco Ottavi, Alfio Di Mauro, Francesco Conti, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. ESSCIRC 2021: 267-270 - [c105]Nazareno Bruschi, Germain Haugou, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors. ICCD 2021: 409-416 - [c104]Davide Rossi, Francesco Conti, Manuel Eggimann, Stefan Mach, Alfio Di Mauro, Marco Guermandi, Giuseppe Tagliavini, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini:
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. ISSCC 2021: 60-62 - [c103]Luca Valente, Davide Rossi, Luca Benini:
Hardware-In-The Loop Emulation for Agile Co-Design of Parallel Ultra-Low Power IoT Processors. VLSI-SoC 2021: 1-6 - [i26]Gianmarco Ottavi, Geethan Karunaratne, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-end 100-TOPS/W Inference With Analog In-Memory Computing: Are We There Yet? CoRR abs/2109.01404 (2021) - [i25]Hayate Okuhara, Ahmed Elnaqib, Martino Dazzi, Pierpaolo Palestri, Simone Benatti, Luca Benini, Davide Rossi:
A Fully-Integrated 5mW, 0.8Gbps Energy-Efficient Chip-to-Chip Data Link for Ultra-Low-Power IoT End-Nodes in 65-nm CMOS. CoRR abs/2109.01961 (2021) - [i24]Davide Rossi, Francesco Conti, Manuel Eggimann, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini:
Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode. CoRR abs/2110.09101 (2021) - 2020
- [j53]Hesam Zolfaghari, Davide Rossi, Walter Cerroni, Hayate Okuhara, Carla Raffaelli, Jari Nurmi:
Flexible Software-Defined Packet Processing Using Low-Area Hardware. IEEE Access 8: 98929-98945 (2020) - [j52]Benoît W. Denkinger, Flavio Ponzina, Soumya Basu, Andrea Bonetti, Szabolcs Balási, Martino Ruggiero, Miguel Peón Quirós, Davide Rossi, Andreas Burg, David Atienza:
Impact of Memory Voltage Scaling on Accuracy and Resilience of Deep Learning Based Edge Devices. IEEE Des. Test 37(2): 84-92 (2020) - [j51]Paolo Meloni, Daniela Loi, Gianfranco Deriu, Marco Carreras, Francesco Conti, Alessandro Capotondi, Davide Rossi:
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge. IEEE Embed. Syst. Lett. 12(2): 62-65 (2020) - [j50]Ester Giallonardo, Francesco Poggi, Davide Rossi, Eugenio Zimeo:
Semantics-Driven Programming of Self-Adaptive Reactive Systems. Int. J. Softw. Eng. Knowl. Eng. 30(6): 805-834 (2020) - [j49]Alfio Di Mauro, Davide Rossi, Antonio Pullini, Philippe Flatresse, Luca Benini:
Performance-aware predictive-model-based on-chip body-bias regulation strategy for an ULP multi-core cluster in 28 nm UTBB FD-SOI. Integr. 72: 194-207 (2020) - [j48]Hesam Zolfaghari, Davide Rossi, Jari Nurmi:
A custom processor for protocol-independent packet parsing. Microprocess. Microsystems 72 (2020) - [j47]Elisabetta De Giovanni, Fabio Montagna, Benoît W. Denkinger, Simone Machetti, Miguel Peón Quirós, Simone Benatti, Davide Rossi, Luca Benini, David Atienza:
Modular Design and Optimization of Biomedical Applications for Ultralow Power Heterogeneous Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3821-3832 (2020) - [j46]Francesco Renzini, Claudio Mucci, Davide Rossi, Eleonora Franchi Scarselli, Roberto Canegallo:
A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 489-501 (2020) - [j45]Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca Benini:
Always-On 674μ W@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node. IEEE Trans. Circuits Syst. 67-I(11): 3905-3918 (2020) - [c102]Pasquale Davide Schiavone, Davide Rossi, Yan Liu, Simone Benatti, Song Luan, Ian Williams, Luca Benini, Timothy G. Constandinou:
Neuro-PULP: A Paradigm Shift Towards Fully Programmable Platforms for Neural Interfaces. AICAS 2020: 50-54 - [c101]Nazareno Bruschi, Angelo Garofalo, Francesco Conti, Giuseppe Tagliavini, Davide Rossi:
Enabling mixed-precision quantized neural networks in extreme-edge devices. CF 2020: 217-220 - [c100]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Davide Rossi, Luca Benini:
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions. DATE 2020: 186-191 - [c99]Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Giuseppe Tagliavini, Philippe Coussy, Luca Benini, Davide Rossi:
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE.