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2020 – today
- 2021
[c8]Kai Sheng
, Linqi Shi, Weixin Gai, Qianting Hua, Peng Lin:
A 2-Bit 4-Level 4-Wire 56Gb/s Transceiver in 14nm FinFET. ISCAS 2021: 1-5
2010 – 2019
- 2019
- [c7]Xiao Xiang, Weixin Gai, Linqi Shi, Ai He, Kai Sheng:
An 8-12GHz 0.92° Phase Error Quadrature Clock Generator Based on Two-Stage Poly Phase Filter with Intermediate Point Compensation. ISCAS 2019: 1-5 - 2018
- [c6]Yinxuan Lyu, Jianhua Feng, Chenfeng Tu, Linqi Shi, Hongfei Ye, Weixin Gai, Dunshan Yu:
A 108fsrms 0.45mW 100MS/s 1.25MHz bandwidth multi-bit ΔΣ time-to-digital converter with dynamic element matching. ISCAS 2018: 1-5 - [c5]Linqi Shi, Weixin Gai, Jichao Huang, Liangxiao Tang, Xiao Xiang:
A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor. ISCAS 2018: 1-4 - [c4]Linqi Shi, Weixin Gai, Xiaoting Zhi, Liangxiao Tang, Xiao Xiang:
An 8.52-11.34 GHz 0.34° Phase Error Quadrature Clock Generator with Time-Voltage-Time Convertor. ISCAS 2018: 1-4 - [c3]Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang, Kai Sheng, Ai He:
A 32Gb/s 133mW PAM-4 transceiver with DFE based on adaptive clock phase and threshold voltage in 65nm CMOS. ISSCC 2018: 114-116 - 2017
- [c2]Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang:
A 40 Gb/s 74.9 mW PAM4 receiver with novel clock and data recovery. ISCAS 2017: 1-4 - 2016
- [c1]Liangxiao Tang, Weixin Gai, Linqi Shi:
PAM4 receiver with adaptive threshold voltage and adaptive decision feedback equalizer. ISCAS 2016: 2246-2249
Coauthor Index
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