Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2001, Munich, Germany, March 12-16, 2001. ACM, 2001
, Dietmar Müller
: SystemCSV - an extension of SystemC for mixed multi-level communication modeling and interface-based system design.
: MetaRTL: raising the abstraction level of RTL design.
: Methods and tools for systems engineering of automotive electronic architectures.
, Thomas Thurner
: Vehicle electric/electronic architecture - one of the most important challenges for OEM's.
, A. Salem
: Combinational equivalence checking using Boolean satisfiability and binary decision diagrams.
Julio Leao da Silva Jr.
, J. Shamberger
, M. Josie Ammer
, C. Guo
, Suet-Fei Li
, Rahul C. Shah
, Tim Tuan
, Michael Sheets
, Jan M. Rabaey
, Borivoje Nikolic
, Alberto L. Sangiovanni-Vincentelli
, Paul K. Wright
: Design methodology for PicoRadio networks.
, Artur Chojnacki
: High-quality sub-function construction in functional decomposition based on information relationship measures.
, Pinaki Mazumder
: Efficient and passive modeling of transmission lines by using differential quadrature method.
, Ernest S. Kuh
: Explicit formulas and efficient algorithm for moment computation of coupled RC trees with lumped and distributed elements.
: On the impact of on-chip inductance on signal nets under the influence of power grid noise.
, Sudhakar M. Reddy
: Definitions of the numbers of detections of target faults and their effectiveness in guiding test generation for high defect coverage.
, D. F. Wong
: A graph based algorithm for optimal buffer insertion under accurate delay models.
: Generation of optimum test stimuli for nonlinear analog circuits using nonlinear - programming and time-domain sensitivities.
: Managing the SoC design challenge with "Soft" hardware.
: Integrated hardware-software co-synthesis for design of embedded systems under power and latency constraints.
, Wayne Wolf
: Allocation and scheduling of conditional task graph in hardware/software co-synthesis.
: Code placement in hardware/software co-synthesis to improve performance and reduce cost.
, Ranga Vemuri
: Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers.
: SH-4 RISC microprocessor for multimedia, game machine.
, Sharad Malik
: Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks.
: Static memory allocation by pointer analysis and coloring.
, Ranga Vemuri
: A regularity-based hierarchical symbolic analysis method for large-scale analog networks.
: Susceptibility of analog cells to substrate interference.