ASP-DAC 2006: Yokohama, Japan

Keynote address I

Keynote address II

Keynote address III

Formal methods for coverage and scalable verification

Interconnect for high-end SoC

Timing analysis and optimization

University design contest

Software techniques for efficient SoC design

Application examples with leading edge design methodology


Special session: electrothermal design of nanoscale integrated circuits

Logic Synthesis

Future technical directions for design automation

Routing and interconnect optimization

Special session: flash memory in embedded systems

Resolving timing issues: design and test

Leading edge design methodology for SoCs and SiPs

Advanced circuit simulation

Special session: open access overview

Advances in simulation technologies

Scheduling for embedded systems

High frequency interconnect effects in nanometer technology

Designers' forum: low power design

Power optimization of large-scale circuits

Advanced memory and processor architectures for MPSoC

New routing techniques

Minimization of test cost and power