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2000 – 2009
- 2008
[j3]Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski:
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs. ACM Trans. Reconfigurable Technol. Syst. 1(2): 11:1-11:21 (2008)- [c13]Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski:
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). DAC 2008: 72-75 - [c12]Bita Gorjiara, Daniel Gajski:
Automatic architecture refinement techniques for customizing processing elements. DAC 2008: 379-384 - 2007
- [j2]Bita Gorjiara, Nader Bagherzadeh
, Pai H. Chou:
Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling. ACM Trans. Design Autom. Electr. Syst. 12(4): 39 (2007) - [c11]Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou:
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. ASP-DAC 2007: 872-877 - [c10]Bita Gorjiara, Daniel Gajski:
FPGA-friendly code compression for horizontal microcoded custom IPs. FPGA 2007: 108-115 - [c9]Bita Gorjiara, Daniel Gajski:
A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. ICCD 2007: 609-614 - 2006
- [j1]Mehrdad Reshadi, Bita Gorjiara, Nikil D. Dutt:
Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2904-2918 (2006) - [c8]Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski:
Designing a custom architecture for DCT using NISC technology. ASP-DAC 2006: 116-117 - [c7]Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski:
Generic netlist representation for system and PE level design exploration. CODES+ISSS 2006: 282-287 - [c6]Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski:
A Graph Based Algorithm for Data Path Optimization in Custom Processors. DSD 2006: 496-503 - [c5]Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski:
Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . ICCD 2006: 356-361 - 2005
- [c4]Bita Gorjiara, Daniel D. Gajski:
Custom Processor Design Using NISC: A Case-Study on DCT algorithm. ESTIMedia 2005: 55-60 - [c3]Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski:
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. ICCD 2005: 69-76 - 2004
- [c2]Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen:
Fast and efficient voltage scheduling by evolutionary slack distribution. ASP-DAC 2004: 659-662 - [c1]Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou:
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes. ISLPED 2004: 381-386
Coauthor Index
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